ppc4xx_hsta_msi.c 4.9 KB

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  1. /*
  2. * MSI support for PPC4xx SoCs using High Speed Transfer Assist (HSTA) for
  3. * generation of the interrupt.
  4. *
  5. * Copyright © 2013 Alistair Popple <alistair@popple.id.au> IBM Corporation
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/msi.h>
  15. #include <linux/of.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/pci.h>
  18. #include <linux/semaphore.h>
  19. #include <asm/msi_bitmap.h>
  20. #include <asm/ppc-pci.h>
  21. struct ppc4xx_hsta_msi {
  22. struct device *dev;
  23. /* The ioremapped HSTA MSI IO space */
  24. u32 __iomem *data;
  25. /* Physical address of HSTA MSI IO space */
  26. u64 address;
  27. struct msi_bitmap bmp;
  28. /* An array mapping offsets to hardware IRQs */
  29. int *irq_map;
  30. /* Number of hwirqs supported */
  31. int irq_count;
  32. };
  33. static struct ppc4xx_hsta_msi ppc4xx_hsta_msi;
  34. static int hsta_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  35. {
  36. struct msi_msg msg;
  37. struct msi_desc *entry;
  38. int irq, hwirq;
  39. u64 addr;
  40. /* We don't support MSI-X */
  41. if (type == PCI_CAP_ID_MSIX) {
  42. pr_debug("%s: MSI-X not supported.\n", __func__);
  43. return -EINVAL;
  44. }
  45. for_each_pci_msi_entry(entry, dev) {
  46. irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1);
  47. if (irq < 0) {
  48. pr_debug("%s: Failed to allocate msi interrupt\n",
  49. __func__);
  50. return irq;
  51. }
  52. hwirq = ppc4xx_hsta_msi.irq_map[irq];
  53. if (hwirq == NO_IRQ) {
  54. pr_err("%s: Failed mapping irq %d\n", __func__, irq);
  55. return -EINVAL;
  56. }
  57. /*
  58. * HSTA generates interrupts on writes to 128-bit aligned
  59. * addresses.
  60. */
  61. addr = ppc4xx_hsta_msi.address + irq*0x10;
  62. msg.address_hi = upper_32_bits(addr);
  63. msg.address_lo = lower_32_bits(addr);
  64. /* Data is not used by the HSTA. */
  65. msg.data = 0;
  66. pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq,
  67. (((u64) msg.address_hi) << 32) | msg.address_lo);
  68. if (irq_set_msi_desc(hwirq, entry)) {
  69. pr_err(
  70. "%s: Invalid hwirq %d specified in device tree\n",
  71. __func__, hwirq);
  72. msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
  73. return -EINVAL;
  74. }
  75. pci_write_msi_msg(hwirq, &msg);
  76. }
  77. return 0;
  78. }
  79. static int hsta_find_hwirq_offset(int hwirq)
  80. {
  81. int irq;
  82. /* Find the offset given the hwirq */
  83. for (irq = 0; irq < ppc4xx_hsta_msi.irq_count; irq++)
  84. if (ppc4xx_hsta_msi.irq_map[irq] == hwirq)
  85. return irq;
  86. return -EINVAL;
  87. }
  88. static void hsta_teardown_msi_irqs(struct pci_dev *dev)
  89. {
  90. struct msi_desc *entry;
  91. int irq;
  92. for_each_pci_msi_entry(entry, dev) {
  93. if (entry->irq == NO_IRQ)
  94. continue;
  95. irq = hsta_find_hwirq_offset(entry->irq);
  96. /* entry->irq should always be in irq_map */
  97. BUG_ON(irq < 0);
  98. irq_set_msi_desc(entry->irq, NULL);
  99. msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1);
  100. pr_debug("%s: Teardown IRQ %u (index %u)\n", __func__,
  101. entry->irq, irq);
  102. }
  103. }
  104. static int hsta_msi_probe(struct platform_device *pdev)
  105. {
  106. struct device *dev = &pdev->dev;
  107. struct resource *mem;
  108. int irq, ret, irq_count;
  109. struct pci_controller *phb;
  110. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  111. if (!mem) {
  112. dev_err(dev, "Unable to get mmio space\n");
  113. return -EINVAL;
  114. }
  115. irq_count = of_irq_count(dev->of_node);
  116. if (!irq_count) {
  117. dev_err(dev, "Unable to find IRQ range\n");
  118. return -EINVAL;
  119. }
  120. ppc4xx_hsta_msi.dev = dev;
  121. ppc4xx_hsta_msi.address = mem->start;
  122. ppc4xx_hsta_msi.data = ioremap(mem->start, resource_size(mem));
  123. ppc4xx_hsta_msi.irq_count = irq_count;
  124. if (!ppc4xx_hsta_msi.data) {
  125. dev_err(dev, "Unable to map memory\n");
  126. return -ENOMEM;
  127. }
  128. ret = msi_bitmap_alloc(&ppc4xx_hsta_msi.bmp, irq_count, dev->of_node);
  129. if (ret)
  130. goto out;
  131. ppc4xx_hsta_msi.irq_map = kmalloc(sizeof(int) * irq_count, GFP_KERNEL);
  132. if (!ppc4xx_hsta_msi.irq_map) {
  133. ret = -ENOMEM;
  134. goto out1;
  135. }
  136. /* Setup a mapping from irq offsets to hardware irq numbers */
  137. for (irq = 0; irq < irq_count; irq++) {
  138. ppc4xx_hsta_msi.irq_map[irq] =
  139. irq_of_parse_and_map(dev->of_node, irq);
  140. if (ppc4xx_hsta_msi.irq_map[irq] == NO_IRQ) {
  141. dev_err(dev, "Unable to map IRQ\n");
  142. ret = -EINVAL;
  143. goto out2;
  144. }
  145. }
  146. list_for_each_entry(phb, &hose_list, list_node) {
  147. phb->controller_ops.setup_msi_irqs = hsta_setup_msi_irqs;
  148. phb->controller_ops.teardown_msi_irqs = hsta_teardown_msi_irqs;
  149. }
  150. return 0;
  151. out2:
  152. kfree(ppc4xx_hsta_msi.irq_map);
  153. out1:
  154. msi_bitmap_free(&ppc4xx_hsta_msi.bmp);
  155. out:
  156. iounmap(ppc4xx_hsta_msi.data);
  157. return ret;
  158. }
  159. static const struct of_device_id hsta_msi_ids[] = {
  160. {
  161. .compatible = "ibm,hsta-msi",
  162. },
  163. {}
  164. };
  165. static struct platform_driver hsta_msi_driver = {
  166. .probe = hsta_msi_probe,
  167. .driver = {
  168. .name = "hsta-msi",
  169. .of_match_table = hsta_msi_ids,
  170. },
  171. };
  172. static int hsta_msi_init(void)
  173. {
  174. return platform_driver_register(&hsta_msi_driver);
  175. }
  176. subsys_initcall(hsta_msi_init);