qe_io.c 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192
  1. /*
  2. * arch/powerpc/sysdev/qe_lib/qe_io.c
  3. *
  4. * QE Parallel I/O ports configuration routines
  5. *
  6. * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
  7. *
  8. * Author: Li Yang <LeoLi@freescale.com>
  9. * Based on code from Shlomi Gridish <gridish@freescale.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify it
  12. * under the terms of the GNU General Public License as published by the
  13. * Free Software Foundation; either version 2 of the License, or (at your
  14. * option) any later version.
  15. */
  16. #include <linux/stddef.h>
  17. #include <linux/kernel.h>
  18. #include <linux/errno.h>
  19. #include <linux/module.h>
  20. #include <linux/ioport.h>
  21. #include <asm/io.h>
  22. #include <asm/qe.h>
  23. #include <asm/prom.h>
  24. #include <sysdev/fsl_soc.h>
  25. #undef DEBUG
  26. static struct qe_pio_regs __iomem *par_io;
  27. static int num_par_io_ports = 0;
  28. int par_io_init(struct device_node *np)
  29. {
  30. struct resource res;
  31. int ret;
  32. const u32 *num_ports;
  33. /* Map Parallel I/O ports registers */
  34. ret = of_address_to_resource(np, 0, &res);
  35. if (ret)
  36. return ret;
  37. par_io = ioremap(res.start, resource_size(&res));
  38. num_ports = of_get_property(np, "num-ports", NULL);
  39. if (num_ports)
  40. num_par_io_ports = *num_ports;
  41. return 0;
  42. }
  43. void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir,
  44. int open_drain, int assignment, int has_irq)
  45. {
  46. u32 pin_mask1bit;
  47. u32 pin_mask2bits;
  48. u32 new_mask2bits;
  49. u32 tmp_val;
  50. /* calculate pin location for single and 2 bits information */
  51. pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1)));
  52. /* Set open drain, if required */
  53. tmp_val = in_be32(&par_io->cpodr);
  54. if (open_drain)
  55. out_be32(&par_io->cpodr, pin_mask1bit | tmp_val);
  56. else
  57. out_be32(&par_io->cpodr, ~pin_mask1bit & tmp_val);
  58. /* define direction */
  59. tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
  60. in_be32(&par_io->cpdir2) :
  61. in_be32(&par_io->cpdir1);
  62. /* get all bits mask for 2 bit per port */
  63. pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS -
  64. (pin % (QE_PIO_PINS / 2) + 1) * 2));
  65. /* Get the final mask we need for the right definition */
  66. new_mask2bits = (u32) (dir << (QE_PIO_PINS -
  67. (pin % (QE_PIO_PINS / 2) + 1) * 2));
  68. /* clear and set 2 bits mask */
  69. if (pin > (QE_PIO_PINS / 2) - 1) {
  70. out_be32(&par_io->cpdir2,
  71. ~pin_mask2bits & tmp_val);
  72. tmp_val &= ~pin_mask2bits;
  73. out_be32(&par_io->cpdir2, new_mask2bits | tmp_val);
  74. } else {
  75. out_be32(&par_io->cpdir1,
  76. ~pin_mask2bits & tmp_val);
  77. tmp_val &= ~pin_mask2bits;
  78. out_be32(&par_io->cpdir1, new_mask2bits | tmp_val);
  79. }
  80. /* define pin assignment */
  81. tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
  82. in_be32(&par_io->cppar2) :
  83. in_be32(&par_io->cppar1);
  84. new_mask2bits = (u32) (assignment << (QE_PIO_PINS -
  85. (pin % (QE_PIO_PINS / 2) + 1) * 2));
  86. /* clear and set 2 bits mask */
  87. if (pin > (QE_PIO_PINS / 2) - 1) {
  88. out_be32(&par_io->cppar2,
  89. ~pin_mask2bits & tmp_val);
  90. tmp_val &= ~pin_mask2bits;
  91. out_be32(&par_io->cppar2, new_mask2bits | tmp_val);
  92. } else {
  93. out_be32(&par_io->cppar1,
  94. ~pin_mask2bits & tmp_val);
  95. tmp_val &= ~pin_mask2bits;
  96. out_be32(&par_io->cppar1, new_mask2bits | tmp_val);
  97. }
  98. }
  99. EXPORT_SYMBOL(__par_io_config_pin);
  100. int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
  101. int assignment, int has_irq)
  102. {
  103. if (!par_io || port >= num_par_io_ports)
  104. return -EINVAL;
  105. __par_io_config_pin(&par_io[port], pin, dir, open_drain, assignment,
  106. has_irq);
  107. return 0;
  108. }
  109. EXPORT_SYMBOL(par_io_config_pin);
  110. int par_io_data_set(u8 port, u8 pin, u8 val)
  111. {
  112. u32 pin_mask, tmp_val;
  113. if (port >= num_par_io_ports)
  114. return -EINVAL;
  115. if (pin >= QE_PIO_PINS)
  116. return -EINVAL;
  117. /* calculate pin location */
  118. pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin));
  119. tmp_val = in_be32(&par_io[port].cpdata);
  120. if (val == 0) /* clear */
  121. out_be32(&par_io[port].cpdata, ~pin_mask & tmp_val);
  122. else /* set */
  123. out_be32(&par_io[port].cpdata, pin_mask | tmp_val);
  124. return 0;
  125. }
  126. EXPORT_SYMBOL(par_io_data_set);
  127. int par_io_of_config(struct device_node *np)
  128. {
  129. struct device_node *pio;
  130. const phandle *ph;
  131. int pio_map_len;
  132. const unsigned int *pio_map;
  133. if (par_io == NULL) {
  134. printk(KERN_ERR "par_io not initialized\n");
  135. return -1;
  136. }
  137. ph = of_get_property(np, "pio-handle", NULL);
  138. if (ph == NULL) {
  139. printk(KERN_ERR "pio-handle not available\n");
  140. return -1;
  141. }
  142. pio = of_find_node_by_phandle(*ph);
  143. pio_map = of_get_property(pio, "pio-map", &pio_map_len);
  144. if (pio_map == NULL) {
  145. printk(KERN_ERR "pio-map is not set!\n");
  146. return -1;
  147. }
  148. pio_map_len /= sizeof(unsigned int);
  149. if ((pio_map_len % 6) != 0) {
  150. printk(KERN_ERR "pio-map format wrong!\n");
  151. return -1;
  152. }
  153. while (pio_map_len > 0) {
  154. par_io_config_pin((u8) pio_map[0], (u8) pio_map[1],
  155. (int) pio_map[2], (int) pio_map[3],
  156. (int) pio_map[4], (int) pio_map[5]);
  157. pio_map += 6;
  158. pio_map_len -= 6;
  159. }
  160. of_node_put(pio);
  161. return 0;
  162. }
  163. EXPORT_SYMBOL(par_io_of_config);