smp.c 30 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/err.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/cpu.h>
  30. #include <linux/slab.h>
  31. #include <linux/crash_dump.h>
  32. #include <linux/memblock.h>
  33. #include <asm/asm-offsets.h>
  34. #include <asm/diag.h>
  35. #include <asm/switch_to.h>
  36. #include <asm/facility.h>
  37. #include <asm/ipl.h>
  38. #include <asm/setup.h>
  39. #include <asm/irq.h>
  40. #include <asm/tlbflush.h>
  41. #include <asm/vtimer.h>
  42. #include <asm/lowcore.h>
  43. #include <asm/sclp.h>
  44. #include <asm/vdso.h>
  45. #include <asm/debug.h>
  46. #include <asm/os_info.h>
  47. #include <asm/sigp.h>
  48. #include <asm/idle.h>
  49. #include "entry.h"
  50. enum {
  51. ec_schedule = 0,
  52. ec_call_function_single,
  53. ec_stop_cpu,
  54. };
  55. enum {
  56. CPU_STATE_STANDBY,
  57. CPU_STATE_CONFIGURED,
  58. };
  59. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  60. struct pcpu {
  61. struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
  62. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  63. signed char state; /* physical cpu state */
  64. signed char polarization; /* physical polarization */
  65. u16 address; /* physical cpu address */
  66. };
  67. static u8 boot_core_type;
  68. static struct pcpu pcpu_devices[NR_CPUS];
  69. unsigned int smp_cpu_mt_shift;
  70. EXPORT_SYMBOL(smp_cpu_mt_shift);
  71. unsigned int smp_cpu_mtid;
  72. EXPORT_SYMBOL(smp_cpu_mtid);
  73. static unsigned int smp_max_threads __initdata = -1U;
  74. static int __init early_nosmt(char *s)
  75. {
  76. smp_max_threads = 1;
  77. return 0;
  78. }
  79. early_param("nosmt", early_nosmt);
  80. static int __init early_smt(char *s)
  81. {
  82. get_option(&s, &smp_max_threads);
  83. return 0;
  84. }
  85. early_param("smt", early_smt);
  86. /*
  87. * The smp_cpu_state_mutex must be held when changing the state or polarization
  88. * member of a pcpu data structure within the pcpu_devices arreay.
  89. */
  90. DEFINE_MUTEX(smp_cpu_state_mutex);
  91. /*
  92. * Signal processor helper functions.
  93. */
  94. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm,
  95. u32 *status)
  96. {
  97. int cc;
  98. while (1) {
  99. cc = __pcpu_sigp(addr, order, parm, NULL);
  100. if (cc != SIGP_CC_BUSY)
  101. return cc;
  102. cpu_relax();
  103. }
  104. }
  105. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  106. {
  107. int cc, retry;
  108. for (retry = 0; ; retry++) {
  109. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  110. if (cc != SIGP_CC_BUSY)
  111. break;
  112. if (retry >= 3)
  113. udelay(10);
  114. }
  115. return cc;
  116. }
  117. static inline int pcpu_stopped(struct pcpu *pcpu)
  118. {
  119. u32 uninitialized_var(status);
  120. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  121. 0, &status) != SIGP_CC_STATUS_STORED)
  122. return 0;
  123. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  124. }
  125. static inline int pcpu_running(struct pcpu *pcpu)
  126. {
  127. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  128. 0, NULL) != SIGP_CC_STATUS_STORED)
  129. return 1;
  130. /* Status stored condition code is equivalent to cpu not running. */
  131. return 0;
  132. }
  133. /*
  134. * Find struct pcpu by cpu address.
  135. */
  136. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  137. {
  138. int cpu;
  139. for_each_cpu(cpu, mask)
  140. if (pcpu_devices[cpu].address == address)
  141. return pcpu_devices + cpu;
  142. return NULL;
  143. }
  144. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  145. {
  146. int order;
  147. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  148. return;
  149. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  150. pcpu_sigp_retry(pcpu, order, 0);
  151. }
  152. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  153. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  154. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  155. {
  156. unsigned long async_stack, panic_stack;
  157. struct _lowcore *lc;
  158. if (pcpu != &pcpu_devices[0]) {
  159. pcpu->lowcore = (struct _lowcore *)
  160. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  161. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  162. panic_stack = __get_free_page(GFP_KERNEL);
  163. if (!pcpu->lowcore || !panic_stack || !async_stack)
  164. goto out;
  165. } else {
  166. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  167. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  168. }
  169. lc = pcpu->lowcore;
  170. memcpy(lc, &S390_lowcore, 512);
  171. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  172. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  173. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  174. lc->cpu_nr = cpu;
  175. lc->spinlock_lockval = arch_spin_lockval(cpu);
  176. lc->br_r1_trampoline = 0x07f1; /* br %r1 */
  177. if (MACHINE_HAS_VX)
  178. lc->vector_save_area_addr =
  179. (unsigned long) &lc->vector_save_area;
  180. if (vdso_alloc_per_cpu(lc))
  181. goto out;
  182. lowcore_ptr[cpu] = lc;
  183. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  184. return 0;
  185. out:
  186. if (pcpu != &pcpu_devices[0]) {
  187. free_page(panic_stack);
  188. free_pages(async_stack, ASYNC_ORDER);
  189. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  190. }
  191. return -ENOMEM;
  192. }
  193. #ifdef CONFIG_HOTPLUG_CPU
  194. static void pcpu_free_lowcore(struct pcpu *pcpu)
  195. {
  196. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  197. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  198. vdso_free_per_cpu(pcpu->lowcore);
  199. if (pcpu == &pcpu_devices[0])
  200. return;
  201. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  202. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  203. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  204. }
  205. #endif /* CONFIG_HOTPLUG_CPU */
  206. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  207. {
  208. struct _lowcore *lc = pcpu->lowcore;
  209. if (MACHINE_HAS_TLB_LC)
  210. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  211. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  212. atomic_inc(&init_mm.context.attach_count);
  213. lc->cpu_nr = cpu;
  214. lc->spinlock_lockval = arch_spin_lockval(cpu);
  215. lc->percpu_offset = __per_cpu_offset[cpu];
  216. lc->kernel_asce = S390_lowcore.kernel_asce;
  217. lc->machine_flags = S390_lowcore.machine_flags;
  218. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  219. __ctl_store(lc->cregs_save_area, 0, 15);
  220. save_access_regs((unsigned int *) lc->access_regs_save_area);
  221. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  222. sizeof(lc->stfle_fac_list));
  223. memcpy(lc->alt_stfle_fac_list, S390_lowcore.alt_stfle_fac_list,
  224. sizeof(lc->alt_stfle_fac_list));
  225. }
  226. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  227. {
  228. struct _lowcore *lc = pcpu->lowcore;
  229. struct thread_info *ti = task_thread_info(tsk);
  230. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  231. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  232. lc->thread_info = (unsigned long) task_thread_info(tsk);
  233. lc->current_task = (unsigned long) tsk;
  234. lc->lpp = LPP_MAGIC;
  235. lc->current_pid = tsk->pid;
  236. lc->user_timer = ti->user_timer;
  237. lc->system_timer = ti->system_timer;
  238. lc->steal_timer = 0;
  239. }
  240. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  241. {
  242. struct _lowcore *lc = pcpu->lowcore;
  243. lc->restart_stack = lc->kernel_stack;
  244. lc->restart_fn = (unsigned long) func;
  245. lc->restart_data = (unsigned long) data;
  246. lc->restart_source = -1UL;
  247. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  248. }
  249. /*
  250. * Call function via PSW restart on pcpu and stop the current cpu.
  251. */
  252. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  253. void *data, unsigned long stack)
  254. {
  255. struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  256. unsigned long source_cpu = stap();
  257. __load_psw_mask(PSW_KERNEL_BITS);
  258. if (pcpu->address == source_cpu)
  259. func(data); /* should not return */
  260. /* Stop target cpu (if func returns this stops the current cpu). */
  261. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  262. /* Restart func on the target cpu and stop the current cpu. */
  263. mem_assign_absolute(lc->restart_stack, stack);
  264. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  265. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  266. mem_assign_absolute(lc->restart_source, source_cpu);
  267. __bpon();
  268. asm volatile(
  269. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  270. " brc 2,0b # busy, try again\n"
  271. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  272. " brc 2,1b # busy, try again\n"
  273. : : "d" (pcpu->address), "d" (source_cpu),
  274. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  275. : "0", "1", "cc");
  276. for (;;) ;
  277. }
  278. /*
  279. * Enable additional logical cpus for multi-threading.
  280. */
  281. static int pcpu_set_smt(unsigned int mtid)
  282. {
  283. register unsigned long reg1 asm ("1") = (unsigned long) mtid;
  284. int cc;
  285. if (smp_cpu_mtid == mtid)
  286. return 0;
  287. asm volatile(
  288. " sigp %1,0,%2 # sigp set multi-threading\n"
  289. " ipm %0\n"
  290. " srl %0,28\n"
  291. : "=d" (cc) : "d" (reg1), "K" (SIGP_SET_MULTI_THREADING)
  292. : "cc");
  293. if (cc == 0) {
  294. smp_cpu_mtid = mtid;
  295. smp_cpu_mt_shift = 0;
  296. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  297. smp_cpu_mt_shift++;
  298. pcpu_devices[0].address = stap();
  299. }
  300. return cc;
  301. }
  302. /*
  303. * Call function on an online CPU.
  304. */
  305. void smp_call_online_cpu(void (*func)(void *), void *data)
  306. {
  307. struct pcpu *pcpu;
  308. /* Use the current cpu if it is online. */
  309. pcpu = pcpu_find_address(cpu_online_mask, stap());
  310. if (!pcpu)
  311. /* Use the first online cpu. */
  312. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  313. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  314. }
  315. /*
  316. * Call function on the ipl CPU.
  317. */
  318. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  319. {
  320. struct _lowcore *lc = pcpu_devices->lowcore;
  321. if (pcpu_devices[0].address == stap())
  322. lc = &S390_lowcore;
  323. pcpu_delegate(&pcpu_devices[0], func, data,
  324. lc->panic_stack - PANIC_FRAME_OFFSET + PAGE_SIZE);
  325. }
  326. int smp_find_processor_id(u16 address)
  327. {
  328. int cpu;
  329. for_each_present_cpu(cpu)
  330. if (pcpu_devices[cpu].address == address)
  331. return cpu;
  332. return -1;
  333. }
  334. int smp_vcpu_scheduled(int cpu)
  335. {
  336. return pcpu_running(pcpu_devices + cpu);
  337. }
  338. void smp_yield_cpu(int cpu)
  339. {
  340. if (MACHINE_HAS_DIAG9C) {
  341. diag_stat_inc_norecursion(DIAG_STAT_X09C);
  342. asm volatile("diag %0,0,0x9c"
  343. : : "d" (pcpu_devices[cpu].address));
  344. } else if (MACHINE_HAS_DIAG44) {
  345. diag_stat_inc_norecursion(DIAG_STAT_X044);
  346. asm volatile("diag 0,0,0x44");
  347. }
  348. }
  349. /*
  350. * Send cpus emergency shutdown signal. This gives the cpus the
  351. * opportunity to complete outstanding interrupts.
  352. */
  353. static void smp_emergency_stop(cpumask_t *cpumask)
  354. {
  355. u64 end;
  356. int cpu;
  357. end = get_tod_clock() + (1000000UL << 12);
  358. for_each_cpu(cpu, cpumask) {
  359. struct pcpu *pcpu = pcpu_devices + cpu;
  360. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  361. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  362. 0, NULL) == SIGP_CC_BUSY &&
  363. get_tod_clock() < end)
  364. cpu_relax();
  365. }
  366. while (get_tod_clock() < end) {
  367. for_each_cpu(cpu, cpumask)
  368. if (pcpu_stopped(pcpu_devices + cpu))
  369. cpumask_clear_cpu(cpu, cpumask);
  370. if (cpumask_empty(cpumask))
  371. break;
  372. cpu_relax();
  373. }
  374. }
  375. /*
  376. * Stop all cpus but the current one.
  377. */
  378. void smp_send_stop(void)
  379. {
  380. cpumask_t cpumask;
  381. int cpu;
  382. /* Disable all interrupts/machine checks */
  383. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  384. trace_hardirqs_off();
  385. debug_set_critical();
  386. cpumask_copy(&cpumask, cpu_online_mask);
  387. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  388. if (oops_in_progress)
  389. smp_emergency_stop(&cpumask);
  390. /* stop all processors */
  391. for_each_cpu(cpu, &cpumask) {
  392. struct pcpu *pcpu = pcpu_devices + cpu;
  393. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  394. while (!pcpu_stopped(pcpu))
  395. cpu_relax();
  396. }
  397. }
  398. /*
  399. * This is the main routine where commands issued by other
  400. * cpus are handled.
  401. */
  402. static void smp_handle_ext_call(void)
  403. {
  404. unsigned long bits;
  405. /* handle bit signal external calls */
  406. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  407. if (test_bit(ec_stop_cpu, &bits))
  408. smp_stop_cpu();
  409. if (test_bit(ec_schedule, &bits))
  410. scheduler_ipi();
  411. if (test_bit(ec_call_function_single, &bits))
  412. generic_smp_call_function_single_interrupt();
  413. }
  414. static void do_ext_call_interrupt(struct ext_code ext_code,
  415. unsigned int param32, unsigned long param64)
  416. {
  417. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  418. smp_handle_ext_call();
  419. }
  420. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  421. {
  422. int cpu;
  423. for_each_cpu(cpu, mask)
  424. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  425. }
  426. void arch_send_call_function_single_ipi(int cpu)
  427. {
  428. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  429. }
  430. /*
  431. * this function sends a 'reschedule' IPI to another CPU.
  432. * it goes straight through and wastes no time serializing
  433. * anything. Worst case is that we lose a reschedule ...
  434. */
  435. void smp_send_reschedule(int cpu)
  436. {
  437. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  438. }
  439. /*
  440. * parameter area for the set/clear control bit callbacks
  441. */
  442. struct ec_creg_mask_parms {
  443. unsigned long orval;
  444. unsigned long andval;
  445. int cr;
  446. };
  447. /*
  448. * callback for setting/clearing control bits
  449. */
  450. static void smp_ctl_bit_callback(void *info)
  451. {
  452. struct ec_creg_mask_parms *pp = info;
  453. unsigned long cregs[16];
  454. __ctl_store(cregs, 0, 15);
  455. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  456. __ctl_load(cregs, 0, 15);
  457. }
  458. /*
  459. * Set a bit in a control register of all cpus
  460. */
  461. void smp_ctl_set_bit(int cr, int bit)
  462. {
  463. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  464. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  465. }
  466. EXPORT_SYMBOL(smp_ctl_set_bit);
  467. /*
  468. * Clear a bit in a control register of all cpus
  469. */
  470. void smp_ctl_clear_bit(int cr, int bit)
  471. {
  472. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  473. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  474. }
  475. EXPORT_SYMBOL(smp_ctl_clear_bit);
  476. #ifdef CONFIG_CRASH_DUMP
  477. static void __init __smp_store_cpu_state(struct save_area_ext *sa_ext,
  478. u16 address, int is_boot_cpu)
  479. {
  480. void *lc = (void *)(unsigned long) store_prefix();
  481. unsigned long vx_sa;
  482. if (is_boot_cpu) {
  483. /* Copy the registers of the boot CPU. */
  484. copy_oldmem_page(1, (void *) &sa_ext->sa, sizeof(sa_ext->sa),
  485. SAVE_AREA_BASE - PAGE_SIZE, 0);
  486. if (MACHINE_HAS_VX)
  487. save_vx_regs_safe(sa_ext->vx_regs);
  488. return;
  489. }
  490. /* Get the registers of a non-boot cpu. */
  491. __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
  492. memcpy_real(&sa_ext->sa, lc + SAVE_AREA_BASE, sizeof(sa_ext->sa));
  493. if (!MACHINE_HAS_VX)
  494. return;
  495. /* Get the VX registers */
  496. vx_sa = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
  497. if (!vx_sa)
  498. panic("could not allocate memory for VX save area\n");
  499. __pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL);
  500. memcpy(sa_ext->vx_regs, (void *) vx_sa, sizeof(sa_ext->vx_regs));
  501. memblock_free(vx_sa, PAGE_SIZE);
  502. }
  503. int smp_store_status(int cpu)
  504. {
  505. unsigned long vx_sa;
  506. struct pcpu *pcpu;
  507. pcpu = pcpu_devices + cpu;
  508. if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
  509. 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
  510. return -EIO;
  511. if (!MACHINE_HAS_VX)
  512. return 0;
  513. vx_sa = __pa(pcpu->lowcore->vector_save_area_addr);
  514. __pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  515. vx_sa, NULL);
  516. return 0;
  517. }
  518. #endif /* CONFIG_CRASH_DUMP */
  519. /*
  520. * Collect CPU state of the previous, crashed system.
  521. * There are four cases:
  522. * 1) standard zfcp dump
  523. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  524. * The state for all CPUs except the boot CPU needs to be collected
  525. * with sigp stop-and-store-status. The boot CPU state is located in
  526. * the absolute lowcore of the memory stored in the HSA. The zcore code
  527. * will allocate the save area and copy the boot CPU state from the HSA.
  528. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  529. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  530. * The state for all CPUs except the boot CPU needs to be collected
  531. * with sigp stop-and-store-status. The firmware or the boot-loader
  532. * stored the registers of the boot CPU in the absolute lowcore in the
  533. * memory of the old system.
  534. * 3) kdump and the old kernel did not store the CPU state,
  535. * or stand-alone kdump for DASD
  536. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  537. * The state for all CPUs except the boot CPU needs to be collected
  538. * with sigp stop-and-store-status. The kexec code or the boot-loader
  539. * stored the registers of the boot CPU in the memory of the old system.
  540. * 4) kdump and the old kernel stored the CPU state
  541. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  542. * The state of all CPUs is stored in ELF sections in the memory of the
  543. * old system. The ELF sections are picked up by the crash_dump code
  544. * via elfcorehdr_addr.
  545. */
  546. void __init smp_save_dump_cpus(void)
  547. {
  548. #ifdef CONFIG_CRASH_DUMP
  549. int addr, cpu, boot_cpu_addr, max_cpu_addr;
  550. struct save_area_ext *sa_ext;
  551. bool is_boot_cpu;
  552. if (is_kdump_kernel())
  553. /* Previous system stored the CPU states. Nothing to do. */
  554. return;
  555. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  556. /* No previous system present, normal boot. */
  557. return;
  558. /* Set multi-threading state to the previous system. */
  559. pcpu_set_smt(sclp.mtid_prev);
  560. max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
  561. for (cpu = 0, addr = 0; addr <= max_cpu_addr; addr++) {
  562. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==
  563. SIGP_CC_NOT_OPERATIONAL)
  564. continue;
  565. cpu += 1;
  566. }
  567. dump_save_areas.areas = (void *)memblock_alloc(sizeof(void *) * cpu, 8);
  568. dump_save_areas.count = cpu;
  569. boot_cpu_addr = stap();
  570. for (cpu = 0, addr = 0; addr <= max_cpu_addr; addr++) {
  571. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==
  572. SIGP_CC_NOT_OPERATIONAL)
  573. continue;
  574. sa_ext = (void *) memblock_alloc(sizeof(*sa_ext), 8);
  575. dump_save_areas.areas[cpu] = sa_ext;
  576. if (!sa_ext)
  577. panic("could not allocate memory for save area\n");
  578. is_boot_cpu = (addr == boot_cpu_addr);
  579. cpu += 1;
  580. if (is_boot_cpu && !OLDMEM_BASE)
  581. /* Skip boot CPU for standard zfcp dump. */
  582. continue;
  583. /* Get state for this CPU. */
  584. __smp_store_cpu_state(sa_ext, addr, is_boot_cpu);
  585. }
  586. diag308_reset();
  587. pcpu_set_smt(0);
  588. #endif /* CONFIG_CRASH_DUMP */
  589. }
  590. void smp_cpu_set_polarization(int cpu, int val)
  591. {
  592. pcpu_devices[cpu].polarization = val;
  593. }
  594. int smp_cpu_get_polarization(int cpu)
  595. {
  596. return pcpu_devices[cpu].polarization;
  597. }
  598. static struct sclp_core_info *smp_get_core_info(void)
  599. {
  600. static int use_sigp_detection;
  601. struct sclp_core_info *info;
  602. int address;
  603. info = kzalloc(sizeof(*info), GFP_KERNEL);
  604. if (info && (use_sigp_detection || sclp_get_core_info(info))) {
  605. use_sigp_detection = 1;
  606. for (address = 0;
  607. address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
  608. address += (1U << smp_cpu_mt_shift)) {
  609. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
  610. SIGP_CC_NOT_OPERATIONAL)
  611. continue;
  612. info->core[info->configured].core_id =
  613. address >> smp_cpu_mt_shift;
  614. info->configured++;
  615. }
  616. info->combined = info->configured;
  617. }
  618. return info;
  619. }
  620. static int smp_add_present_cpu(int cpu);
  621. static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
  622. {
  623. struct pcpu *pcpu;
  624. cpumask_t avail;
  625. int cpu, nr, i, j;
  626. u16 address;
  627. nr = 0;
  628. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  629. cpu = cpumask_first(&avail);
  630. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  631. if (sclp.has_core_type && info->core[i].type != boot_core_type)
  632. continue;
  633. address = info->core[i].core_id << smp_cpu_mt_shift;
  634. for (j = 0; j <= smp_cpu_mtid; j++) {
  635. if (pcpu_find_address(cpu_present_mask, address + j))
  636. continue;
  637. pcpu = pcpu_devices + cpu;
  638. pcpu->address = address + j;
  639. pcpu->state =
  640. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  641. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  642. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  643. set_cpu_present(cpu, true);
  644. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  645. set_cpu_present(cpu, false);
  646. else
  647. nr++;
  648. cpu = cpumask_next(cpu, &avail);
  649. if (cpu >= nr_cpu_ids)
  650. break;
  651. }
  652. }
  653. return nr;
  654. }
  655. static void __init smp_detect_cpus(void)
  656. {
  657. unsigned int cpu, mtid, c_cpus, s_cpus;
  658. struct sclp_core_info *info;
  659. u16 address;
  660. /* Get CPU information */
  661. info = smp_get_core_info();
  662. if (!info)
  663. panic("smp_detect_cpus failed to allocate memory\n");
  664. /* Find boot CPU type */
  665. if (sclp.has_core_type) {
  666. address = stap();
  667. for (cpu = 0; cpu < info->combined; cpu++)
  668. if (info->core[cpu].core_id == address) {
  669. /* The boot cpu dictates the cpu type. */
  670. boot_core_type = info->core[cpu].type;
  671. break;
  672. }
  673. if (cpu >= info->combined)
  674. panic("Could not find boot CPU type");
  675. }
  676. /* Set multi-threading state for the current system */
  677. mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
  678. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  679. pcpu_set_smt(mtid);
  680. /* Print number of CPUs */
  681. c_cpus = s_cpus = 0;
  682. for (cpu = 0; cpu < info->combined; cpu++) {
  683. if (sclp.has_core_type &&
  684. info->core[cpu].type != boot_core_type)
  685. continue;
  686. if (cpu < info->configured)
  687. c_cpus += smp_cpu_mtid + 1;
  688. else
  689. s_cpus += smp_cpu_mtid + 1;
  690. }
  691. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  692. /* Add CPUs present at boot */
  693. get_online_cpus();
  694. __smp_rescan_cpus(info, 0);
  695. put_online_cpus();
  696. kfree(info);
  697. }
  698. /*
  699. * Activate a secondary processor.
  700. */
  701. static void smp_start_secondary(void *cpuvoid)
  702. {
  703. S390_lowcore.last_update_clock = get_tod_clock();
  704. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  705. S390_lowcore.restart_fn = (unsigned long) do_restart;
  706. S390_lowcore.restart_data = 0;
  707. S390_lowcore.restart_source = -1UL;
  708. restore_access_regs(S390_lowcore.access_regs_save_area);
  709. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  710. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  711. cpu_init();
  712. preempt_disable();
  713. init_cpu_timer();
  714. vtime_init();
  715. pfault_init();
  716. notify_cpu_starting(smp_processor_id());
  717. set_cpu_online(smp_processor_id(), true);
  718. inc_irq_stat(CPU_RST);
  719. local_irq_enable();
  720. cpu_startup_entry(CPUHP_ONLINE);
  721. }
  722. /* Upping and downing of CPUs */
  723. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  724. {
  725. struct pcpu *pcpu;
  726. int base, i, rc;
  727. pcpu = pcpu_devices + cpu;
  728. if (pcpu->state != CPU_STATE_CONFIGURED)
  729. return -EIO;
  730. base = cpu - (cpu % (smp_cpu_mtid + 1));
  731. for (i = 0; i <= smp_cpu_mtid; i++) {
  732. if (base + i < nr_cpu_ids)
  733. if (cpu_online(base + i))
  734. break;
  735. }
  736. /*
  737. * If this is the first CPU of the core to get online
  738. * do an initial CPU reset.
  739. */
  740. if (i > smp_cpu_mtid &&
  741. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  742. SIGP_CC_ORDER_CODE_ACCEPTED)
  743. return -EIO;
  744. rc = pcpu_alloc_lowcore(pcpu, cpu);
  745. if (rc)
  746. return rc;
  747. pcpu_prepare_secondary(pcpu, cpu);
  748. pcpu_attach_task(pcpu, tidle);
  749. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  750. /* Wait until cpu puts itself in the online & active maps */
  751. while (!cpu_online(cpu) || !cpu_active(cpu))
  752. cpu_relax();
  753. return 0;
  754. }
  755. static unsigned int setup_possible_cpus __initdata;
  756. static int __init _setup_possible_cpus(char *s)
  757. {
  758. get_option(&s, &setup_possible_cpus);
  759. return 0;
  760. }
  761. early_param("possible_cpus", _setup_possible_cpus);
  762. #ifdef CONFIG_HOTPLUG_CPU
  763. int __cpu_disable(void)
  764. {
  765. unsigned long cregs[16];
  766. /* Handle possible pending IPIs */
  767. smp_handle_ext_call();
  768. set_cpu_online(smp_processor_id(), false);
  769. /* Disable pseudo page faults on this cpu. */
  770. pfault_fini();
  771. /* Disable interrupt sources via control register. */
  772. __ctl_store(cregs, 0, 15);
  773. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  774. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  775. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  776. __ctl_load(cregs, 0, 15);
  777. clear_cpu_flag(CIF_NOHZ_DELAY);
  778. return 0;
  779. }
  780. void __cpu_die(unsigned int cpu)
  781. {
  782. struct pcpu *pcpu;
  783. /* Wait until target cpu is down */
  784. pcpu = pcpu_devices + cpu;
  785. while (!pcpu_stopped(pcpu))
  786. cpu_relax();
  787. pcpu_free_lowcore(pcpu);
  788. atomic_dec(&init_mm.context.attach_count);
  789. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  790. if (MACHINE_HAS_TLB_LC)
  791. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  792. }
  793. void __noreturn cpu_die(void)
  794. {
  795. idle_task_exit();
  796. __bpon();
  797. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  798. for (;;) ;
  799. }
  800. #endif /* CONFIG_HOTPLUG_CPU */
  801. void __init smp_fill_possible_mask(void)
  802. {
  803. unsigned int possible, sclp_max, cpu;
  804. sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
  805. sclp_max = min(smp_max_threads, sclp_max);
  806. sclp_max = sclp.max_cores * sclp_max ?: nr_cpu_ids;
  807. possible = setup_possible_cpus ?: nr_cpu_ids;
  808. possible = min(possible, sclp_max);
  809. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  810. set_cpu_possible(cpu, true);
  811. }
  812. void __init smp_prepare_cpus(unsigned int max_cpus)
  813. {
  814. /* request the 0x1201 emergency signal external interrupt */
  815. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  816. panic("Couldn't request external interrupt 0x1201");
  817. /* request the 0x1202 external call external interrupt */
  818. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  819. panic("Couldn't request external interrupt 0x1202");
  820. smp_detect_cpus();
  821. }
  822. void __init smp_prepare_boot_cpu(void)
  823. {
  824. struct pcpu *pcpu = pcpu_devices;
  825. pcpu->state = CPU_STATE_CONFIGURED;
  826. pcpu->address = stap();
  827. pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
  828. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  829. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  830. set_cpu_present(0, true);
  831. set_cpu_online(0, true);
  832. }
  833. void __init smp_cpus_done(unsigned int max_cpus)
  834. {
  835. }
  836. void __init smp_setup_processor_id(void)
  837. {
  838. S390_lowcore.cpu_nr = 0;
  839. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  840. }
  841. /*
  842. * the frequency of the profiling timer can be changed
  843. * by writing a multiplier value into /proc/profile.
  844. *
  845. * usually you want to run this on all CPUs ;)
  846. */
  847. int setup_profiling_timer(unsigned int multiplier)
  848. {
  849. return 0;
  850. }
  851. #ifdef CONFIG_HOTPLUG_CPU
  852. static ssize_t cpu_configure_show(struct device *dev,
  853. struct device_attribute *attr, char *buf)
  854. {
  855. ssize_t count;
  856. mutex_lock(&smp_cpu_state_mutex);
  857. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  858. mutex_unlock(&smp_cpu_state_mutex);
  859. return count;
  860. }
  861. static ssize_t cpu_configure_store(struct device *dev,
  862. struct device_attribute *attr,
  863. const char *buf, size_t count)
  864. {
  865. struct pcpu *pcpu;
  866. int cpu, val, rc, i;
  867. char delim;
  868. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  869. return -EINVAL;
  870. if (val != 0 && val != 1)
  871. return -EINVAL;
  872. get_online_cpus();
  873. mutex_lock(&smp_cpu_state_mutex);
  874. rc = -EBUSY;
  875. /* disallow configuration changes of online cpus and cpu 0 */
  876. cpu = dev->id;
  877. cpu -= cpu % (smp_cpu_mtid + 1);
  878. if (cpu == 0)
  879. goto out;
  880. for (i = 0; i <= smp_cpu_mtid; i++)
  881. if (cpu_online(cpu + i))
  882. goto out;
  883. pcpu = pcpu_devices + cpu;
  884. rc = 0;
  885. switch (val) {
  886. case 0:
  887. if (pcpu->state != CPU_STATE_CONFIGURED)
  888. break;
  889. rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  890. if (rc)
  891. break;
  892. for (i = 0; i <= smp_cpu_mtid; i++) {
  893. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  894. continue;
  895. pcpu[i].state = CPU_STATE_STANDBY;
  896. smp_cpu_set_polarization(cpu + i,
  897. POLARIZATION_UNKNOWN);
  898. }
  899. topology_expect_change();
  900. break;
  901. case 1:
  902. if (pcpu->state != CPU_STATE_STANDBY)
  903. break;
  904. rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
  905. if (rc)
  906. break;
  907. for (i = 0; i <= smp_cpu_mtid; i++) {
  908. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  909. continue;
  910. pcpu[i].state = CPU_STATE_CONFIGURED;
  911. smp_cpu_set_polarization(cpu + i,
  912. POLARIZATION_UNKNOWN);
  913. }
  914. topology_expect_change();
  915. break;
  916. default:
  917. break;
  918. }
  919. out:
  920. mutex_unlock(&smp_cpu_state_mutex);
  921. put_online_cpus();
  922. return rc ? rc : count;
  923. }
  924. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  925. #endif /* CONFIG_HOTPLUG_CPU */
  926. static ssize_t show_cpu_address(struct device *dev,
  927. struct device_attribute *attr, char *buf)
  928. {
  929. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  930. }
  931. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  932. static struct attribute *cpu_common_attrs[] = {
  933. #ifdef CONFIG_HOTPLUG_CPU
  934. &dev_attr_configure.attr,
  935. #endif
  936. &dev_attr_address.attr,
  937. NULL,
  938. };
  939. static struct attribute_group cpu_common_attr_group = {
  940. .attrs = cpu_common_attrs,
  941. };
  942. static struct attribute *cpu_online_attrs[] = {
  943. &dev_attr_idle_count.attr,
  944. &dev_attr_idle_time_us.attr,
  945. NULL,
  946. };
  947. static struct attribute_group cpu_online_attr_group = {
  948. .attrs = cpu_online_attrs,
  949. };
  950. static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
  951. void *hcpu)
  952. {
  953. unsigned int cpu = (unsigned int)(long)hcpu;
  954. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  955. int err = 0;
  956. switch (action & ~CPU_TASKS_FROZEN) {
  957. case CPU_ONLINE:
  958. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  959. break;
  960. case CPU_DEAD:
  961. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  962. break;
  963. }
  964. return notifier_from_errno(err);
  965. }
  966. static int smp_add_present_cpu(int cpu)
  967. {
  968. struct device *s;
  969. struct cpu *c;
  970. int rc;
  971. c = kzalloc(sizeof(*c), GFP_KERNEL);
  972. if (!c)
  973. return -ENOMEM;
  974. per_cpu(cpu_device, cpu) = c;
  975. s = &c->dev;
  976. c->hotpluggable = 1;
  977. rc = register_cpu(c, cpu);
  978. if (rc)
  979. goto out;
  980. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  981. if (rc)
  982. goto out_cpu;
  983. if (cpu_online(cpu)) {
  984. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  985. if (rc)
  986. goto out_online;
  987. }
  988. rc = topology_cpu_init(c);
  989. if (rc)
  990. goto out_topology;
  991. return 0;
  992. out_topology:
  993. if (cpu_online(cpu))
  994. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  995. out_online:
  996. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  997. out_cpu:
  998. #ifdef CONFIG_HOTPLUG_CPU
  999. unregister_cpu(c);
  1000. #endif
  1001. out:
  1002. return rc;
  1003. }
  1004. #ifdef CONFIG_HOTPLUG_CPU
  1005. int __ref smp_rescan_cpus(void)
  1006. {
  1007. struct sclp_core_info *info;
  1008. int nr;
  1009. info = smp_get_core_info();
  1010. if (!info)
  1011. return -ENOMEM;
  1012. get_online_cpus();
  1013. mutex_lock(&smp_cpu_state_mutex);
  1014. nr = __smp_rescan_cpus(info, 1);
  1015. mutex_unlock(&smp_cpu_state_mutex);
  1016. put_online_cpus();
  1017. kfree(info);
  1018. if (nr)
  1019. topology_schedule_update();
  1020. return 0;
  1021. }
  1022. static ssize_t __ref rescan_store(struct device *dev,
  1023. struct device_attribute *attr,
  1024. const char *buf,
  1025. size_t count)
  1026. {
  1027. int rc;
  1028. rc = lock_device_hotplug_sysfs();
  1029. if (rc)
  1030. return rc;
  1031. rc = smp_rescan_cpus();
  1032. unlock_device_hotplug();
  1033. return rc ? rc : count;
  1034. }
  1035. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  1036. #endif /* CONFIG_HOTPLUG_CPU */
  1037. static int __init s390_smp_init(void)
  1038. {
  1039. int cpu, rc = 0;
  1040. #ifdef CONFIG_HOTPLUG_CPU
  1041. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1042. if (rc)
  1043. return rc;
  1044. #endif
  1045. cpu_notifier_register_begin();
  1046. for_each_present_cpu(cpu) {
  1047. rc = smp_add_present_cpu(cpu);
  1048. if (rc)
  1049. goto out;
  1050. }
  1051. __hotcpu_notifier(smp_cpu_notify, 0);
  1052. out:
  1053. cpu_notifier_register_done();
  1054. return rc;
  1055. }
  1056. subsys_initcall(s390_smp_init);