swsusp.S 6.7 KB

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  1. /*
  2. * S390 64-bit swsusp implementation
  3. *
  4. * Copyright IBM Corp. 2009
  5. *
  6. * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
  7. * Michael Holzheu <holzheu@linux.vnet.ibm.com>
  8. */
  9. #include <linux/linkage.h>
  10. #include <asm/page.h>
  11. #include <asm/ptrace.h>
  12. #include <asm/thread_info.h>
  13. #include <asm/asm-offsets.h>
  14. #include <asm/nospec-insn.h>
  15. #include <asm/sigp.h>
  16. /*
  17. * Save register context in absolute 0 lowcore and call swsusp_save() to
  18. * create in-memory kernel image. The context is saved in the designated
  19. * "store status" memory locations (see POP).
  20. * We return from this function twice. The first time during the suspend to
  21. * disk process. The second time via the swsusp_arch_resume() function
  22. * (see below) in the resume process.
  23. * This function runs with disabled interrupts.
  24. */
  25. GEN_BR_THUNK %r14
  26. .section .text
  27. ENTRY(swsusp_arch_suspend)
  28. stmg %r6,%r15,__SF_GPRS(%r15)
  29. lgr %r1,%r15
  30. aghi %r15,-STACK_FRAME_OVERHEAD
  31. stg %r1,__SF_BACKCHAIN(%r15)
  32. /* Store FPU registers */
  33. brasl %r14,save_fpu_regs
  34. /* Deactivate DAT */
  35. stnsm __SF_EMPTY(%r15),0xfb
  36. /* Store prefix register on stack */
  37. stpx __SF_EMPTY(%r15)
  38. /* Save prefix register contents for lowcore copy */
  39. llgf %r10,__SF_EMPTY(%r15)
  40. /* Get pointer to save area */
  41. lghi %r1,0x1000
  42. /* Save CPU address */
  43. stap __LC_EXT_CPU_ADDR(%r0)
  44. /* Store registers */
  45. mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
  46. stam %a0,%a15,0x340(%r1) /* store access registers */
  47. stctg %c0,%c15,0x380(%r1) /* store control registers */
  48. stmg %r0,%r15,0x280(%r1) /* store general registers */
  49. stpt 0x328(%r1) /* store timer */
  50. stck __SF_EMPTY(%r15) /* store clock */
  51. stckc 0x330(%r1) /* store clock comparator */
  52. /* Update cputime accounting before going to sleep */
  53. lg %r0,__LC_LAST_UPDATE_TIMER
  54. slg %r0,0x328(%r1)
  55. alg %r0,__LC_SYSTEM_TIMER
  56. stg %r0,__LC_SYSTEM_TIMER
  57. mvc __LC_LAST_UPDATE_TIMER(8),0x328(%r1)
  58. lg %r0,__LC_LAST_UPDATE_CLOCK
  59. slg %r0,__SF_EMPTY(%r15)
  60. alg %r0,__LC_STEAL_TIMER
  61. stg %r0,__LC_STEAL_TIMER
  62. mvc __LC_LAST_UPDATE_CLOCK(8),__SF_EMPTY(%r15)
  63. /* Activate DAT */
  64. stosm __SF_EMPTY(%r15),0x04
  65. /* Set prefix page to zero */
  66. xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
  67. spx __SF_EMPTY(%r15)
  68. /* Save absolute zero pages */
  69. larl %r2,suspend_zero_pages
  70. lg %r2,0(%r2)
  71. lghi %r4,0
  72. lghi %r3,2*PAGE_SIZE
  73. lghi %r5,2*PAGE_SIZE
  74. 1: mvcle %r2,%r4,0
  75. jo 1b
  76. /* Copy lowcore to absolute zero lowcore */
  77. lghi %r2,0
  78. lgr %r4,%r10
  79. lghi %r3,2*PAGE_SIZE
  80. lghi %r5,2*PAGE_SIZE
  81. 1: mvcle %r2,%r4,0
  82. jo 1b
  83. /* Save image */
  84. brasl %r14,swsusp_save
  85. /* Restore prefix register and return */
  86. lghi %r1,0x1000
  87. spx 0x318(%r1)
  88. lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
  89. lghi %r2,0
  90. BR_EX %r14
  91. /*
  92. * Restore saved memory image to correct place and restore register context.
  93. * Then we return to the function that called swsusp_arch_suspend().
  94. * swsusp_arch_resume() runs with disabled interrupts.
  95. */
  96. ENTRY(swsusp_arch_resume)
  97. stmg %r6,%r15,__SF_GPRS(%r15)
  98. lgr %r1,%r15
  99. aghi %r15,-STACK_FRAME_OVERHEAD
  100. stg %r1,__SF_BACKCHAIN(%r15)
  101. /* Make all free pages stable */
  102. lghi %r2,1
  103. brasl %r14,arch_set_page_states
  104. /* Deactivate DAT */
  105. stnsm __SF_EMPTY(%r15),0xfb
  106. /* Set prefix page to zero */
  107. xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
  108. spx __SF_EMPTY(%r15)
  109. /* Restore saved image */
  110. larl %r1,restore_pblist
  111. lg %r1,0(%r1)
  112. ltgr %r1,%r1
  113. jz 2f
  114. 0:
  115. lg %r2,8(%r1)
  116. lg %r4,0(%r1)
  117. iske %r0,%r4
  118. lghi %r3,PAGE_SIZE
  119. lghi %r5,PAGE_SIZE
  120. 1:
  121. mvcle %r2,%r4,0
  122. jo 1b
  123. lg %r2,8(%r1)
  124. sske %r0,%r2
  125. lg %r1,16(%r1)
  126. ltgr %r1,%r1
  127. jnz 0b
  128. 2:
  129. ptlb /* flush tlb */
  130. /* Reset System */
  131. larl %r1,restart_entry
  132. larl %r2,.Lrestart_diag308_psw
  133. og %r1,0(%r2)
  134. stg %r1,0(%r0)
  135. larl %r1,.Lnew_pgm_check_psw
  136. epsw %r2,%r3
  137. stm %r2,%r3,0(%r1)
  138. mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1)
  139. lghi %r0,0
  140. diag %r0,%r0,0x308
  141. restart_entry:
  142. lhi %r1,1
  143. sigp %r1,%r0,SIGP_SET_ARCHITECTURE
  144. sam64
  145. #ifdef CONFIG_SMP
  146. larl %r1,smp_cpu_mt_shift
  147. icm %r1,15,0(%r1)
  148. jz smt_done
  149. llgfr %r1,%r1
  150. smt_loop:
  151. sigp %r1,%r0,SIGP_SET_MULTI_THREADING
  152. brc 8,smt_done /* accepted */
  153. brc 2,smt_loop /* busy, try again */
  154. smt_done:
  155. #endif
  156. larl %r1,.Lnew_pgm_check_psw
  157. lpswe 0(%r1)
  158. pgm_check_entry:
  159. /* Switch to original suspend CPU */
  160. larl %r1,.Lresume_cpu /* Resume CPU address: r2 */
  161. stap 0(%r1)
  162. llgh %r2,0(%r1)
  163. llgh %r1,__LC_EXT_CPU_ADDR(%r0) /* Suspend CPU address: r1 */
  164. cgr %r1,%r2
  165. je restore_registers /* r1 = r2 -> nothing to do */
  166. larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */
  167. mvc __LC_RST_NEW_PSW(16,%r0),0(%r4)
  168. 3:
  169. sigp %r9,%r1,SIGP_INITIAL_CPU_RESET /* sigp initial cpu reset */
  170. brc 8,4f /* accepted */
  171. brc 2,3b /* busy, try again */
  172. /* Suspend CPU not available -> panic */
  173. larl %r15,init_thread_union
  174. ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER)
  175. larl %r2,.Lpanic_string
  176. lghi %r1,0
  177. sam31
  178. sigp %r1,%r0,SIGP_SET_ARCHITECTURE
  179. brasl %r14,_sclp_print_early
  180. larl %r3,.Ldisabled_wait_31
  181. lpsw 0(%r3)
  182. 4:
  183. /* Switch to suspend CPU */
  184. sigp %r9,%r1,SIGP_RESTART /* sigp restart to suspend CPU */
  185. brc 2,4b /* busy, try again */
  186. 5:
  187. sigp %r9,%r2,SIGP_STOP /* sigp stop to current resume CPU */
  188. brc 2,5b /* busy, try again */
  189. 6: j 6b
  190. restart_suspend:
  191. larl %r1,.Lresume_cpu
  192. llgh %r2,0(%r1)
  193. 7:
  194. sigp %r9,%r2,SIGP_SENSE /* sigp sense, wait for resume CPU */
  195. brc 8,7b /* accepted, status 0, still running */
  196. brc 2,7b /* busy, try again */
  197. tmll %r9,0x40 /* Test if resume CPU is stopped */
  198. jz 7b
  199. restore_registers:
  200. /* Restore registers */
  201. lghi %r13,0x1000 /* %r1 = pointer to save area */
  202. /* Ignore time spent in suspended state. */
  203. llgf %r1,0x318(%r13)
  204. stck __LC_LAST_UPDATE_CLOCK(%r1)
  205. spt 0x328(%r13) /* reprogram timer */
  206. //sckc 0x330(%r13) /* set clock comparator */
  207. lctlg %c0,%c15,0x380(%r13) /* load control registers */
  208. lam %a0,%a15,0x340(%r13) /* load access registers */
  209. /* Load old stack */
  210. lg %r15,0x2f8(%r13)
  211. /* Save prefix register */
  212. mvc __SF_EMPTY(4,%r15),0x318(%r13)
  213. /* Restore absolute zero pages */
  214. lghi %r2,0
  215. larl %r4,suspend_zero_pages
  216. lg %r4,0(%r4)
  217. lghi %r3,2*PAGE_SIZE
  218. lghi %r5,2*PAGE_SIZE
  219. 1: mvcle %r2,%r4,0
  220. jo 1b
  221. /* Restore prefix register */
  222. spx __SF_EMPTY(%r15)
  223. /* Activate DAT */
  224. stosm __SF_EMPTY(%r15),0x04
  225. /* Make all free pages unstable */
  226. lghi %r2,0
  227. brasl %r14,arch_set_page_states
  228. /* Call arch specific early resume code */
  229. brasl %r14,s390_early_resume
  230. /* Return 0 */
  231. lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
  232. lghi %r2,0
  233. BR_EX %r14
  234. .section .data..nosave,"aw",@progbits
  235. .align 8
  236. .Ldisabled_wait_31:
  237. .long 0x000a0000,0x00000000
  238. .Lpanic_string:
  239. .asciz "Resume not possible because suspend CPU is no longer available"
  240. .align 8
  241. .Lrestart_diag308_psw:
  242. .long 0x00080000,0x80000000
  243. .Lrestart_suspend_psw:
  244. .quad 0x0000000180000000,restart_suspend
  245. .Lnew_pgm_check_psw:
  246. .quad 0,pgm_check_entry
  247. .Lresume_cpu:
  248. .byte 0,0