pci.c 20 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define KMSG_COMPONENT "zpci"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  40. /* list of all detected zpci devices */
  41. static LIST_HEAD(zpci_list);
  42. static DEFINE_SPINLOCK(zpci_list_lock);
  43. static struct irq_chip zpci_irq_chip = {
  44. .name = "zPCI",
  45. .irq_unmask = pci_msi_unmask_irq,
  46. .irq_mask = pci_msi_mask_irq,
  47. };
  48. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  49. static DEFINE_SPINLOCK(zpci_domain_lock);
  50. static struct airq_iv *zpci_aisb_iv;
  51. static struct airq_iv *zpci_aibv[ZPCI_NR_DEVICES];
  52. /* Adapter interrupt definitions */
  53. static void zpci_irq_handler(struct airq_struct *airq);
  54. static struct airq_struct zpci_airq = {
  55. .handler = zpci_irq_handler,
  56. .isc = PCI_ISC,
  57. };
  58. /* I/O Map */
  59. static DEFINE_SPINLOCK(zpci_iomap_lock);
  60. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  61. struct zpci_iomap_entry *zpci_iomap_start;
  62. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  63. static struct kmem_cache *zdev_fmb_cache;
  64. struct zpci_dev *get_zdev_by_fid(u32 fid)
  65. {
  66. struct zpci_dev *tmp, *zdev = NULL;
  67. spin_lock(&zpci_list_lock);
  68. list_for_each_entry(tmp, &zpci_list, entry) {
  69. if (tmp->fid == fid) {
  70. zdev = tmp;
  71. break;
  72. }
  73. }
  74. spin_unlock(&zpci_list_lock);
  75. return zdev;
  76. }
  77. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  78. {
  79. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  80. }
  81. int pci_domain_nr(struct pci_bus *bus)
  82. {
  83. return ((struct zpci_dev *) bus->sysdata)->domain;
  84. }
  85. EXPORT_SYMBOL_GPL(pci_domain_nr);
  86. int pci_proc_domain(struct pci_bus *bus)
  87. {
  88. return pci_domain_nr(bus);
  89. }
  90. EXPORT_SYMBOL_GPL(pci_proc_domain);
  91. /* Modify PCI: Register adapter interruptions */
  92. static int zpci_set_airq(struct zpci_dev *zdev)
  93. {
  94. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  95. struct zpci_fib fib = {0};
  96. fib.isc = PCI_ISC;
  97. fib.sum = 1; /* enable summary notifications */
  98. fib.noi = airq_iv_end(zdev->aibv);
  99. fib.aibv = (unsigned long) zdev->aibv->vector;
  100. fib.aibvo = 0; /* each zdev has its own interrupt vector */
  101. fib.aisb = (unsigned long) zpci_aisb_iv->vector + (zdev->aisb/64)*8;
  102. fib.aisbo = zdev->aisb & 63;
  103. return zpci_mod_fc(req, &fib);
  104. }
  105. struct mod_pci_args {
  106. u64 base;
  107. u64 limit;
  108. u64 iota;
  109. u64 fmb_addr;
  110. };
  111. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  112. {
  113. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  114. struct zpci_fib fib = {0};
  115. fib.pba = args->base;
  116. fib.pal = args->limit;
  117. fib.iota = args->iota;
  118. fib.fmb_addr = args->fmb_addr;
  119. return zpci_mod_fc(req, &fib);
  120. }
  121. /* Modify PCI: Register I/O address translation parameters */
  122. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  123. u64 base, u64 limit, u64 iota)
  124. {
  125. struct mod_pci_args args = { base, limit, iota, 0 };
  126. WARN_ON_ONCE(iota & 0x3fff);
  127. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  128. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  129. }
  130. /* Modify PCI: Unregister I/O address translation parameters */
  131. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  132. {
  133. struct mod_pci_args args = { 0, 0, 0, 0 };
  134. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  135. }
  136. /* Modify PCI: Unregister adapter interruptions */
  137. static int zpci_clear_airq(struct zpci_dev *zdev)
  138. {
  139. struct mod_pci_args args = { 0, 0, 0, 0 };
  140. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  141. }
  142. /* Modify PCI: Set PCI function measurement parameters */
  143. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  144. {
  145. struct mod_pci_args args = { 0, 0, 0, 0 };
  146. if (zdev->fmb)
  147. return -EINVAL;
  148. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  149. if (!zdev->fmb)
  150. return -ENOMEM;
  151. WARN_ON((u64) zdev->fmb & 0xf);
  152. /* reset software counters */
  153. atomic64_set(&zdev->allocated_pages, 0);
  154. atomic64_set(&zdev->mapped_pages, 0);
  155. atomic64_set(&zdev->unmapped_pages, 0);
  156. args.fmb_addr = virt_to_phys(zdev->fmb);
  157. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  158. }
  159. /* Modify PCI: Disable PCI function measurement */
  160. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  161. {
  162. struct mod_pci_args args = { 0, 0, 0, 0 };
  163. int rc;
  164. if (!zdev->fmb)
  165. return -EINVAL;
  166. /* Function measurement is disabled if fmb address is zero */
  167. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  168. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  169. zdev->fmb = NULL;
  170. return rc;
  171. }
  172. #define ZPCI_PCIAS_CFGSPC 15
  173. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  174. {
  175. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  176. u64 data;
  177. int rc;
  178. rc = zpci_load(&data, req, offset);
  179. if (!rc) {
  180. data = data << ((8 - len) * 8);
  181. data = le64_to_cpu(data);
  182. *val = (u32) data;
  183. } else
  184. *val = 0xffffffff;
  185. return rc;
  186. }
  187. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  188. {
  189. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  190. u64 data = val;
  191. int rc;
  192. data = cpu_to_le64(data);
  193. data = data >> ((8 - len) * 8);
  194. rc = zpci_store(data, req, offset);
  195. return rc;
  196. }
  197. void pcibios_fixup_bus(struct pci_bus *bus)
  198. {
  199. }
  200. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  201. resource_size_t size,
  202. resource_size_t align)
  203. {
  204. return 0;
  205. }
  206. /* combine single writes by using store-block insn */
  207. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  208. {
  209. zpci_memcpy_toio(to, from, count);
  210. }
  211. /* Create a virtual mapping cookie for a PCI BAR */
  212. void __iomem *pci_iomap_range(struct pci_dev *pdev,
  213. int bar,
  214. unsigned long offset,
  215. unsigned long max)
  216. {
  217. struct zpci_dev *zdev = to_zpci(pdev);
  218. u64 addr;
  219. int idx;
  220. if ((bar & 7) != bar)
  221. return NULL;
  222. idx = zdev->bars[bar].map_idx;
  223. spin_lock(&zpci_iomap_lock);
  224. if (zpci_iomap_start[idx].count++) {
  225. BUG_ON(zpci_iomap_start[idx].fh != zdev->fh ||
  226. zpci_iomap_start[idx].bar != bar);
  227. } else {
  228. zpci_iomap_start[idx].fh = zdev->fh;
  229. zpci_iomap_start[idx].bar = bar;
  230. }
  231. /* Detect overrun */
  232. BUG_ON(!zpci_iomap_start[idx].count);
  233. spin_unlock(&zpci_iomap_lock);
  234. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  235. return (void __iomem *) addr + offset;
  236. }
  237. EXPORT_SYMBOL(pci_iomap_range);
  238. void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
  239. {
  240. return pci_iomap_range(dev, bar, 0, maxlen);
  241. }
  242. EXPORT_SYMBOL(pci_iomap);
  243. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  244. {
  245. unsigned int idx;
  246. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  247. spin_lock(&zpci_iomap_lock);
  248. /* Detect underrun */
  249. BUG_ON(!zpci_iomap_start[idx].count);
  250. if (!--zpci_iomap_start[idx].count) {
  251. zpci_iomap_start[idx].fh = 0;
  252. zpci_iomap_start[idx].bar = 0;
  253. }
  254. spin_unlock(&zpci_iomap_lock);
  255. }
  256. EXPORT_SYMBOL(pci_iounmap);
  257. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  258. int size, u32 *val)
  259. {
  260. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  261. int ret;
  262. if (!zdev || devfn != ZPCI_DEVFN)
  263. ret = -ENODEV;
  264. else
  265. ret = zpci_cfg_load(zdev, where, val, size);
  266. return ret;
  267. }
  268. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  269. int size, u32 val)
  270. {
  271. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  272. int ret;
  273. if (!zdev || devfn != ZPCI_DEVFN)
  274. ret = -ENODEV;
  275. else
  276. ret = zpci_cfg_store(zdev, where, val, size);
  277. return ret;
  278. }
  279. static struct pci_ops pci_root_ops = {
  280. .read = pci_read,
  281. .write = pci_write,
  282. };
  283. static void zpci_irq_handler(struct airq_struct *airq)
  284. {
  285. unsigned long si, ai;
  286. struct airq_iv *aibv;
  287. int irqs_on = 0;
  288. inc_irq_stat(IRQIO_PCI);
  289. for (si = 0;;) {
  290. /* Scan adapter summary indicator bit vector */
  291. si = airq_iv_scan(zpci_aisb_iv, si, airq_iv_end(zpci_aisb_iv));
  292. if (si == -1UL) {
  293. if (irqs_on++)
  294. /* End of second scan with interrupts on. */
  295. break;
  296. /* First scan complete, reenable interrupts. */
  297. if (zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC))
  298. break;
  299. si = 0;
  300. continue;
  301. }
  302. /* Scan the adapter interrupt vector for this device. */
  303. aibv = zpci_aibv[si];
  304. for (ai = 0;;) {
  305. ai = airq_iv_scan(aibv, ai, airq_iv_end(aibv));
  306. if (ai == -1UL)
  307. break;
  308. inc_irq_stat(IRQIO_MSI);
  309. airq_iv_lock(aibv, ai);
  310. generic_handle_irq(airq_iv_get_data(aibv, ai));
  311. airq_iv_unlock(aibv, ai);
  312. }
  313. }
  314. }
  315. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  316. {
  317. struct zpci_dev *zdev = to_zpci(pdev);
  318. unsigned int hwirq, msi_vecs;
  319. unsigned long aisb;
  320. struct msi_desc *msi;
  321. struct msi_msg msg;
  322. int rc, irq;
  323. if (type == PCI_CAP_ID_MSI && nvec > 1)
  324. return 1;
  325. msi_vecs = min_t(unsigned int, nvec, zdev->max_msi);
  326. /* Allocate adapter summary indicator bit */
  327. rc = -EIO;
  328. aisb = airq_iv_alloc_bit(zpci_aisb_iv);
  329. if (aisb == -1UL)
  330. goto out;
  331. zdev->aisb = aisb;
  332. /* Create adapter interrupt vector */
  333. rc = -ENOMEM;
  334. zdev->aibv = airq_iv_create(msi_vecs, AIRQ_IV_DATA | AIRQ_IV_BITLOCK);
  335. if (!zdev->aibv)
  336. goto out_si;
  337. /* Wire up shortcut pointer */
  338. zpci_aibv[aisb] = zdev->aibv;
  339. /* Request MSI interrupts */
  340. hwirq = 0;
  341. for_each_pci_msi_entry(msi, pdev) {
  342. rc = -EIO;
  343. if (hwirq >= msi_vecs)
  344. break;
  345. irq = irq_alloc_desc(0); /* Alloc irq on node 0 */
  346. if (irq < 0)
  347. goto out_msi;
  348. rc = irq_set_msi_desc(irq, msi);
  349. if (rc)
  350. goto out_msi;
  351. irq_set_chip_and_handler(irq, &zpci_irq_chip,
  352. handle_simple_irq);
  353. msg.data = hwirq;
  354. msg.address_lo = zdev->msi_addr & 0xffffffff;
  355. msg.address_hi = zdev->msi_addr >> 32;
  356. pci_write_msi_msg(irq, &msg);
  357. airq_iv_set_data(zdev->aibv, hwirq, irq);
  358. hwirq++;
  359. }
  360. /* Enable adapter interrupts */
  361. rc = zpci_set_airq(zdev);
  362. if (rc)
  363. goto out_msi;
  364. return (msi_vecs == nvec) ? 0 : msi_vecs;
  365. out_msi:
  366. for_each_pci_msi_entry(msi, pdev) {
  367. if (hwirq-- == 0)
  368. break;
  369. irq_set_msi_desc(msi->irq, NULL);
  370. irq_free_desc(msi->irq);
  371. msi->msg.address_lo = 0;
  372. msi->msg.address_hi = 0;
  373. msi->msg.data = 0;
  374. msi->irq = 0;
  375. }
  376. zpci_aibv[aisb] = NULL;
  377. airq_iv_release(zdev->aibv);
  378. out_si:
  379. airq_iv_free_bit(zpci_aisb_iv, aisb);
  380. out:
  381. return rc;
  382. }
  383. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  384. {
  385. struct zpci_dev *zdev = to_zpci(pdev);
  386. struct msi_desc *msi;
  387. int rc;
  388. /* Disable adapter interrupts */
  389. rc = zpci_clear_airq(zdev);
  390. if (rc)
  391. return;
  392. /* Release MSI interrupts */
  393. for_each_pci_msi_entry(msi, pdev) {
  394. if (msi->msi_attrib.is_msix)
  395. __pci_msix_desc_mask_irq(msi, 1);
  396. else
  397. __pci_msi_desc_mask_irq(msi, 1, 1);
  398. irq_set_msi_desc(msi->irq, NULL);
  399. irq_free_desc(msi->irq);
  400. msi->msg.address_lo = 0;
  401. msi->msg.address_hi = 0;
  402. msi->msg.data = 0;
  403. msi->irq = 0;
  404. }
  405. zpci_aibv[zdev->aisb] = NULL;
  406. airq_iv_release(zdev->aibv);
  407. airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
  408. }
  409. static void zpci_map_resources(struct pci_dev *pdev)
  410. {
  411. resource_size_t len;
  412. int i;
  413. for (i = 0; i < PCI_BAR_COUNT; i++) {
  414. len = pci_resource_len(pdev, i);
  415. if (!len)
  416. continue;
  417. pdev->resource[i].start =
  418. (resource_size_t __force) pci_iomap(pdev, i, 0);
  419. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  420. }
  421. }
  422. static void zpci_unmap_resources(struct pci_dev *pdev)
  423. {
  424. resource_size_t len;
  425. int i;
  426. for (i = 0; i < PCI_BAR_COUNT; i++) {
  427. len = pci_resource_len(pdev, i);
  428. if (!len)
  429. continue;
  430. pci_iounmap(pdev, (void __iomem __force *)
  431. pdev->resource[i].start);
  432. }
  433. }
  434. static int __init zpci_irq_init(void)
  435. {
  436. int rc;
  437. rc = register_adapter_interrupt(&zpci_airq);
  438. if (rc)
  439. goto out;
  440. /* Set summary to 1 to be called every time for the ISC. */
  441. *zpci_airq.lsi_ptr = 1;
  442. rc = -ENOMEM;
  443. zpci_aisb_iv = airq_iv_create(ZPCI_NR_DEVICES, AIRQ_IV_ALLOC);
  444. if (!zpci_aisb_iv)
  445. goto out_airq;
  446. zpci_set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  447. return 0;
  448. out_airq:
  449. unregister_adapter_interrupt(&zpci_airq);
  450. out:
  451. return rc;
  452. }
  453. static void zpci_irq_exit(void)
  454. {
  455. airq_iv_release(zpci_aisb_iv);
  456. unregister_adapter_interrupt(&zpci_airq);
  457. }
  458. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  459. {
  460. int entry;
  461. spin_lock(&zpci_iomap_lock);
  462. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  463. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  464. spin_unlock(&zpci_iomap_lock);
  465. return -ENOSPC;
  466. }
  467. set_bit(entry, zpci_iomap);
  468. spin_unlock(&zpci_iomap_lock);
  469. return entry;
  470. }
  471. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  472. {
  473. spin_lock(&zpci_iomap_lock);
  474. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  475. clear_bit(entry, zpci_iomap);
  476. spin_unlock(&zpci_iomap_lock);
  477. }
  478. static struct resource *__alloc_res(struct zpci_dev *zdev, unsigned long start,
  479. unsigned long size, unsigned long flags)
  480. {
  481. struct resource *r;
  482. r = kzalloc(sizeof(*r), GFP_KERNEL);
  483. if (!r)
  484. return NULL;
  485. r->start = start;
  486. r->end = r->start + size - 1;
  487. r->flags = flags;
  488. r->name = zdev->res_name;
  489. if (request_resource(&iomem_resource, r)) {
  490. kfree(r);
  491. return NULL;
  492. }
  493. return r;
  494. }
  495. static int zpci_setup_bus_resources(struct zpci_dev *zdev,
  496. struct list_head *resources)
  497. {
  498. unsigned long addr, size, flags;
  499. struct resource *res;
  500. int i, entry;
  501. snprintf(zdev->res_name, sizeof(zdev->res_name),
  502. "PCI Bus %04x:%02x", zdev->domain, ZPCI_BUS_NR);
  503. for (i = 0; i < PCI_BAR_COUNT; i++) {
  504. if (!zdev->bars[i].size)
  505. continue;
  506. entry = zpci_alloc_iomap(zdev);
  507. if (entry < 0)
  508. return entry;
  509. zdev->bars[i].map_idx = entry;
  510. /* only MMIO is supported */
  511. flags = IORESOURCE_MEM;
  512. if (zdev->bars[i].val & 8)
  513. flags |= IORESOURCE_PREFETCH;
  514. if (zdev->bars[i].val & 4)
  515. flags |= IORESOURCE_MEM_64;
  516. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  517. size = 1UL << zdev->bars[i].size;
  518. res = __alloc_res(zdev, addr, size, flags);
  519. if (!res) {
  520. zpci_free_iomap(zdev, entry);
  521. return -ENOMEM;
  522. }
  523. zdev->bars[i].res = res;
  524. pci_add_resource(resources, res);
  525. }
  526. return 0;
  527. }
  528. static void zpci_cleanup_bus_resources(struct zpci_dev *zdev)
  529. {
  530. int i;
  531. for (i = 0; i < PCI_BAR_COUNT; i++) {
  532. if (!zdev->bars[i].size || !zdev->bars[i].res)
  533. continue;
  534. zpci_free_iomap(zdev, zdev->bars[i].map_idx);
  535. release_resource(zdev->bars[i].res);
  536. kfree(zdev->bars[i].res);
  537. }
  538. }
  539. int pcibios_add_device(struct pci_dev *pdev)
  540. {
  541. struct zpci_dev *zdev = to_zpci(pdev);
  542. struct resource *res;
  543. int i;
  544. zdev->pdev = pdev;
  545. pdev->dev.groups = zpci_attr_groups;
  546. zpci_map_resources(pdev);
  547. for (i = 0; i < PCI_BAR_COUNT; i++) {
  548. res = &pdev->resource[i];
  549. if (res->parent || !res->flags)
  550. continue;
  551. pci_claim_resource(pdev, i);
  552. }
  553. return 0;
  554. }
  555. void pcibios_release_device(struct pci_dev *pdev)
  556. {
  557. zpci_unmap_resources(pdev);
  558. }
  559. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  560. {
  561. struct zpci_dev *zdev = to_zpci(pdev);
  562. zdev->pdev = pdev;
  563. zpci_debug_init_device(zdev);
  564. zpci_fmb_enable_device(zdev);
  565. return pci_enable_resources(pdev, mask);
  566. }
  567. void pcibios_disable_device(struct pci_dev *pdev)
  568. {
  569. struct zpci_dev *zdev = to_zpci(pdev);
  570. zpci_fmb_disable_device(zdev);
  571. zpci_debug_exit_device(zdev);
  572. zdev->pdev = NULL;
  573. }
  574. #ifdef CONFIG_HIBERNATE_CALLBACKS
  575. static int zpci_restore(struct device *dev)
  576. {
  577. struct pci_dev *pdev = to_pci_dev(dev);
  578. struct zpci_dev *zdev = to_zpci(pdev);
  579. int ret = 0;
  580. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  581. goto out;
  582. ret = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  583. if (ret)
  584. goto out;
  585. zpci_map_resources(pdev);
  586. zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
  587. (u64) zdev->dma_table);
  588. out:
  589. return ret;
  590. }
  591. static int zpci_freeze(struct device *dev)
  592. {
  593. struct pci_dev *pdev = to_pci_dev(dev);
  594. struct zpci_dev *zdev = to_zpci(pdev);
  595. if (zdev->state != ZPCI_FN_STATE_ONLINE)
  596. return 0;
  597. zpci_unregister_ioat(zdev, 0);
  598. zpci_unmap_resources(pdev);
  599. return clp_disable_fh(zdev);
  600. }
  601. struct dev_pm_ops pcibios_pm_ops = {
  602. .thaw_noirq = zpci_restore,
  603. .freeze_noirq = zpci_freeze,
  604. .restore_noirq = zpci_restore,
  605. .poweroff_noirq = zpci_freeze,
  606. };
  607. #endif /* CONFIG_HIBERNATE_CALLBACKS */
  608. static int zpci_alloc_domain(struct zpci_dev *zdev)
  609. {
  610. spin_lock(&zpci_domain_lock);
  611. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  612. if (zdev->domain == ZPCI_NR_DEVICES) {
  613. spin_unlock(&zpci_domain_lock);
  614. return -ENOSPC;
  615. }
  616. set_bit(zdev->domain, zpci_domain);
  617. spin_unlock(&zpci_domain_lock);
  618. return 0;
  619. }
  620. static void zpci_free_domain(struct zpci_dev *zdev)
  621. {
  622. spin_lock(&zpci_domain_lock);
  623. clear_bit(zdev->domain, zpci_domain);
  624. spin_unlock(&zpci_domain_lock);
  625. }
  626. void pcibios_remove_bus(struct pci_bus *bus)
  627. {
  628. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  629. zpci_exit_slot(zdev);
  630. zpci_cleanup_bus_resources(zdev);
  631. zpci_free_domain(zdev);
  632. spin_lock(&zpci_list_lock);
  633. list_del(&zdev->entry);
  634. spin_unlock(&zpci_list_lock);
  635. kfree(zdev);
  636. }
  637. static int zpci_scan_bus(struct zpci_dev *zdev)
  638. {
  639. LIST_HEAD(resources);
  640. int ret;
  641. ret = zpci_setup_bus_resources(zdev, &resources);
  642. if (ret)
  643. goto error;
  644. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  645. zdev, &resources);
  646. if (!zdev->bus) {
  647. ret = -EIO;
  648. goto error;
  649. }
  650. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  651. pci_bus_add_devices(zdev->bus);
  652. return 0;
  653. error:
  654. zpci_cleanup_bus_resources(zdev);
  655. pci_free_resource_list(&resources);
  656. return ret;
  657. }
  658. int zpci_enable_device(struct zpci_dev *zdev)
  659. {
  660. int rc;
  661. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  662. if (rc)
  663. goto out;
  664. rc = zpci_dma_init_device(zdev);
  665. if (rc)
  666. goto out_dma;
  667. zdev->state = ZPCI_FN_STATE_ONLINE;
  668. return 0;
  669. out_dma:
  670. clp_disable_fh(zdev);
  671. out:
  672. return rc;
  673. }
  674. EXPORT_SYMBOL_GPL(zpci_enable_device);
  675. int zpci_disable_device(struct zpci_dev *zdev)
  676. {
  677. zpci_dma_exit_device(zdev);
  678. return clp_disable_fh(zdev);
  679. }
  680. EXPORT_SYMBOL_GPL(zpci_disable_device);
  681. int zpci_create_device(struct zpci_dev *zdev)
  682. {
  683. int rc;
  684. rc = zpci_alloc_domain(zdev);
  685. if (rc)
  686. goto out;
  687. mutex_init(&zdev->lock);
  688. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  689. rc = zpci_enable_device(zdev);
  690. if (rc)
  691. goto out_free;
  692. }
  693. rc = zpci_scan_bus(zdev);
  694. if (rc)
  695. goto out_disable;
  696. spin_lock(&zpci_list_lock);
  697. list_add_tail(&zdev->entry, &zpci_list);
  698. spin_unlock(&zpci_list_lock);
  699. zpci_init_slot(zdev);
  700. return 0;
  701. out_disable:
  702. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  703. zpci_disable_device(zdev);
  704. out_free:
  705. zpci_free_domain(zdev);
  706. out:
  707. return rc;
  708. }
  709. void zpci_stop_device(struct zpci_dev *zdev)
  710. {
  711. zpci_dma_exit_device(zdev);
  712. /*
  713. * Note: SCLP disables fh via set-pci-fn so don't
  714. * do that here.
  715. */
  716. }
  717. EXPORT_SYMBOL_GPL(zpci_stop_device);
  718. static inline int barsize(u8 size)
  719. {
  720. return (size) ? (1 << size) >> 10 : 0;
  721. }
  722. static int zpci_mem_init(void)
  723. {
  724. BUILD_BUG_ON(!is_power_of_2(__alignof__(struct zpci_fmb)) ||
  725. __alignof__(struct zpci_fmb) < sizeof(struct zpci_fmb));
  726. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  727. __alignof__(struct zpci_fmb), 0, NULL);
  728. if (!zdev_fmb_cache)
  729. goto error_zdev;
  730. /* TODO: use realloc */
  731. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  732. GFP_KERNEL);
  733. if (!zpci_iomap_start)
  734. goto error_iomap;
  735. return 0;
  736. error_iomap:
  737. kmem_cache_destroy(zdev_fmb_cache);
  738. error_zdev:
  739. return -ENOMEM;
  740. }
  741. static void zpci_mem_exit(void)
  742. {
  743. kfree(zpci_iomap_start);
  744. kmem_cache_destroy(zdev_fmb_cache);
  745. }
  746. static unsigned int s390_pci_probe = 1;
  747. static unsigned int s390_pci_initialized;
  748. char * __init pcibios_setup(char *str)
  749. {
  750. if (!strcmp(str, "off")) {
  751. s390_pci_probe = 0;
  752. return NULL;
  753. }
  754. return str;
  755. }
  756. bool zpci_is_enabled(void)
  757. {
  758. return s390_pci_initialized;
  759. }
  760. static int __init pci_base_init(void)
  761. {
  762. int rc;
  763. if (!s390_pci_probe)
  764. return 0;
  765. if (!test_facility(69) || !test_facility(71))
  766. return 0;
  767. rc = zpci_debug_init();
  768. if (rc)
  769. goto out;
  770. rc = zpci_mem_init();
  771. if (rc)
  772. goto out_mem;
  773. rc = zpci_irq_init();
  774. if (rc)
  775. goto out_irq;
  776. rc = zpci_dma_init();
  777. if (rc)
  778. goto out_dma;
  779. rc = clp_scan_pci_devices();
  780. if (rc)
  781. goto out_find;
  782. s390_pci_initialized = 1;
  783. return 0;
  784. out_find:
  785. zpci_dma_exit();
  786. out_dma:
  787. zpci_irq_exit();
  788. out_irq:
  789. zpci_mem_exit();
  790. out_mem:
  791. zpci_debug_exit();
  792. out:
  793. return rc;
  794. }
  795. subsys_initcall_sync(pci_base_init);
  796. void zpci_rescan(void)
  797. {
  798. if (zpci_is_enabled())
  799. clp_rescan_pci_devices_simple();
  800. }