setup.c 17 KB

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  1. /*
  2. * Renesas - AP-325RXA
  3. * (Compatible with Algo System ., LTD. - AP-320A)
  4. *
  5. * Copyright (C) 2008 Renesas Solutions Corp.
  6. * Author : Yusuke Goda <goda.yuske@renesas.com>
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/mmc/host.h>
  17. #include <linux/mmc/sh_mobile_sdhi.h>
  18. #include <linux/mtd/physmap.h>
  19. #include <linux/mtd/sh_flctl.h>
  20. #include <linux/mfd/tmio.h>
  21. #include <linux/delay.h>
  22. #include <linux/i2c.h>
  23. #include <linux/regulator/fixed.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/smsc911x.h>
  26. #include <linux/gpio.h>
  27. #include <linux/videodev2.h>
  28. #include <linux/sh_intc.h>
  29. #include <media/ov772x.h>
  30. #include <media/soc_camera.h>
  31. #include <media/soc_camera_platform.h>
  32. #include <media/sh_mobile_ceu.h>
  33. #include <video/sh_mobile_lcdc.h>
  34. #include <asm/io.h>
  35. #include <asm/clock.h>
  36. #include <asm/suspend.h>
  37. #include <cpu/sh7723.h>
  38. /* Dummy supplies, where voltage doesn't matter */
  39. static struct regulator_consumer_supply dummy_supplies[] = {
  40. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  41. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  42. };
  43. static struct smsc911x_platform_config smsc911x_config = {
  44. .phy_interface = PHY_INTERFACE_MODE_MII,
  45. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  46. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  47. .flags = SMSC911X_USE_32BIT,
  48. };
  49. static struct resource smsc9118_resources[] = {
  50. [0] = {
  51. .start = 0xb6080000,
  52. .end = 0xb60fffff,
  53. .flags = IORESOURCE_MEM,
  54. },
  55. [1] = {
  56. .start = evt2irq(0x660),
  57. .end = evt2irq(0x660),
  58. .flags = IORESOURCE_IRQ,
  59. }
  60. };
  61. static struct platform_device smsc9118_device = {
  62. .name = "smsc911x",
  63. .id = -1,
  64. .num_resources = ARRAY_SIZE(smsc9118_resources),
  65. .resource = smsc9118_resources,
  66. .dev = {
  67. .platform_data = &smsc911x_config,
  68. },
  69. };
  70. /*
  71. * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
  72. * If this area erased, this board can not boot.
  73. */
  74. static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
  75. {
  76. .name = "uboot",
  77. .offset = 0,
  78. .size = (1 * 1024 * 1024),
  79. .mask_flags = MTD_WRITEABLE, /* Read-only */
  80. }, {
  81. .name = "kernel",
  82. .offset = MTDPART_OFS_APPEND,
  83. .size = (2 * 1024 * 1024),
  84. }, {
  85. .name = "free-area0",
  86. .offset = MTDPART_OFS_APPEND,
  87. .size = ((7 * 1024 * 1024) + (512 * 1024)),
  88. }, {
  89. .name = "CPLD-Data",
  90. .offset = MTDPART_OFS_APPEND,
  91. .mask_flags = MTD_WRITEABLE, /* Read-only */
  92. .size = (1024 * 128 * 2),
  93. }, {
  94. .name = "free-area1",
  95. .offset = MTDPART_OFS_APPEND,
  96. .size = MTDPART_SIZ_FULL,
  97. },
  98. };
  99. static struct physmap_flash_data ap325rxa_nor_flash_data = {
  100. .width = 2,
  101. .parts = ap325rxa_nor_flash_partitions,
  102. .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
  103. };
  104. static struct resource ap325rxa_nor_flash_resources[] = {
  105. [0] = {
  106. .name = "NOR Flash",
  107. .start = 0x00000000,
  108. .end = 0x00ffffff,
  109. .flags = IORESOURCE_MEM,
  110. }
  111. };
  112. static struct platform_device ap325rxa_nor_flash_device = {
  113. .name = "physmap-flash",
  114. .resource = ap325rxa_nor_flash_resources,
  115. .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
  116. .dev = {
  117. .platform_data = &ap325rxa_nor_flash_data,
  118. },
  119. };
  120. static struct mtd_partition nand_partition_info[] = {
  121. {
  122. .name = "nand_data",
  123. .offset = 0,
  124. .size = MTDPART_SIZ_FULL,
  125. },
  126. };
  127. static struct resource nand_flash_resources[] = {
  128. [0] = {
  129. .start = 0xa4530000,
  130. .end = 0xa45300ff,
  131. .flags = IORESOURCE_MEM,
  132. }
  133. };
  134. static struct sh_flctl_platform_data nand_flash_data = {
  135. .parts = nand_partition_info,
  136. .nr_parts = ARRAY_SIZE(nand_partition_info),
  137. .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
  138. .has_hwecc = 1,
  139. };
  140. static struct platform_device nand_flash_device = {
  141. .name = "sh_flctl",
  142. .resource = nand_flash_resources,
  143. .num_resources = ARRAY_SIZE(nand_flash_resources),
  144. .dev = {
  145. .platform_data = &nand_flash_data,
  146. },
  147. };
  148. #define FPGA_LCDREG 0xB4100180
  149. #define FPGA_BKLREG 0xB4100212
  150. #define FPGA_LCDREG_VAL 0x0018
  151. #define PORT_MSELCRB 0xA4050182
  152. #define PORT_HIZCRC 0xA405015C
  153. #define PORT_DRVCRA 0xA405018A
  154. #define PORT_DRVCRB 0xA405018C
  155. static int ap320_wvga_set_brightness(int brightness)
  156. {
  157. if (brightness) {
  158. gpio_set_value(GPIO_PTS3, 0);
  159. __raw_writew(0x100, FPGA_BKLREG);
  160. } else {
  161. __raw_writew(0, FPGA_BKLREG);
  162. gpio_set_value(GPIO_PTS3, 1);
  163. }
  164. return 0;
  165. }
  166. static void ap320_wvga_power_on(void)
  167. {
  168. msleep(100);
  169. /* ASD AP-320/325 LCD ON */
  170. __raw_writew(FPGA_LCDREG_VAL, FPGA_LCDREG);
  171. }
  172. static void ap320_wvga_power_off(void)
  173. {
  174. /* ASD AP-320/325 LCD OFF */
  175. __raw_writew(0, FPGA_LCDREG);
  176. }
  177. static const struct fb_videomode ap325rxa_lcdc_modes[] = {
  178. {
  179. .name = "LB070WV1",
  180. .xres = 800,
  181. .yres = 480,
  182. .left_margin = 32,
  183. .right_margin = 160,
  184. .hsync_len = 8,
  185. .upper_margin = 63,
  186. .lower_margin = 80,
  187. .vsync_len = 1,
  188. .sync = 0, /* hsync and vsync are active low */
  189. },
  190. };
  191. static struct sh_mobile_lcdc_info lcdc_info = {
  192. .clock_source = LCDC_CLK_EXTERNAL,
  193. .ch[0] = {
  194. .chan = LCDC_CHAN_MAINLCD,
  195. .fourcc = V4L2_PIX_FMT_RGB565,
  196. .interface_type = RGB18,
  197. .clock_divider = 1,
  198. .lcd_modes = ap325rxa_lcdc_modes,
  199. .num_modes = ARRAY_SIZE(ap325rxa_lcdc_modes),
  200. .panel_cfg = {
  201. .width = 152, /* 7.0 inch */
  202. .height = 91,
  203. .display_on = ap320_wvga_power_on,
  204. .display_off = ap320_wvga_power_off,
  205. },
  206. .bl_info = {
  207. .name = "sh_mobile_lcdc_bl",
  208. .max_brightness = 1,
  209. .set_brightness = ap320_wvga_set_brightness,
  210. },
  211. }
  212. };
  213. static struct resource lcdc_resources[] = {
  214. [0] = {
  215. .name = "LCDC",
  216. .start = 0xfe940000, /* P4-only space */
  217. .end = 0xfe942fff,
  218. .flags = IORESOURCE_MEM,
  219. },
  220. [1] = {
  221. .start = evt2irq(0x580),
  222. .flags = IORESOURCE_IRQ,
  223. },
  224. };
  225. static struct platform_device lcdc_device = {
  226. .name = "sh_mobile_lcdc_fb",
  227. .num_resources = ARRAY_SIZE(lcdc_resources),
  228. .resource = lcdc_resources,
  229. .dev = {
  230. .platform_data = &lcdc_info,
  231. },
  232. };
  233. static void camera_power(int val)
  234. {
  235. gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
  236. mdelay(10);
  237. }
  238. #ifdef CONFIG_I2C
  239. /* support for the old ncm03j camera */
  240. static unsigned char camera_ncm03j_magic[] =
  241. {
  242. 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
  243. 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
  244. 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
  245. 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
  246. 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
  247. 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
  248. 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
  249. 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
  250. 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
  251. 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
  252. 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
  253. 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
  254. 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
  255. 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
  256. 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
  257. 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
  258. };
  259. static int camera_probe(void)
  260. {
  261. struct i2c_adapter *a = i2c_get_adapter(0);
  262. struct i2c_msg msg;
  263. int ret;
  264. if (!a)
  265. return -ENODEV;
  266. camera_power(1);
  267. msg.addr = 0x6e;
  268. msg.buf = camera_ncm03j_magic;
  269. msg.len = 2;
  270. msg.flags = 0;
  271. ret = i2c_transfer(a, &msg, 1);
  272. camera_power(0);
  273. return ret;
  274. }
  275. static int camera_set_capture(struct soc_camera_platform_info *info,
  276. int enable)
  277. {
  278. struct i2c_adapter *a = i2c_get_adapter(0);
  279. struct i2c_msg msg;
  280. int ret = 0;
  281. int i;
  282. camera_power(0);
  283. if (!enable)
  284. return 0; /* no disable for now */
  285. camera_power(1);
  286. for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
  287. u_int8_t buf[8];
  288. msg.addr = 0x6e;
  289. msg.buf = buf;
  290. msg.len = 2;
  291. msg.flags = 0;
  292. buf[0] = camera_ncm03j_magic[i];
  293. buf[1] = camera_ncm03j_magic[i + 1];
  294. ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
  295. }
  296. return ret;
  297. }
  298. static int ap325rxa_camera_add(struct soc_camera_device *icd);
  299. static void ap325rxa_camera_del(struct soc_camera_device *icd);
  300. static struct soc_camera_platform_info camera_info = {
  301. .format_name = "UYVY",
  302. .format_depth = 16,
  303. .format = {
  304. .code = MEDIA_BUS_FMT_UYVY8_2X8,
  305. .colorspace = V4L2_COLORSPACE_SMPTE170M,
  306. .field = V4L2_FIELD_NONE,
  307. .width = 640,
  308. .height = 480,
  309. },
  310. .mbus_param = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
  311. V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_HIGH |
  312. V4L2_MBUS_DATA_ACTIVE_HIGH,
  313. .mbus_type = V4L2_MBUS_PARALLEL,
  314. .set_capture = camera_set_capture,
  315. };
  316. static struct soc_camera_link camera_link = {
  317. .bus_id = 0,
  318. .add_device = ap325rxa_camera_add,
  319. .del_device = ap325rxa_camera_del,
  320. .module_name = "soc_camera_platform",
  321. .priv = &camera_info,
  322. };
  323. static struct platform_device *camera_device;
  324. static void ap325rxa_camera_release(struct device *dev)
  325. {
  326. soc_camera_platform_release(&camera_device);
  327. }
  328. static int ap325rxa_camera_add(struct soc_camera_device *icd)
  329. {
  330. int ret = soc_camera_platform_add(icd, &camera_device, &camera_link,
  331. ap325rxa_camera_release, 0);
  332. if (ret < 0)
  333. return ret;
  334. ret = camera_probe();
  335. if (ret < 0)
  336. soc_camera_platform_del(icd, camera_device, &camera_link);
  337. return ret;
  338. }
  339. static void ap325rxa_camera_del(struct soc_camera_device *icd)
  340. {
  341. soc_camera_platform_del(icd, camera_device, &camera_link);
  342. }
  343. #endif /* CONFIG_I2C */
  344. static int ov7725_power(struct device *dev, int mode)
  345. {
  346. camera_power(0);
  347. if (mode)
  348. camera_power(1);
  349. return 0;
  350. }
  351. static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
  352. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  353. };
  354. static struct resource ceu_resources[] = {
  355. [0] = {
  356. .name = "CEU",
  357. .start = 0xfe910000,
  358. .end = 0xfe91009f,
  359. .flags = IORESOURCE_MEM,
  360. },
  361. [1] = {
  362. .start = evt2irq(0x880),
  363. .flags = IORESOURCE_IRQ,
  364. },
  365. [2] = {
  366. /* place holder for contiguous memory */
  367. },
  368. };
  369. static struct platform_device ceu_device = {
  370. .name = "sh_mobile_ceu",
  371. .id = 0, /* "ceu0" clock */
  372. .num_resources = ARRAY_SIZE(ceu_resources),
  373. .resource = ceu_resources,
  374. .dev = {
  375. .platform_data = &sh_mobile_ceu_info,
  376. },
  377. };
  378. /* Fixed 3.3V regulators to be used by SDHI0, SDHI1 */
  379. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  380. {
  381. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
  382. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
  383. REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"),
  384. REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"),
  385. };
  386. static struct resource sdhi0_cn3_resources[] = {
  387. [0] = {
  388. .name = "SDHI0",
  389. .start = 0x04ce0000,
  390. .end = 0x04ce00ff,
  391. .flags = IORESOURCE_MEM,
  392. },
  393. [1] = {
  394. .start = evt2irq(0xe80),
  395. .flags = IORESOURCE_IRQ,
  396. },
  397. };
  398. static struct tmio_mmc_data sdhi0_cn3_data = {
  399. .capabilities = MMC_CAP_SDIO_IRQ,
  400. };
  401. static struct platform_device sdhi0_cn3_device = {
  402. .name = "sh_mobile_sdhi",
  403. .id = 0, /* "sdhi0" clock */
  404. .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
  405. .resource = sdhi0_cn3_resources,
  406. .dev = {
  407. .platform_data = &sdhi0_cn3_data,
  408. },
  409. };
  410. static struct resource sdhi1_cn7_resources[] = {
  411. [0] = {
  412. .name = "SDHI1",
  413. .start = 0x04cf0000,
  414. .end = 0x04cf00ff,
  415. .flags = IORESOURCE_MEM,
  416. },
  417. [1] = {
  418. .start = evt2irq(0x4e0),
  419. .flags = IORESOURCE_IRQ,
  420. },
  421. };
  422. static struct tmio_mmc_data sdhi1_cn7_data = {
  423. .capabilities = MMC_CAP_SDIO_IRQ,
  424. };
  425. static struct platform_device sdhi1_cn7_device = {
  426. .name = "sh_mobile_sdhi",
  427. .id = 1, /* "sdhi1" clock */
  428. .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
  429. .resource = sdhi1_cn7_resources,
  430. .dev = {
  431. .platform_data = &sdhi1_cn7_data,
  432. },
  433. };
  434. static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
  435. {
  436. I2C_BOARD_INFO("pcf8563", 0x51),
  437. },
  438. };
  439. static struct i2c_board_info ap325rxa_i2c_camera[] = {
  440. {
  441. I2C_BOARD_INFO("ov772x", 0x21),
  442. },
  443. };
  444. static struct ov772x_camera_info ov7725_info = {
  445. .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
  446. .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
  447. };
  448. static struct soc_camera_link ov7725_link = {
  449. .bus_id = 0,
  450. .power = ov7725_power,
  451. .board_info = &ap325rxa_i2c_camera[0],
  452. .i2c_adapter_id = 0,
  453. .priv = &ov7725_info,
  454. };
  455. static struct platform_device ap325rxa_camera[] = {
  456. {
  457. .name = "soc-camera-pdrv",
  458. .id = 0,
  459. .dev = {
  460. .platform_data = &ov7725_link,
  461. },
  462. }, {
  463. .name = "soc-camera-pdrv",
  464. .id = 1,
  465. .dev = {
  466. .platform_data = &camera_link,
  467. },
  468. },
  469. };
  470. static struct platform_device *ap325rxa_devices[] __initdata = {
  471. &smsc9118_device,
  472. &ap325rxa_nor_flash_device,
  473. &lcdc_device,
  474. &ceu_device,
  475. &nand_flash_device,
  476. &sdhi0_cn3_device,
  477. &sdhi1_cn7_device,
  478. &ap325rxa_camera[0],
  479. &ap325rxa_camera[1],
  480. };
  481. extern char ap325rxa_sdram_enter_start;
  482. extern char ap325rxa_sdram_enter_end;
  483. extern char ap325rxa_sdram_leave_start;
  484. extern char ap325rxa_sdram_leave_end;
  485. static int __init ap325rxa_devices_setup(void)
  486. {
  487. /* register board specific self-refresh code */
  488. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
  489. &ap325rxa_sdram_enter_start,
  490. &ap325rxa_sdram_enter_end,
  491. &ap325rxa_sdram_leave_start,
  492. &ap325rxa_sdram_leave_end);
  493. regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
  494. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  495. regulator_register_fixed(1, dummy_supplies, ARRAY_SIZE(dummy_supplies));
  496. /* LD3 and LD4 LEDs */
  497. gpio_request(GPIO_PTX5, NULL); /* RUN */
  498. gpio_direction_output(GPIO_PTX5, 1);
  499. gpio_export(GPIO_PTX5, 0);
  500. gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
  501. gpio_direction_output(GPIO_PTX4, 0);
  502. gpio_export(GPIO_PTX4, 0);
  503. /* SW1 input */
  504. gpio_request(GPIO_PTF7, NULL); /* MODE */
  505. gpio_direction_input(GPIO_PTF7);
  506. gpio_export(GPIO_PTF7, 0);
  507. /* LCDC */
  508. gpio_request(GPIO_FN_LCDD15, NULL);
  509. gpio_request(GPIO_FN_LCDD14, NULL);
  510. gpio_request(GPIO_FN_LCDD13, NULL);
  511. gpio_request(GPIO_FN_LCDD12, NULL);
  512. gpio_request(GPIO_FN_LCDD11, NULL);
  513. gpio_request(GPIO_FN_LCDD10, NULL);
  514. gpio_request(GPIO_FN_LCDD9, NULL);
  515. gpio_request(GPIO_FN_LCDD8, NULL);
  516. gpio_request(GPIO_FN_LCDD7, NULL);
  517. gpio_request(GPIO_FN_LCDD6, NULL);
  518. gpio_request(GPIO_FN_LCDD5, NULL);
  519. gpio_request(GPIO_FN_LCDD4, NULL);
  520. gpio_request(GPIO_FN_LCDD3, NULL);
  521. gpio_request(GPIO_FN_LCDD2, NULL);
  522. gpio_request(GPIO_FN_LCDD1, NULL);
  523. gpio_request(GPIO_FN_LCDD0, NULL);
  524. gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
  525. gpio_request(GPIO_FN_LCDDCK, NULL);
  526. gpio_request(GPIO_FN_LCDVEPWC, NULL);
  527. gpio_request(GPIO_FN_LCDVCPWC, NULL);
  528. gpio_request(GPIO_FN_LCDVSYN, NULL);
  529. gpio_request(GPIO_FN_LCDHSYN, NULL);
  530. gpio_request(GPIO_FN_LCDDISP, NULL);
  531. gpio_request(GPIO_FN_LCDDON, NULL);
  532. /* LCD backlight */
  533. gpio_request(GPIO_PTS3, NULL);
  534. gpio_direction_output(GPIO_PTS3, 1);
  535. /* CEU */
  536. gpio_request(GPIO_FN_VIO_CLK2, NULL);
  537. gpio_request(GPIO_FN_VIO_VD2, NULL);
  538. gpio_request(GPIO_FN_VIO_HD2, NULL);
  539. gpio_request(GPIO_FN_VIO_FLD, NULL);
  540. gpio_request(GPIO_FN_VIO_CKO, NULL);
  541. gpio_request(GPIO_FN_VIO_D15, NULL);
  542. gpio_request(GPIO_FN_VIO_D14, NULL);
  543. gpio_request(GPIO_FN_VIO_D13, NULL);
  544. gpio_request(GPIO_FN_VIO_D12, NULL);
  545. gpio_request(GPIO_FN_VIO_D11, NULL);
  546. gpio_request(GPIO_FN_VIO_D10, NULL);
  547. gpio_request(GPIO_FN_VIO_D9, NULL);
  548. gpio_request(GPIO_FN_VIO_D8, NULL);
  549. gpio_request(GPIO_PTZ7, NULL);
  550. gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
  551. gpio_request(GPIO_PTZ6, NULL);
  552. gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
  553. gpio_request(GPIO_PTZ5, NULL);
  554. gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
  555. gpio_request(GPIO_PTZ4, NULL);
  556. gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
  557. __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
  558. /* FLCTL */
  559. gpio_request(GPIO_FN_FCE, NULL);
  560. gpio_request(GPIO_FN_NAF7, NULL);
  561. gpio_request(GPIO_FN_NAF6, NULL);
  562. gpio_request(GPIO_FN_NAF5, NULL);
  563. gpio_request(GPIO_FN_NAF4, NULL);
  564. gpio_request(GPIO_FN_NAF3, NULL);
  565. gpio_request(GPIO_FN_NAF2, NULL);
  566. gpio_request(GPIO_FN_NAF1, NULL);
  567. gpio_request(GPIO_FN_NAF0, NULL);
  568. gpio_request(GPIO_FN_FCDE, NULL);
  569. gpio_request(GPIO_FN_FOE, NULL);
  570. gpio_request(GPIO_FN_FSC, NULL);
  571. gpio_request(GPIO_FN_FWE, NULL);
  572. gpio_request(GPIO_FN_FRB, NULL);
  573. __raw_writew(0, PORT_HIZCRC);
  574. __raw_writew(0xFFFF, PORT_DRVCRA);
  575. __raw_writew(0xFFFF, PORT_DRVCRB);
  576. platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
  577. /* SDHI0 - CN3 - SD CARD */
  578. gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
  579. gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
  580. gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
  581. gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
  582. gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
  583. gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
  584. gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
  585. gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
  586. /* SDHI1 - CN7 - MICRO SD CARD */
  587. gpio_request(GPIO_FN_SDHI1CD, NULL);
  588. gpio_request(GPIO_FN_SDHI1D3, NULL);
  589. gpio_request(GPIO_FN_SDHI1D2, NULL);
  590. gpio_request(GPIO_FN_SDHI1D1, NULL);
  591. gpio_request(GPIO_FN_SDHI1D0, NULL);
  592. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  593. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  594. i2c_register_board_info(0, ap325rxa_i2c_devices,
  595. ARRAY_SIZE(ap325rxa_i2c_devices));
  596. return platform_add_devices(ap325rxa_devices,
  597. ARRAY_SIZE(ap325rxa_devices));
  598. }
  599. arch_initcall(ap325rxa_devices_setup);
  600. /* Return the board specific boot mode pin configuration */
  601. static int ap325rxa_mode_pins(void)
  602. {
  603. /* MD0=0, MD1=0, MD2=0: Clock Mode 0
  604. * MD3=0: 16-bit Area0 Bus Width
  605. * MD5=1: Little Endian
  606. * TSTMD=1, MD8=1: Test Mode Disabled
  607. */
  608. return MODE_PIN5 | MODE_PIN8;
  609. }
  610. static struct sh_machine_vector mv_ap325rxa __initmv = {
  611. .mv_name = "AP-325RXA",
  612. .mv_mode_pins = ap325rxa_mode_pins,
  613. };