lcd_qvga.c 4.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166
  1. /*
  2. * Support for SuperH MigoR Quarter VGA LCD Panel
  3. *
  4. * Copyright (C) 2008 Magnus Damm
  5. *
  6. * Based on lcd_powertip.c from Kenati Technologies Pvt Ltd.
  7. * Copyright (c) 2007 Ujjwal Pande <ujjwal@kenati.com>,
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/delay.h>
  14. #include <linux/err.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/gpio.h>
  20. #include <video/sh_mobile_lcdc.h>
  21. #include <cpu/sh7722.h>
  22. #include <mach/migor.h>
  23. /* LCD Module is a PH240320T according to board schematics. This module
  24. * is made up of a 240x320 LCD hooked up to a R61505U (or HX8347-A01?)
  25. * Driver IC. This IC is connected to the SH7722 built-in LCDC using a
  26. * SYS-80 interface configured in 16 bit mode.
  27. *
  28. * Index 0: "Device Code Read" returns 0x1505.
  29. */
  30. static void reset_lcd_module(void)
  31. {
  32. gpio_set_value(GPIO_PTH2, 0);
  33. mdelay(2);
  34. gpio_set_value(GPIO_PTH2, 1);
  35. mdelay(1);
  36. }
  37. /* DB0-DB7 are connected to D1-D8, and DB8-DB15 to D10-D17 */
  38. static unsigned long adjust_reg18(unsigned short data)
  39. {
  40. unsigned long tmp1, tmp2;
  41. tmp1 = (data<<1 | 0x00000001) & 0x000001FF;
  42. tmp2 = (data<<2 | 0x00000200) & 0x0003FE00;
  43. return tmp1 | tmp2;
  44. }
  45. static void write_reg(void *sys_ops_handle,
  46. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  47. unsigned short reg, unsigned short data)
  48. {
  49. sys_ops->write_index(sys_ops_handle, adjust_reg18(reg << 8 | data));
  50. }
  51. static void write_reg16(void *sys_ops_handle,
  52. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  53. unsigned short reg, unsigned short data)
  54. {
  55. sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
  56. sys_ops->write_data(sys_ops_handle, adjust_reg18(data));
  57. }
  58. static unsigned long read_reg16(void *sys_ops_handle,
  59. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  60. unsigned short reg)
  61. {
  62. unsigned long data;
  63. sys_ops->write_index(sys_ops_handle, adjust_reg18(reg));
  64. data = sys_ops->read_data(sys_ops_handle);
  65. return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00);
  66. }
  67. static void migor_lcd_qvga_seq(void *sys_ops_handle,
  68. struct sh_mobile_lcdc_sys_bus_ops *sys_ops,
  69. unsigned short const *data, int no_data)
  70. {
  71. int i;
  72. for (i = 0; i < no_data; i += 2)
  73. write_reg16(sys_ops_handle, sys_ops, data[i], data[i + 1]);
  74. }
  75. static const unsigned short sync_data[] = {
  76. 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
  77. };
  78. static const unsigned short magic0_data[] = {
  79. 0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001,
  80. 0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116,
  81. 0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8,
  82. };
  83. static const unsigned short magic1_data[] = {
  84. 0x0030, 0x0307, 0x0031, 0x0303, 0x0032, 0x0603, 0x0033, 0x0202,
  85. 0x0034, 0x0202, 0x0035, 0x0202, 0x0036, 0x1F1F, 0x0037, 0x0303,
  86. 0x0038, 0x0303, 0x0039, 0x0603, 0x003A, 0x0202, 0x003B, 0x0102,
  87. 0x003C, 0x0204, 0x003D, 0x0000, 0x0001, 0x0100, 0x0002, 0x0300,
  88. 0x0003, 0x5028, 0x0020, 0x00ef, 0x0021, 0x0000, 0x0004, 0x0000,
  89. 0x0009, 0x0000, 0x000A, 0x0008, 0x000C, 0x0000, 0x000D, 0x0000,
  90. 0x0015, 0x8000,
  91. };
  92. static const unsigned short magic2_data[] = {
  93. 0x0061, 0x0001, 0x0092, 0x0100, 0x0093, 0x0001, 0x0007, 0x0021,
  94. };
  95. static const unsigned short magic3_data[] = {
  96. 0x0010, 0x16B0, 0x0011, 0x0111, 0x0007, 0x0061,
  97. };
  98. int migor_lcd_qvga_setup(void *sohandle, struct sh_mobile_lcdc_sys_bus_ops *so)
  99. {
  100. unsigned long xres = 320;
  101. unsigned long yres = 240;
  102. int k;
  103. reset_lcd_module();
  104. migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
  105. if (read_reg16(sohandle, so, 0) != 0x1505)
  106. return -ENODEV;
  107. pr_info("Migo-R QVGA LCD Module detected.\n");
  108. migor_lcd_qvga_seq(sohandle, so, sync_data, ARRAY_SIZE(sync_data));
  109. write_reg16(sohandle, so, 0x00A4, 0x0001);
  110. mdelay(10);
  111. migor_lcd_qvga_seq(sohandle, so, magic0_data, ARRAY_SIZE(magic0_data));
  112. mdelay(100);
  113. migor_lcd_qvga_seq(sohandle, so, magic1_data, ARRAY_SIZE(magic1_data));
  114. write_reg16(sohandle, so, 0x0050, 0xef - (yres - 1));
  115. write_reg16(sohandle, so, 0x0051, 0x00ef);
  116. write_reg16(sohandle, so, 0x0052, 0x0000);
  117. write_reg16(sohandle, so, 0x0053, xres - 1);
  118. migor_lcd_qvga_seq(sohandle, so, magic2_data, ARRAY_SIZE(magic2_data));
  119. mdelay(10);
  120. migor_lcd_qvga_seq(sohandle, so, magic3_data, ARRAY_SIZE(magic3_data));
  121. mdelay(40);
  122. /* clear GRAM to avoid displaying garbage */
  123. write_reg16(sohandle, so, 0x0020, 0x0000); /* horiz addr */
  124. write_reg16(sohandle, so, 0x0021, 0x0000); /* vert addr */
  125. for (k = 0; k < (xres * 256); k++) /* yes, 256 words per line */
  126. write_reg16(sohandle, so, 0x0022, 0x0000);
  127. write_reg16(sohandle, so, 0x0020, 0x0000); /* reset horiz addr */
  128. write_reg16(sohandle, so, 0x0021, 0x0000); /* reset vert addr */
  129. write_reg16(sohandle, so, 0x0007, 0x0173);
  130. mdelay(40);
  131. /* enable display */
  132. write_reg(sohandle, so, 0x00, 0x22);
  133. mdelay(100);
  134. return 0;
  135. }