hw_breakpoint.c 8.6 KB

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  1. /*
  2. * arch/sh/kernel/hw_breakpoint.c
  3. *
  4. * Unified kernel/user-space hardware breakpoint facility for the on-chip UBC.
  5. *
  6. * Copyright (C) 2009 - 2010 Paul Mundt
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/perf_event.h>
  14. #include <linux/hw_breakpoint.h>
  15. #include <linux/percpu.h>
  16. #include <linux/kallsyms.h>
  17. #include <linux/notifier.h>
  18. #include <linux/kprobes.h>
  19. #include <linux/kdebug.h>
  20. #include <linux/io.h>
  21. #include <linux/clk.h>
  22. #include <asm/hw_breakpoint.h>
  23. #include <asm/mmu_context.h>
  24. #include <asm/ptrace.h>
  25. #include <asm/traps.h>
  26. /*
  27. * Stores the breakpoints currently in use on each breakpoint address
  28. * register for each cpus
  29. */
  30. static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  31. /*
  32. * A dummy placeholder for early accesses until the CPUs get a chance to
  33. * register their UBCs later in the boot process.
  34. */
  35. static struct sh_ubc ubc_dummy = { .num_events = 0 };
  36. static struct sh_ubc *sh_ubc __read_mostly = &ubc_dummy;
  37. /*
  38. * Install a perf counter breakpoint.
  39. *
  40. * We seek a free UBC channel and use it for this breakpoint.
  41. *
  42. * Atomic: we hold the counter->ctx->lock and we only handle variables
  43. * and registers local to this cpu.
  44. */
  45. int arch_install_hw_breakpoint(struct perf_event *bp)
  46. {
  47. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  48. int i;
  49. for (i = 0; i < sh_ubc->num_events; i++) {
  50. struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
  51. if (!*slot) {
  52. *slot = bp;
  53. break;
  54. }
  55. }
  56. if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
  57. return -EBUSY;
  58. clk_enable(sh_ubc->clk);
  59. sh_ubc->enable(info, i);
  60. return 0;
  61. }
  62. /*
  63. * Uninstall the breakpoint contained in the given counter.
  64. *
  65. * First we search the debug address register it uses and then we disable
  66. * it.
  67. *
  68. * Atomic: we hold the counter->ctx->lock and we only handle variables
  69. * and registers local to this cpu.
  70. */
  71. void arch_uninstall_hw_breakpoint(struct perf_event *bp)
  72. {
  73. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  74. int i;
  75. for (i = 0; i < sh_ubc->num_events; i++) {
  76. struct perf_event **slot = this_cpu_ptr(&bp_per_reg[i]);
  77. if (*slot == bp) {
  78. *slot = NULL;
  79. break;
  80. }
  81. }
  82. if (WARN_ONCE(i == sh_ubc->num_events, "Can't find any breakpoint slot"))
  83. return;
  84. sh_ubc->disable(info, i);
  85. clk_disable(sh_ubc->clk);
  86. }
  87. static int get_hbp_len(u16 hbp_len)
  88. {
  89. unsigned int len_in_bytes = 0;
  90. switch (hbp_len) {
  91. case SH_BREAKPOINT_LEN_1:
  92. len_in_bytes = 1;
  93. break;
  94. case SH_BREAKPOINT_LEN_2:
  95. len_in_bytes = 2;
  96. break;
  97. case SH_BREAKPOINT_LEN_4:
  98. len_in_bytes = 4;
  99. break;
  100. case SH_BREAKPOINT_LEN_8:
  101. len_in_bytes = 8;
  102. break;
  103. }
  104. return len_in_bytes;
  105. }
  106. /*
  107. * Check for virtual address in kernel space.
  108. */
  109. int arch_check_bp_in_kernelspace(struct perf_event *bp)
  110. {
  111. unsigned int len;
  112. unsigned long va;
  113. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  114. va = info->address;
  115. len = get_hbp_len(info->len);
  116. return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
  117. }
  118. int arch_bp_generic_fields(int sh_len, int sh_type,
  119. int *gen_len, int *gen_type)
  120. {
  121. /* Len */
  122. switch (sh_len) {
  123. case SH_BREAKPOINT_LEN_1:
  124. *gen_len = HW_BREAKPOINT_LEN_1;
  125. break;
  126. case SH_BREAKPOINT_LEN_2:
  127. *gen_len = HW_BREAKPOINT_LEN_2;
  128. break;
  129. case SH_BREAKPOINT_LEN_4:
  130. *gen_len = HW_BREAKPOINT_LEN_4;
  131. break;
  132. case SH_BREAKPOINT_LEN_8:
  133. *gen_len = HW_BREAKPOINT_LEN_8;
  134. break;
  135. default:
  136. return -EINVAL;
  137. }
  138. /* Type */
  139. switch (sh_type) {
  140. case SH_BREAKPOINT_READ:
  141. *gen_type = HW_BREAKPOINT_R;
  142. case SH_BREAKPOINT_WRITE:
  143. *gen_type = HW_BREAKPOINT_W;
  144. break;
  145. case SH_BREAKPOINT_RW:
  146. *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
  147. break;
  148. default:
  149. return -EINVAL;
  150. }
  151. return 0;
  152. }
  153. static int arch_build_bp_info(struct perf_event *bp)
  154. {
  155. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  156. info->address = bp->attr.bp_addr;
  157. /* Len */
  158. switch (bp->attr.bp_len) {
  159. case HW_BREAKPOINT_LEN_1:
  160. info->len = SH_BREAKPOINT_LEN_1;
  161. break;
  162. case HW_BREAKPOINT_LEN_2:
  163. info->len = SH_BREAKPOINT_LEN_2;
  164. break;
  165. case HW_BREAKPOINT_LEN_4:
  166. info->len = SH_BREAKPOINT_LEN_4;
  167. break;
  168. case HW_BREAKPOINT_LEN_8:
  169. info->len = SH_BREAKPOINT_LEN_8;
  170. break;
  171. default:
  172. return -EINVAL;
  173. }
  174. /* Type */
  175. switch (bp->attr.bp_type) {
  176. case HW_BREAKPOINT_R:
  177. info->type = SH_BREAKPOINT_READ;
  178. break;
  179. case HW_BREAKPOINT_W:
  180. info->type = SH_BREAKPOINT_WRITE;
  181. break;
  182. case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
  183. info->type = SH_BREAKPOINT_RW;
  184. break;
  185. default:
  186. return -EINVAL;
  187. }
  188. return 0;
  189. }
  190. /*
  191. * Validate the arch-specific HW Breakpoint register settings
  192. */
  193. int arch_validate_hwbkpt_settings(struct perf_event *bp)
  194. {
  195. struct arch_hw_breakpoint *info = counter_arch_bp(bp);
  196. unsigned int align;
  197. int ret;
  198. ret = arch_build_bp_info(bp);
  199. if (ret)
  200. return ret;
  201. ret = -EINVAL;
  202. switch (info->len) {
  203. case SH_BREAKPOINT_LEN_1:
  204. align = 0;
  205. break;
  206. case SH_BREAKPOINT_LEN_2:
  207. align = 1;
  208. break;
  209. case SH_BREAKPOINT_LEN_4:
  210. align = 3;
  211. break;
  212. case SH_BREAKPOINT_LEN_8:
  213. align = 7;
  214. break;
  215. default:
  216. return ret;
  217. }
  218. /*
  219. * For kernel-addresses, either the address or symbol name can be
  220. * specified.
  221. */
  222. if (info->name)
  223. info->address = (unsigned long)kallsyms_lookup_name(info->name);
  224. /*
  225. * Check that the low-order bits of the address are appropriate
  226. * for the alignment implied by len.
  227. */
  228. if (info->address & align)
  229. return -EINVAL;
  230. return 0;
  231. }
  232. /*
  233. * Release the user breakpoints used by ptrace
  234. */
  235. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  236. {
  237. int i;
  238. struct thread_struct *t = &tsk->thread;
  239. for (i = 0; i < sh_ubc->num_events; i++) {
  240. unregister_hw_breakpoint(t->ptrace_bps[i]);
  241. t->ptrace_bps[i] = NULL;
  242. }
  243. }
  244. static int __kprobes hw_breakpoint_handler(struct die_args *args)
  245. {
  246. int cpu, i, rc = NOTIFY_STOP;
  247. struct perf_event *bp;
  248. unsigned int cmf, resume_mask;
  249. /*
  250. * Do an early return if none of the channels triggered.
  251. */
  252. cmf = sh_ubc->triggered_mask();
  253. if (unlikely(!cmf))
  254. return NOTIFY_DONE;
  255. /*
  256. * By default, resume all of the active channels.
  257. */
  258. resume_mask = sh_ubc->active_mask();
  259. /*
  260. * Disable breakpoints during exception handling.
  261. */
  262. sh_ubc->disable_all();
  263. cpu = get_cpu();
  264. for (i = 0; i < sh_ubc->num_events; i++) {
  265. unsigned long event_mask = (1 << i);
  266. if (likely(!(cmf & event_mask)))
  267. continue;
  268. /*
  269. * The counter may be concurrently released but that can only
  270. * occur from a call_rcu() path. We can then safely fetch
  271. * the breakpoint, use its callback, touch its counter
  272. * while we are in an rcu_read_lock() path.
  273. */
  274. rcu_read_lock();
  275. bp = per_cpu(bp_per_reg[i], cpu);
  276. if (bp)
  277. rc = NOTIFY_DONE;
  278. /*
  279. * Reset the condition match flag to denote completion of
  280. * exception handling.
  281. */
  282. sh_ubc->clear_triggered_mask(event_mask);
  283. /*
  284. * bp can be NULL due to concurrent perf counter
  285. * removing.
  286. */
  287. if (!bp) {
  288. rcu_read_unlock();
  289. break;
  290. }
  291. /*
  292. * Don't restore the channel if the breakpoint is from
  293. * ptrace, as it always operates in one-shot mode.
  294. */
  295. if (bp->overflow_handler == ptrace_triggered)
  296. resume_mask &= ~(1 << i);
  297. perf_bp_event(bp, args->regs);
  298. /* Deliver the signal to userspace */
  299. if (!arch_check_bp_in_kernelspace(bp)) {
  300. siginfo_t info;
  301. info.si_signo = args->signr;
  302. info.si_errno = notifier_to_errno(rc);
  303. info.si_code = TRAP_HWBKPT;
  304. force_sig_info(args->signr, &info, current);
  305. }
  306. rcu_read_unlock();
  307. }
  308. if (cmf == 0)
  309. rc = NOTIFY_DONE;
  310. sh_ubc->enable_all(resume_mask);
  311. put_cpu();
  312. return rc;
  313. }
  314. BUILD_TRAP_HANDLER(breakpoint)
  315. {
  316. unsigned long ex = lookup_exception_vector();
  317. TRAP_HANDLER_DECL;
  318. notify_die(DIE_BREAKPOINT, "breakpoint", regs, 0, ex, SIGTRAP);
  319. }
  320. /*
  321. * Handle debug exception notifications.
  322. */
  323. int __kprobes hw_breakpoint_exceptions_notify(struct notifier_block *unused,
  324. unsigned long val, void *data)
  325. {
  326. struct die_args *args = data;
  327. if (val != DIE_BREAKPOINT)
  328. return NOTIFY_DONE;
  329. /*
  330. * If the breakpoint hasn't been triggered by the UBC, it's
  331. * probably from a debugger, so don't do anything more here.
  332. *
  333. * This also permits the UBC interface clock to remain off for
  334. * non-UBC breakpoints, as we don't need to check the triggered
  335. * or active channel masks.
  336. */
  337. if (args->trapnr != sh_ubc->trap_nr)
  338. return NOTIFY_DONE;
  339. return hw_breakpoint_handler(data);
  340. }
  341. void hw_breakpoint_pmu_read(struct perf_event *bp)
  342. {
  343. /* TODO */
  344. }
  345. int register_sh_ubc(struct sh_ubc *ubc)
  346. {
  347. /* Bail if it's already assigned */
  348. if (sh_ubc != &ubc_dummy)
  349. return -EBUSY;
  350. sh_ubc = ubc;
  351. pr_info("HW Breakpoints: %s UBC support registered\n", ubc->name);
  352. WARN_ON(ubc->num_events > HBP_NUM);
  353. return 0;
  354. }