ioport.c 19 KB

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  1. /*
  2. * ioport.c: Simple io mapping allocator.
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
  6. *
  7. * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
  8. *
  9. * 2000/01/29
  10. * <rth> zait: as long as pci_alloc_consistent produces something addressable,
  11. * things are ok.
  12. * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
  13. * pointer into the big page mapping
  14. * <rth> zait: so what?
  15. * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
  16. * <zaitcev> Hmm
  17. * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
  18. * So far so good.
  19. * <zaitcev> Now, driver calls pci_free_consistent(with result of
  20. * remap_it_my_way()).
  21. * <zaitcev> How do you find the address to pass to free_pages()?
  22. * <rth> zait: walk the page tables? It's only two or three level after all.
  23. * <rth> zait: you have to walk them anyway to remove the mapping.
  24. * <zaitcev> Hmm
  25. * <zaitcev> Sounds reasonable
  26. */
  27. #include <linux/module.h>
  28. #include <linux/sched.h>
  29. #include <linux/kernel.h>
  30. #include <linux/errno.h>
  31. #include <linux/types.h>
  32. #include <linux/ioport.h>
  33. #include <linux/mm.h>
  34. #include <linux/slab.h>
  35. #include <linux/pci.h> /* struct pci_dev */
  36. #include <linux/proc_fs.h>
  37. #include <linux/seq_file.h>
  38. #include <linux/scatterlist.h>
  39. #include <linux/of_device.h>
  40. #include <asm/io.h>
  41. #include <asm/vaddrs.h>
  42. #include <asm/oplib.h>
  43. #include <asm/prom.h>
  44. #include <asm/page.h>
  45. #include <asm/pgalloc.h>
  46. #include <asm/dma.h>
  47. #include <asm/iommu.h>
  48. #include <asm/io-unit.h>
  49. #include <asm/leon.h>
  50. const struct sparc32_dma_ops *sparc32_dma_ops;
  51. /* This function must make sure that caches and memory are coherent after DMA
  52. * On LEON systems without cache snooping it flushes the entire D-CACHE.
  53. */
  54. static inline void dma_make_coherent(unsigned long pa, unsigned long len)
  55. {
  56. if (sparc_cpu_model == sparc_leon) {
  57. if (!sparc_leon3_snooping_enabled())
  58. leon_flush_dcache_all();
  59. }
  60. }
  61. static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
  62. static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
  63. unsigned long size, char *name);
  64. static void _sparc_free_io(struct resource *res);
  65. static void register_proc_sparc_ioport(void);
  66. /* This points to the next to use virtual memory for DVMA mappings */
  67. static struct resource _sparc_dvma = {
  68. .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
  69. };
  70. /* This points to the start of I/O mappings, cluable from outside. */
  71. /*ext*/ struct resource sparc_iomap = {
  72. .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
  73. };
  74. /*
  75. * Our mini-allocator...
  76. * Boy this is gross! We need it because we must map I/O for
  77. * timers and interrupt controller before the kmalloc is available.
  78. */
  79. #define XNMLN 15
  80. #define XNRES 10 /* SS-10 uses 8 */
  81. struct xresource {
  82. struct resource xres; /* Must be first */
  83. int xflag; /* 1 == used */
  84. char xname[XNMLN+1];
  85. };
  86. static struct xresource xresv[XNRES];
  87. static struct xresource *xres_alloc(void) {
  88. struct xresource *xrp;
  89. int n;
  90. xrp = xresv;
  91. for (n = 0; n < XNRES; n++) {
  92. if (xrp->xflag == 0) {
  93. xrp->xflag = 1;
  94. return xrp;
  95. }
  96. xrp++;
  97. }
  98. return NULL;
  99. }
  100. static void xres_free(struct xresource *xrp) {
  101. xrp->xflag = 0;
  102. }
  103. /*
  104. * These are typically used in PCI drivers
  105. * which are trying to be cross-platform.
  106. *
  107. * Bus type is always zero on IIep.
  108. */
  109. void __iomem *ioremap(unsigned long offset, unsigned long size)
  110. {
  111. char name[14];
  112. sprintf(name, "phys_%08x", (u32)offset);
  113. return _sparc_alloc_io(0, offset, size, name);
  114. }
  115. EXPORT_SYMBOL(ioremap);
  116. /*
  117. * Comlimentary to ioremap().
  118. */
  119. void iounmap(volatile void __iomem *virtual)
  120. {
  121. unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
  122. struct resource *res;
  123. /*
  124. * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
  125. * This probably warrants some sort of hashing.
  126. */
  127. if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
  128. printk("free_io/iounmap: cannot free %lx\n", vaddr);
  129. return;
  130. }
  131. _sparc_free_io(res);
  132. if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
  133. xres_free((struct xresource *)res);
  134. } else {
  135. kfree(res);
  136. }
  137. }
  138. EXPORT_SYMBOL(iounmap);
  139. void __iomem *of_ioremap(struct resource *res, unsigned long offset,
  140. unsigned long size, char *name)
  141. {
  142. return _sparc_alloc_io(res->flags & 0xF,
  143. res->start + offset,
  144. size, name);
  145. }
  146. EXPORT_SYMBOL(of_ioremap);
  147. void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
  148. {
  149. iounmap(base);
  150. }
  151. EXPORT_SYMBOL(of_iounmap);
  152. /*
  153. * Meat of mapping
  154. */
  155. static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
  156. unsigned long size, char *name)
  157. {
  158. static int printed_full;
  159. struct xresource *xres;
  160. struct resource *res;
  161. char *tack;
  162. int tlen;
  163. void __iomem *va; /* P3 diag */
  164. if (name == NULL) name = "???";
  165. if ((xres = xres_alloc()) != NULL) {
  166. tack = xres->xname;
  167. res = &xres->xres;
  168. } else {
  169. if (!printed_full) {
  170. printk("ioremap: done with statics, switching to malloc\n");
  171. printed_full = 1;
  172. }
  173. tlen = strlen(name);
  174. tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
  175. if (tack == NULL) return NULL;
  176. memset(tack, 0, sizeof(struct resource));
  177. res = (struct resource *) tack;
  178. tack += sizeof (struct resource);
  179. }
  180. strlcpy(tack, name, XNMLN+1);
  181. res->name = tack;
  182. va = _sparc_ioremap(res, busno, phys, size);
  183. /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
  184. return va;
  185. }
  186. /*
  187. */
  188. static void __iomem *
  189. _sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
  190. {
  191. unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
  192. if (allocate_resource(&sparc_iomap, res,
  193. (offset + sz + PAGE_SIZE-1) & PAGE_MASK,
  194. sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
  195. /* Usually we cannot see printks in this case. */
  196. prom_printf("alloc_io_res(%s): cannot occupy\n",
  197. (res->name != NULL)? res->name: "???");
  198. prom_halt();
  199. }
  200. pa &= PAGE_MASK;
  201. srmmu_mapiorange(bus, pa, res->start, resource_size(res));
  202. return (void __iomem *)(unsigned long)(res->start + offset);
  203. }
  204. /*
  205. * Comlimentary to _sparc_ioremap().
  206. */
  207. static void _sparc_free_io(struct resource *res)
  208. {
  209. unsigned long plen;
  210. plen = resource_size(res);
  211. BUG_ON((plen & (PAGE_SIZE-1)) != 0);
  212. srmmu_unmapiorange(res->start, plen);
  213. release_resource(res);
  214. }
  215. #ifdef CONFIG_SBUS
  216. void sbus_set_sbus64(struct device *dev, int x)
  217. {
  218. printk("sbus_set_sbus64: unsupported\n");
  219. }
  220. EXPORT_SYMBOL(sbus_set_sbus64);
  221. /*
  222. * Allocate a chunk of memory suitable for DMA.
  223. * Typically devices use them for control blocks.
  224. * CPU may access them without any explicit flushing.
  225. */
  226. static void *sbus_alloc_coherent(struct device *dev, size_t len,
  227. dma_addr_t *dma_addrp, gfp_t gfp,
  228. struct dma_attrs *attrs)
  229. {
  230. struct platform_device *op = to_platform_device(dev);
  231. unsigned long len_total = PAGE_ALIGN(len);
  232. unsigned long va;
  233. struct resource *res;
  234. int order;
  235. /* XXX why are some lengths signed, others unsigned? */
  236. if (len <= 0) {
  237. return NULL;
  238. }
  239. /* XXX So what is maxphys for us and how do drivers know it? */
  240. if (len > 256*1024) { /* __get_free_pages() limit */
  241. return NULL;
  242. }
  243. order = get_order(len_total);
  244. va = __get_free_pages(gfp, order);
  245. if (va == 0)
  246. goto err_nopages;
  247. if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
  248. goto err_nomem;
  249. if (allocate_resource(&_sparc_dvma, res, len_total,
  250. _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
  251. printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
  252. goto err_nova;
  253. }
  254. // XXX The sbus_map_dma_area does this for us below, see comments.
  255. // srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
  256. /*
  257. * XXX That's where sdev would be used. Currently we load
  258. * all iommu tables with the same translations.
  259. */
  260. if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
  261. goto err_noiommu;
  262. res->name = op->dev.of_node->name;
  263. return (void *)(unsigned long)res->start;
  264. err_noiommu:
  265. release_resource(res);
  266. err_nova:
  267. kfree(res);
  268. err_nomem:
  269. free_pages(va, order);
  270. err_nopages:
  271. return NULL;
  272. }
  273. static void sbus_free_coherent(struct device *dev, size_t n, void *p,
  274. dma_addr_t ba, struct dma_attrs *attrs)
  275. {
  276. struct resource *res;
  277. struct page *pgv;
  278. if ((res = lookup_resource(&_sparc_dvma,
  279. (unsigned long)p)) == NULL) {
  280. printk("sbus_free_consistent: cannot free %p\n", p);
  281. return;
  282. }
  283. if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
  284. printk("sbus_free_consistent: unaligned va %p\n", p);
  285. return;
  286. }
  287. n = PAGE_ALIGN(n);
  288. if (resource_size(res) != n) {
  289. printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
  290. (long)resource_size(res), n);
  291. return;
  292. }
  293. release_resource(res);
  294. kfree(res);
  295. pgv = virt_to_page(p);
  296. sbus_unmap_dma_area(dev, ba, n);
  297. __free_pages(pgv, get_order(n));
  298. }
  299. /*
  300. * Map a chunk of memory so that devices can see it.
  301. * CPU view of this memory may be inconsistent with
  302. * a device view and explicit flushing is necessary.
  303. */
  304. static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
  305. unsigned long offset, size_t len,
  306. enum dma_data_direction dir,
  307. struct dma_attrs *attrs)
  308. {
  309. void *va = page_address(page) + offset;
  310. /* XXX why are some lengths signed, others unsigned? */
  311. if (len <= 0) {
  312. return 0;
  313. }
  314. /* XXX So what is maxphys for us and how do drivers know it? */
  315. if (len > 256*1024) { /* __get_free_pages() limit */
  316. return 0;
  317. }
  318. return mmu_get_scsi_one(dev, va, len);
  319. }
  320. static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
  321. enum dma_data_direction dir, struct dma_attrs *attrs)
  322. {
  323. mmu_release_scsi_one(dev, ba, n);
  324. }
  325. static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
  326. enum dma_data_direction dir, struct dma_attrs *attrs)
  327. {
  328. mmu_get_scsi_sgl(dev, sg, n);
  329. return n;
  330. }
  331. static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
  332. enum dma_data_direction dir, struct dma_attrs *attrs)
  333. {
  334. mmu_release_scsi_sgl(dev, sg, n);
  335. }
  336. static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
  337. int n, enum dma_data_direction dir)
  338. {
  339. BUG();
  340. }
  341. static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
  342. int n, enum dma_data_direction dir)
  343. {
  344. BUG();
  345. }
  346. static struct dma_map_ops sbus_dma_ops = {
  347. .alloc = sbus_alloc_coherent,
  348. .free = sbus_free_coherent,
  349. .map_page = sbus_map_page,
  350. .unmap_page = sbus_unmap_page,
  351. .map_sg = sbus_map_sg,
  352. .unmap_sg = sbus_unmap_sg,
  353. .sync_sg_for_cpu = sbus_sync_sg_for_cpu,
  354. .sync_sg_for_device = sbus_sync_sg_for_device,
  355. };
  356. static int __init sparc_register_ioport(void)
  357. {
  358. register_proc_sparc_ioport();
  359. return 0;
  360. }
  361. arch_initcall(sparc_register_ioport);
  362. #endif /* CONFIG_SBUS */
  363. /* Allocate and map kernel buffer using consistent mode DMA for a device.
  364. * hwdev should be valid struct pci_dev pointer for PCI devices.
  365. */
  366. static void *pci32_alloc_coherent(struct device *dev, size_t len,
  367. dma_addr_t *pba, gfp_t gfp,
  368. struct dma_attrs *attrs)
  369. {
  370. unsigned long len_total = PAGE_ALIGN(len);
  371. void *va;
  372. struct resource *res;
  373. int order;
  374. if (len == 0) {
  375. return NULL;
  376. }
  377. if (len > 256*1024) { /* __get_free_pages() limit */
  378. return NULL;
  379. }
  380. order = get_order(len_total);
  381. va = (void *) __get_free_pages(gfp, order);
  382. if (va == NULL) {
  383. printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
  384. goto err_nopages;
  385. }
  386. if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
  387. printk("pci_alloc_consistent: no core\n");
  388. goto err_nomem;
  389. }
  390. if (allocate_resource(&_sparc_dvma, res, len_total,
  391. _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
  392. printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
  393. goto err_nova;
  394. }
  395. srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
  396. *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
  397. return (void *) res->start;
  398. err_nova:
  399. kfree(res);
  400. err_nomem:
  401. free_pages((unsigned long)va, order);
  402. err_nopages:
  403. return NULL;
  404. }
  405. /* Free and unmap a consistent DMA buffer.
  406. * cpu_addr is what was returned from pci_alloc_consistent,
  407. * size must be the same as what as passed into pci_alloc_consistent,
  408. * and likewise dma_addr must be the same as what *dma_addrp was set to.
  409. *
  410. * References to the memory and mappings associated with cpu_addr/dma_addr
  411. * past this call are illegal.
  412. */
  413. static void pci32_free_coherent(struct device *dev, size_t n, void *p,
  414. dma_addr_t ba, struct dma_attrs *attrs)
  415. {
  416. struct resource *res;
  417. if ((res = lookup_resource(&_sparc_dvma,
  418. (unsigned long)p)) == NULL) {
  419. printk("pci_free_consistent: cannot free %p\n", p);
  420. return;
  421. }
  422. if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
  423. printk("pci_free_consistent: unaligned va %p\n", p);
  424. return;
  425. }
  426. n = PAGE_ALIGN(n);
  427. if (resource_size(res) != n) {
  428. printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
  429. (long)resource_size(res), (long)n);
  430. return;
  431. }
  432. dma_make_coherent(ba, n);
  433. srmmu_unmapiorange((unsigned long)p, n);
  434. release_resource(res);
  435. kfree(res);
  436. free_pages((unsigned long)phys_to_virt(ba), get_order(n));
  437. }
  438. /*
  439. * Same as pci_map_single, but with pages.
  440. */
  441. static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
  442. unsigned long offset, size_t size,
  443. enum dma_data_direction dir,
  444. struct dma_attrs *attrs)
  445. {
  446. /* IIep is write-through, not flushing. */
  447. return page_to_phys(page) + offset;
  448. }
  449. static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size,
  450. enum dma_data_direction dir, struct dma_attrs *attrs)
  451. {
  452. if (dir != PCI_DMA_TODEVICE)
  453. dma_make_coherent(ba, PAGE_ALIGN(size));
  454. }
  455. /* Map a set of buffers described by scatterlist in streaming
  456. * mode for DMA. This is the scather-gather version of the
  457. * above pci_map_single interface. Here the scatter gather list
  458. * elements are each tagged with the appropriate dma address
  459. * and length. They are obtained via sg_dma_{address,length}(SG).
  460. *
  461. * NOTE: An implementation may be able to use a smaller number of
  462. * DMA address/length pairs than there are SG table elements.
  463. * (for example via virtual mapping capabilities)
  464. * The routine returns the number of addr/length pairs actually
  465. * used, at most nents.
  466. *
  467. * Device ownership issues as mentioned above for pci_map_single are
  468. * the same here.
  469. */
  470. static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
  471. int nents, enum dma_data_direction dir,
  472. struct dma_attrs *attrs)
  473. {
  474. struct scatterlist *sg;
  475. int n;
  476. /* IIep is write-through, not flushing. */
  477. for_each_sg(sgl, sg, nents, n) {
  478. sg->dma_address = sg_phys(sg);
  479. sg->dma_length = sg->length;
  480. }
  481. return nents;
  482. }
  483. /* Unmap a set of streaming mode DMA translations.
  484. * Again, cpu read rules concerning calls here are the same as for
  485. * pci_unmap_single() above.
  486. */
  487. static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
  488. int nents, enum dma_data_direction dir,
  489. struct dma_attrs *attrs)
  490. {
  491. struct scatterlist *sg;
  492. int n;
  493. if (dir != PCI_DMA_TODEVICE) {
  494. for_each_sg(sgl, sg, nents, n) {
  495. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  496. }
  497. }
  498. }
  499. /* Make physical memory consistent for a single
  500. * streaming mode DMA translation before or after a transfer.
  501. *
  502. * If you perform a pci_map_single() but wish to interrogate the
  503. * buffer using the cpu, yet do not wish to teardown the PCI dma
  504. * mapping, you must call this function before doing so. At the
  505. * next point you give the PCI dma address back to the card, you
  506. * must first perform a pci_dma_sync_for_device, and then the
  507. * device again owns the buffer.
  508. */
  509. static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
  510. size_t size, enum dma_data_direction dir)
  511. {
  512. if (dir != PCI_DMA_TODEVICE) {
  513. dma_make_coherent(ba, PAGE_ALIGN(size));
  514. }
  515. }
  516. static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
  517. size_t size, enum dma_data_direction dir)
  518. {
  519. if (dir != PCI_DMA_TODEVICE) {
  520. dma_make_coherent(ba, PAGE_ALIGN(size));
  521. }
  522. }
  523. /* Make physical memory consistent for a set of streaming
  524. * mode DMA translations after a transfer.
  525. *
  526. * The same as pci_dma_sync_single_* but for a scatter-gather list,
  527. * same rules and usage.
  528. */
  529. static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
  530. int nents, enum dma_data_direction dir)
  531. {
  532. struct scatterlist *sg;
  533. int n;
  534. if (dir != PCI_DMA_TODEVICE) {
  535. for_each_sg(sgl, sg, nents, n) {
  536. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  537. }
  538. }
  539. }
  540. static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
  541. int nents, enum dma_data_direction dir)
  542. {
  543. struct scatterlist *sg;
  544. int n;
  545. if (dir != PCI_DMA_TODEVICE) {
  546. for_each_sg(sgl, sg, nents, n) {
  547. dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
  548. }
  549. }
  550. }
  551. struct dma_map_ops pci32_dma_ops = {
  552. .alloc = pci32_alloc_coherent,
  553. .free = pci32_free_coherent,
  554. .map_page = pci32_map_page,
  555. .unmap_page = pci32_unmap_page,
  556. .map_sg = pci32_map_sg,
  557. .unmap_sg = pci32_unmap_sg,
  558. .sync_single_for_cpu = pci32_sync_single_for_cpu,
  559. .sync_single_for_device = pci32_sync_single_for_device,
  560. .sync_sg_for_cpu = pci32_sync_sg_for_cpu,
  561. .sync_sg_for_device = pci32_sync_sg_for_device,
  562. };
  563. EXPORT_SYMBOL(pci32_dma_ops);
  564. /* leon re-uses pci32_dma_ops */
  565. struct dma_map_ops *leon_dma_ops = &pci32_dma_ops;
  566. EXPORT_SYMBOL(leon_dma_ops);
  567. struct dma_map_ops *dma_ops = &sbus_dma_ops;
  568. EXPORT_SYMBOL(dma_ops);
  569. /*
  570. * Return whether the given PCI device DMA address mask can be
  571. * supported properly. For example, if your device can only drive the
  572. * low 24-bits during PCI bus mastering, then you would pass
  573. * 0x00ffffff as the mask to this function.
  574. */
  575. int dma_supported(struct device *dev, u64 mask)
  576. {
  577. if (dev_is_pci(dev))
  578. return 1;
  579. return 0;
  580. }
  581. EXPORT_SYMBOL(dma_supported);
  582. #ifdef CONFIG_PROC_FS
  583. static int sparc_io_proc_show(struct seq_file *m, void *v)
  584. {
  585. struct resource *root = m->private, *r;
  586. const char *nm;
  587. for (r = root->child; r != NULL; r = r->sibling) {
  588. if ((nm = r->name) == NULL) nm = "???";
  589. seq_printf(m, "%016llx-%016llx: %s\n",
  590. (unsigned long long)r->start,
  591. (unsigned long long)r->end, nm);
  592. }
  593. return 0;
  594. }
  595. static int sparc_io_proc_open(struct inode *inode, struct file *file)
  596. {
  597. return single_open(file, sparc_io_proc_show, PDE_DATA(inode));
  598. }
  599. static const struct file_operations sparc_io_proc_fops = {
  600. .owner = THIS_MODULE,
  601. .open = sparc_io_proc_open,
  602. .read = seq_read,
  603. .llseek = seq_lseek,
  604. .release = single_release,
  605. };
  606. #endif /* CONFIG_PROC_FS */
  607. static void register_proc_sparc_ioport(void)
  608. {
  609. #ifdef CONFIG_PROC_FS
  610. proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
  611. proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
  612. #endif
  613. }