uart.h 3.4 KB

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  1. /*
  2. * Copyright 2013 Tilera Corporation. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation, version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11. * NON INFRINGEMENT. See the GNU General Public License for
  12. * more details.
  13. */
  14. #ifndef _GXIO_UART_H_
  15. #define _GXIO_UART_H_
  16. #include "common.h"
  17. #include <hv/drv_uart_intf.h>
  18. #include <hv/iorpc.h>
  19. /*
  20. *
  21. * An API for manipulating UART interface.
  22. */
  23. /*
  24. *
  25. * The Rshim allows access to the processor's UART interface.
  26. */
  27. /* A context object used to manage UART resources. */
  28. typedef struct {
  29. /* File descriptor for calling up to the hypervisor. */
  30. int fd;
  31. /* The VA at which our MMIO registers are mapped. */
  32. char *mmio_base;
  33. } gxio_uart_context_t;
  34. /* Request UART interrupts.
  35. *
  36. * Request that interrupts be delivered to a tile when the UART's
  37. * Receive FIFO is written, or the Write FIFO is read.
  38. *
  39. * @param context Pointer to a properly initialized gxio_uart_context_t.
  40. * @param bind_cpu_x X coordinate of CPU to which interrupt will be delivered.
  41. * @param bind_cpu_y Y coordinate of CPU to which interrupt will be delivered.
  42. * @param bind_interrupt IPI interrupt number.
  43. * @param bind_event Sub-interrupt event bit number; a negative value can
  44. * disable the interrupt.
  45. * @return Zero if all of the requested UART events were successfully
  46. * configured to interrupt.
  47. */
  48. extern int gxio_uart_cfg_interrupt(gxio_uart_context_t *context,
  49. int bind_cpu_x,
  50. int bind_cpu_y,
  51. int bind_interrupt, int bind_event);
  52. /* Initialize a UART context.
  53. *
  54. * A properly initialized context must be obtained before any of the other
  55. * gxio_uart routines may be used.
  56. *
  57. * @param context Pointer to a gxio_uart_context_t, which will be initialized
  58. * by this routine, if it succeeds.
  59. * @param uart_index Index of the UART to use.
  60. * @return Zero if the context was successfully initialized, else a
  61. * GXIO_ERR_xxx error code.
  62. */
  63. extern int gxio_uart_init(gxio_uart_context_t *context, int uart_index);
  64. /* Destroy a UART context.
  65. *
  66. * Once destroyed, a context may not be used with any gxio_uart routines
  67. * other than gxio_uart_init(). After this routine returns, no further
  68. * interrupts requested on this context will be delivered. The state and
  69. * configuration of the pins which had been attached to this context are
  70. * unchanged by this operation.
  71. *
  72. * @param context Pointer to a gxio_uart_context_t.
  73. * @return Zero if the context was successfully destroyed, else a
  74. * GXIO_ERR_xxx error code.
  75. */
  76. extern int gxio_uart_destroy(gxio_uart_context_t *context);
  77. /* Write UART register.
  78. * @param context Pointer to a gxio_uart_context_t.
  79. * @param offset UART register offset.
  80. * @param word Data will be wrote to UART reigister.
  81. */
  82. extern void gxio_uart_write(gxio_uart_context_t *context, uint64_t offset,
  83. uint64_t word);
  84. /* Read UART register.
  85. * @param context Pointer to a gxio_uart_context_t.
  86. * @param offset UART register offset.
  87. * @return Data read from UART register.
  88. */
  89. extern uint64_t gxio_uart_read(gxio_uart_context_t *context, uint64_t offset);
  90. #endif /* _GXIO_UART_H_ */