setup.c 7.6 KB

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  1. /*
  2. * linux/arch/unicore32/kernel/setup.c
  3. *
  4. * Code specific to PKUnity SoC and UniCore ISA
  5. *
  6. * Copyright (C) 2001-2010 GUAN Xue-tao
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/stddef.h>
  15. #include <linux/ioport.h>
  16. #include <linux/delay.h>
  17. #include <linux/utsname.h>
  18. #include <linux/initrd.h>
  19. #include <linux/console.h>
  20. #include <linux/bootmem.h>
  21. #include <linux/seq_file.h>
  22. #include <linux/screen_info.h>
  23. #include <linux/init.h>
  24. #include <linux/root_dev.h>
  25. #include <linux/cpu.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/smp.h>
  28. #include <linux/fs.h>
  29. #include <linux/proc_fs.h>
  30. #include <linux/memblock.h>
  31. #include <linux/elf.h>
  32. #include <linux/io.h>
  33. #include <asm/cputype.h>
  34. #include <asm/sections.h>
  35. #include <asm/setup.h>
  36. #include <asm/cacheflush.h>
  37. #include <asm/tlbflush.h>
  38. #include <asm/traps.h>
  39. #include <asm/memblock.h>
  40. #include "setup.h"
  41. #ifndef MEM_SIZE
  42. #define MEM_SIZE (16*1024*1024)
  43. #endif
  44. struct stack {
  45. u32 irq[3];
  46. u32 abt[3];
  47. u32 und[3];
  48. } ____cacheline_aligned;
  49. static struct stack stacks[NR_CPUS];
  50. #ifdef CONFIG_VGA_CONSOLE
  51. struct screen_info screen_info;
  52. #endif
  53. char elf_platform[ELF_PLATFORM_SIZE];
  54. EXPORT_SYMBOL(elf_platform);
  55. static char __initdata cmd_line[COMMAND_LINE_SIZE];
  56. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  57. /*
  58. * Standard memory resources
  59. */
  60. static struct resource mem_res[] = {
  61. {
  62. .name = "Kernel code",
  63. .start = 0,
  64. .end = 0,
  65. .flags = IORESOURCE_MEM
  66. },
  67. {
  68. .name = "Kernel data",
  69. .start = 0,
  70. .end = 0,
  71. .flags = IORESOURCE_MEM
  72. }
  73. };
  74. #define kernel_code mem_res[0]
  75. #define kernel_data mem_res[1]
  76. /*
  77. * These functions re-use the assembly code in head.S, which
  78. * already provide the required functionality.
  79. */
  80. static void __init setup_processor(void)
  81. {
  82. printk(KERN_DEFAULT "CPU: UniCore-II [%08x] revision %d, cr=%08lx\n",
  83. uc32_cpuid, (int)(uc32_cpuid >> 16) & 15, cr_alignment);
  84. sprintf(init_utsname()->machine, "puv3");
  85. sprintf(elf_platform, "ucv2");
  86. }
  87. /*
  88. * cpu_init - initialise one CPU.
  89. *
  90. * cpu_init sets up the per-CPU stacks.
  91. */
  92. void cpu_init(void)
  93. {
  94. unsigned int cpu = smp_processor_id();
  95. struct stack *stk = &stacks[cpu];
  96. /*
  97. * setup stacks for re-entrant exception handlers
  98. */
  99. __asm__ (
  100. "mov.a asr, %1\n\t"
  101. "add sp, %0, %2\n\t"
  102. "mov.a asr, %3\n\t"
  103. "add sp, %0, %4\n\t"
  104. "mov.a asr, %5\n\t"
  105. "add sp, %0, %6\n\t"
  106. "mov.a asr, %7"
  107. :
  108. : "r" (stk),
  109. "r" (PSR_R_BIT | PSR_I_BIT | INTR_MODE),
  110. "I" (offsetof(struct stack, irq[0])),
  111. "r" (PSR_R_BIT | PSR_I_BIT | ABRT_MODE),
  112. "I" (offsetof(struct stack, abt[0])),
  113. "r" (PSR_R_BIT | PSR_I_BIT | EXTN_MODE),
  114. "I" (offsetof(struct stack, und[0])),
  115. "r" (PSR_R_BIT | PSR_I_BIT | PRIV_MODE)
  116. : "r30", "cc");
  117. }
  118. static int __init uc32_add_memory(unsigned long start, unsigned long size)
  119. {
  120. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  121. if (meminfo.nr_banks >= NR_BANKS) {
  122. printk(KERN_CRIT "NR_BANKS too low, "
  123. "ignoring memory at %#lx\n", start);
  124. return -EINVAL;
  125. }
  126. /*
  127. * Ensure that start/size are aligned to a page boundary.
  128. * Size is appropriately rounded down, start is rounded up.
  129. */
  130. size -= start & ~PAGE_MASK;
  131. bank->start = PAGE_ALIGN(start);
  132. bank->size = size & PAGE_MASK;
  133. /*
  134. * Check whether this memory region has non-zero size or
  135. * invalid node number.
  136. */
  137. if (bank->size == 0)
  138. return -EINVAL;
  139. meminfo.nr_banks++;
  140. return 0;
  141. }
  142. /*
  143. * Pick out the memory size. We look for mem=size@start,
  144. * where start and size are "size[KkMm]"
  145. */
  146. static int __init early_mem(char *p)
  147. {
  148. static int usermem __initdata = 1;
  149. unsigned long size, start;
  150. char *endp;
  151. /*
  152. * If the user specifies memory size, we
  153. * blow away any automatically generated
  154. * size.
  155. */
  156. if (usermem) {
  157. usermem = 0;
  158. meminfo.nr_banks = 0;
  159. }
  160. start = PHYS_OFFSET;
  161. size = memparse(p, &endp);
  162. if (*endp == '@')
  163. start = memparse(endp + 1, NULL);
  164. uc32_add_memory(start, size);
  165. return 0;
  166. }
  167. early_param("mem", early_mem);
  168. static void __init
  169. request_standard_resources(struct meminfo *mi)
  170. {
  171. struct resource *res;
  172. int i;
  173. kernel_code.start = virt_to_phys(_stext);
  174. kernel_code.end = virt_to_phys(_etext - 1);
  175. kernel_data.start = virt_to_phys(_sdata);
  176. kernel_data.end = virt_to_phys(_end - 1);
  177. for (i = 0; i < mi->nr_banks; i++) {
  178. if (mi->bank[i].size == 0)
  179. continue;
  180. res = alloc_bootmem_low(sizeof(*res));
  181. res->name = "System RAM";
  182. res->start = mi->bank[i].start;
  183. res->end = mi->bank[i].start + mi->bank[i].size - 1;
  184. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  185. request_resource(&iomem_resource, res);
  186. if (kernel_code.start >= res->start &&
  187. kernel_code.end <= res->end)
  188. request_resource(res, &kernel_code);
  189. if (kernel_data.start >= res->start &&
  190. kernel_data.end <= res->end)
  191. request_resource(res, &kernel_data);
  192. }
  193. }
  194. static void (*init_machine)(void) __initdata;
  195. static int __init customize_machine(void)
  196. {
  197. /* customizes platform devices, or adds new ones */
  198. if (init_machine)
  199. init_machine();
  200. return 0;
  201. }
  202. arch_initcall(customize_machine);
  203. void __init setup_arch(char **cmdline_p)
  204. {
  205. char *from = default_command_line;
  206. setup_processor();
  207. init_mm.start_code = (unsigned long) _stext;
  208. init_mm.end_code = (unsigned long) _etext;
  209. init_mm.end_data = (unsigned long) _edata;
  210. init_mm.brk = (unsigned long) _end;
  211. /* parse_early_param needs a boot_command_line */
  212. strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  213. /* populate cmd_line too for later use, preserving boot_command_line */
  214. strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
  215. *cmdline_p = cmd_line;
  216. parse_early_param();
  217. uc32_memblock_init(&meminfo);
  218. paging_init();
  219. request_standard_resources(&meminfo);
  220. cpu_init();
  221. /*
  222. * Set up various architecture-specific pointers
  223. */
  224. init_machine = puv3_core_init;
  225. #ifdef CONFIG_VT
  226. #if defined(CONFIG_VGA_CONSOLE)
  227. conswitchp = &vga_con;
  228. #elif defined(CONFIG_DUMMY_CONSOLE)
  229. conswitchp = &dummy_con;
  230. #endif
  231. #endif
  232. early_trap_init();
  233. }
  234. static struct cpu cpuinfo_unicore;
  235. static int __init topology_init(void)
  236. {
  237. int i;
  238. for_each_possible_cpu(i)
  239. register_cpu(&cpuinfo_unicore, i);
  240. return 0;
  241. }
  242. subsys_initcall(topology_init);
  243. #ifdef CONFIG_HAVE_PROC_CPU
  244. static int __init proc_cpu_init(void)
  245. {
  246. struct proc_dir_entry *res;
  247. res = proc_mkdir("cpu", NULL);
  248. if (!res)
  249. return -ENOMEM;
  250. return 0;
  251. }
  252. fs_initcall(proc_cpu_init);
  253. #endif
  254. static int c_show(struct seq_file *m, void *v)
  255. {
  256. seq_printf(m, "Processor\t: UniCore-II rev %d (%s)\n",
  257. (int)(uc32_cpuid >> 16) & 15, elf_platform);
  258. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  259. loops_per_jiffy / (500000/HZ),
  260. (loops_per_jiffy / (5000/HZ)) % 100);
  261. /* dump out the processor features */
  262. seq_puts(m, "Features\t: CMOV UC-F64");
  263. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", uc32_cpuid >> 24);
  264. seq_printf(m, "CPU architecture: 2\n");
  265. seq_printf(m, "CPU revision\t: %d\n", (uc32_cpuid >> 16) & 15);
  266. seq_printf(m, "Cache type\t: write-back\n"
  267. "Cache clean\t: cp0 c5 ops\n"
  268. "Cache lockdown\t: not support\n"
  269. "Cache format\t: Harvard\n");
  270. seq_puts(m, "\n");
  271. seq_printf(m, "Hardware\t: PKUnity v3\n");
  272. return 0;
  273. }
  274. static void *c_start(struct seq_file *m, loff_t *pos)
  275. {
  276. return *pos < 1 ? (void *)1 : NULL;
  277. }
  278. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  279. {
  280. ++*pos;
  281. return NULL;
  282. }
  283. static void c_stop(struct seq_file *m, void *v)
  284. {
  285. }
  286. const struct seq_operations cpuinfo_op = {
  287. .start = c_start,
  288. .next = c_next,
  289. .stop = c_stop,
  290. .show = c_show
  291. };