camellia-aesni-avx-asm_64.S 33 KB

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  1. /*
  2. * x86_64/AVX/AES-NI assembler implementation of Camellia
  3. *
  4. * Copyright © 2012-2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. */
  12. /*
  13. * Version licensed under 2-clause BSD License is available at:
  14. * http://koti.mbnet.fi/axh/crypto/camellia-BSD-1.2.0-aesni1.tar.xz
  15. */
  16. #include <linux/linkage.h>
  17. #include <asm/nospec-branch.h>
  18. #define CAMELLIA_TABLE_BYTE_LEN 272
  19. /* struct camellia_ctx: */
  20. #define key_table 0
  21. #define key_length CAMELLIA_TABLE_BYTE_LEN
  22. /* register macros */
  23. #define CTX %rdi
  24. /**********************************************************************
  25. 16-way camellia
  26. **********************************************************************/
  27. #define filter_8bit(x, lo_t, hi_t, mask4bit, tmp0) \
  28. vpand x, mask4bit, tmp0; \
  29. vpandn x, mask4bit, x; \
  30. vpsrld $4, x, x; \
  31. \
  32. vpshufb tmp0, lo_t, tmp0; \
  33. vpshufb x, hi_t, x; \
  34. vpxor tmp0, x, x;
  35. /*
  36. * IN:
  37. * x0..x7: byte-sliced AB state
  38. * mem_cd: register pointer storing CD state
  39. * key: index for key material
  40. * OUT:
  41. * x0..x7: new byte-sliced CD state
  42. */
  43. #define roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2, t3, t4, t5, t6, \
  44. t7, mem_cd, key) \
  45. /* \
  46. * S-function with AES subbytes \
  47. */ \
  48. vmovdqa .Linv_shift_row, t4; \
  49. vbroadcastss .L0f0f0f0f, t7; \
  50. vmovdqa .Lpre_tf_lo_s1, t0; \
  51. vmovdqa .Lpre_tf_hi_s1, t1; \
  52. \
  53. /* AES inverse shift rows */ \
  54. vpshufb t4, x0, x0; \
  55. vpshufb t4, x7, x7; \
  56. vpshufb t4, x1, x1; \
  57. vpshufb t4, x4, x4; \
  58. vpshufb t4, x2, x2; \
  59. vpshufb t4, x5, x5; \
  60. vpshufb t4, x3, x3; \
  61. vpshufb t4, x6, x6; \
  62. \
  63. /* prefilter sboxes 1, 2 and 3 */ \
  64. vmovdqa .Lpre_tf_lo_s4, t2; \
  65. vmovdqa .Lpre_tf_hi_s4, t3; \
  66. filter_8bit(x0, t0, t1, t7, t6); \
  67. filter_8bit(x7, t0, t1, t7, t6); \
  68. filter_8bit(x1, t0, t1, t7, t6); \
  69. filter_8bit(x4, t0, t1, t7, t6); \
  70. filter_8bit(x2, t0, t1, t7, t6); \
  71. filter_8bit(x5, t0, t1, t7, t6); \
  72. \
  73. /* prefilter sbox 4 */ \
  74. vpxor t4, t4, t4; \
  75. filter_8bit(x3, t2, t3, t7, t6); \
  76. filter_8bit(x6, t2, t3, t7, t6); \
  77. \
  78. /* AES subbytes + AES shift rows */ \
  79. vmovdqa .Lpost_tf_lo_s1, t0; \
  80. vmovdqa .Lpost_tf_hi_s1, t1; \
  81. vaesenclast t4, x0, x0; \
  82. vaesenclast t4, x7, x7; \
  83. vaesenclast t4, x1, x1; \
  84. vaesenclast t4, x4, x4; \
  85. vaesenclast t4, x2, x2; \
  86. vaesenclast t4, x5, x5; \
  87. vaesenclast t4, x3, x3; \
  88. vaesenclast t4, x6, x6; \
  89. \
  90. /* postfilter sboxes 1 and 4 */ \
  91. vmovdqa .Lpost_tf_lo_s3, t2; \
  92. vmovdqa .Lpost_tf_hi_s3, t3; \
  93. filter_8bit(x0, t0, t1, t7, t6); \
  94. filter_8bit(x7, t0, t1, t7, t6); \
  95. filter_8bit(x3, t0, t1, t7, t6); \
  96. filter_8bit(x6, t0, t1, t7, t6); \
  97. \
  98. /* postfilter sbox 3 */ \
  99. vmovdqa .Lpost_tf_lo_s2, t4; \
  100. vmovdqa .Lpost_tf_hi_s2, t5; \
  101. filter_8bit(x2, t2, t3, t7, t6); \
  102. filter_8bit(x5, t2, t3, t7, t6); \
  103. \
  104. vpxor t6, t6, t6; \
  105. vmovq key, t0; \
  106. \
  107. /* postfilter sbox 2 */ \
  108. filter_8bit(x1, t4, t5, t7, t2); \
  109. filter_8bit(x4, t4, t5, t7, t2); \
  110. \
  111. vpsrldq $5, t0, t5; \
  112. vpsrldq $1, t0, t1; \
  113. vpsrldq $2, t0, t2; \
  114. vpsrldq $3, t0, t3; \
  115. vpsrldq $4, t0, t4; \
  116. vpshufb t6, t0, t0; \
  117. vpshufb t6, t1, t1; \
  118. vpshufb t6, t2, t2; \
  119. vpshufb t6, t3, t3; \
  120. vpshufb t6, t4, t4; \
  121. vpsrldq $2, t5, t7; \
  122. vpshufb t6, t7, t7; \
  123. \
  124. /* \
  125. * P-function \
  126. */ \
  127. vpxor x5, x0, x0; \
  128. vpxor x6, x1, x1; \
  129. vpxor x7, x2, x2; \
  130. vpxor x4, x3, x3; \
  131. \
  132. vpxor x2, x4, x4; \
  133. vpxor x3, x5, x5; \
  134. vpxor x0, x6, x6; \
  135. vpxor x1, x7, x7; \
  136. \
  137. vpxor x7, x0, x0; \
  138. vpxor x4, x1, x1; \
  139. vpxor x5, x2, x2; \
  140. vpxor x6, x3, x3; \
  141. \
  142. vpxor x3, x4, x4; \
  143. vpxor x0, x5, x5; \
  144. vpxor x1, x6, x6; \
  145. vpxor x2, x7, x7; /* note: high and low parts swapped */ \
  146. \
  147. /* \
  148. * Add key material and result to CD (x becomes new CD) \
  149. */ \
  150. \
  151. vpxor t3, x4, x4; \
  152. vpxor 0 * 16(mem_cd), x4, x4; \
  153. \
  154. vpxor t2, x5, x5; \
  155. vpxor 1 * 16(mem_cd), x5, x5; \
  156. \
  157. vpsrldq $1, t5, t3; \
  158. vpshufb t6, t5, t5; \
  159. vpshufb t6, t3, t6; \
  160. \
  161. vpxor t1, x6, x6; \
  162. vpxor 2 * 16(mem_cd), x6, x6; \
  163. \
  164. vpxor t0, x7, x7; \
  165. vpxor 3 * 16(mem_cd), x7, x7; \
  166. \
  167. vpxor t7, x0, x0; \
  168. vpxor 4 * 16(mem_cd), x0, x0; \
  169. \
  170. vpxor t6, x1, x1; \
  171. vpxor 5 * 16(mem_cd), x1, x1; \
  172. \
  173. vpxor t5, x2, x2; \
  174. vpxor 6 * 16(mem_cd), x2, x2; \
  175. \
  176. vpxor t4, x3, x3; \
  177. vpxor 7 * 16(mem_cd), x3, x3;
  178. /*
  179. * Size optimization... with inlined roundsm16, binary would be over 5 times
  180. * larger and would only be 0.5% faster (on sandy-bridge).
  181. */
  182. .align 8
  183. roundsm16_x0_x1_x2_x3_x4_x5_x6_x7_y0_y1_y2_y3_y4_y5_y6_y7_cd:
  184. roundsm16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  185. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14, %xmm15,
  186. %rcx, (%r9));
  187. ret;
  188. ENDPROC(roundsm16_x0_x1_x2_x3_x4_x5_x6_x7_y0_y1_y2_y3_y4_y5_y6_y7_cd)
  189. .align 8
  190. roundsm16_x4_x5_x6_x7_x0_x1_x2_x3_y4_y5_y6_y7_y0_y1_y2_y3_ab:
  191. roundsm16(%xmm4, %xmm5, %xmm6, %xmm7, %xmm0, %xmm1, %xmm2, %xmm3,
  192. %xmm12, %xmm13, %xmm14, %xmm15, %xmm8, %xmm9, %xmm10, %xmm11,
  193. %rax, (%r9));
  194. ret;
  195. ENDPROC(roundsm16_x4_x5_x6_x7_x0_x1_x2_x3_y4_y5_y6_y7_y0_y1_y2_y3_ab)
  196. /*
  197. * IN/OUT:
  198. * x0..x7: byte-sliced AB state preloaded
  199. * mem_ab: byte-sliced AB state in memory
  200. * mem_cb: byte-sliced CD state in memory
  201. */
  202. #define two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  203. y6, y7, mem_ab, mem_cd, i, dir, store_ab) \
  204. leaq (key_table + (i) * 8)(CTX), %r9; \
  205. call roundsm16_x0_x1_x2_x3_x4_x5_x6_x7_y0_y1_y2_y3_y4_y5_y6_y7_cd; \
  206. \
  207. vmovdqu x4, 0 * 16(mem_cd); \
  208. vmovdqu x5, 1 * 16(mem_cd); \
  209. vmovdqu x6, 2 * 16(mem_cd); \
  210. vmovdqu x7, 3 * 16(mem_cd); \
  211. vmovdqu x0, 4 * 16(mem_cd); \
  212. vmovdqu x1, 5 * 16(mem_cd); \
  213. vmovdqu x2, 6 * 16(mem_cd); \
  214. vmovdqu x3, 7 * 16(mem_cd); \
  215. \
  216. leaq (key_table + ((i) + (dir)) * 8)(CTX), %r9; \
  217. call roundsm16_x4_x5_x6_x7_x0_x1_x2_x3_y4_y5_y6_y7_y0_y1_y2_y3_ab; \
  218. \
  219. store_ab(x0, x1, x2, x3, x4, x5, x6, x7, mem_ab);
  220. #define dummy_store(x0, x1, x2, x3, x4, x5, x6, x7, mem_ab) /* do nothing */
  221. #define store_ab_state(x0, x1, x2, x3, x4, x5, x6, x7, mem_ab) \
  222. /* Store new AB state */ \
  223. vmovdqu x0, 0 * 16(mem_ab); \
  224. vmovdqu x1, 1 * 16(mem_ab); \
  225. vmovdqu x2, 2 * 16(mem_ab); \
  226. vmovdqu x3, 3 * 16(mem_ab); \
  227. vmovdqu x4, 4 * 16(mem_ab); \
  228. vmovdqu x5, 5 * 16(mem_ab); \
  229. vmovdqu x6, 6 * 16(mem_ab); \
  230. vmovdqu x7, 7 * 16(mem_ab);
  231. #define enc_rounds16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  232. y6, y7, mem_ab, mem_cd, i) \
  233. two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  234. y6, y7, mem_ab, mem_cd, (i) + 2, 1, store_ab_state); \
  235. two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  236. y6, y7, mem_ab, mem_cd, (i) + 4, 1, store_ab_state); \
  237. two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  238. y6, y7, mem_ab, mem_cd, (i) + 6, 1, dummy_store);
  239. #define dec_rounds16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  240. y6, y7, mem_ab, mem_cd, i) \
  241. two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  242. y6, y7, mem_ab, mem_cd, (i) + 7, -1, store_ab_state); \
  243. two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  244. y6, y7, mem_ab, mem_cd, (i) + 5, -1, store_ab_state); \
  245. two_roundsm16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  246. y6, y7, mem_ab, mem_cd, (i) + 3, -1, dummy_store);
  247. /*
  248. * IN:
  249. * v0..3: byte-sliced 32-bit integers
  250. * OUT:
  251. * v0..3: (IN <<< 1)
  252. */
  253. #define rol32_1_16(v0, v1, v2, v3, t0, t1, t2, zero) \
  254. vpcmpgtb v0, zero, t0; \
  255. vpaddb v0, v0, v0; \
  256. vpabsb t0, t0; \
  257. \
  258. vpcmpgtb v1, zero, t1; \
  259. vpaddb v1, v1, v1; \
  260. vpabsb t1, t1; \
  261. \
  262. vpcmpgtb v2, zero, t2; \
  263. vpaddb v2, v2, v2; \
  264. vpabsb t2, t2; \
  265. \
  266. vpor t0, v1, v1; \
  267. \
  268. vpcmpgtb v3, zero, t0; \
  269. vpaddb v3, v3, v3; \
  270. vpabsb t0, t0; \
  271. \
  272. vpor t1, v2, v2; \
  273. vpor t2, v3, v3; \
  274. vpor t0, v0, v0;
  275. /*
  276. * IN:
  277. * r: byte-sliced AB state in memory
  278. * l: byte-sliced CD state in memory
  279. * OUT:
  280. * x0..x7: new byte-sliced CD state
  281. */
  282. #define fls16(l, l0, l1, l2, l3, l4, l5, l6, l7, r, t0, t1, t2, t3, tt0, \
  283. tt1, tt2, tt3, kll, klr, krl, krr) \
  284. /* \
  285. * t0 = kll; \
  286. * t0 &= ll; \
  287. * lr ^= rol32(t0, 1); \
  288. */ \
  289. vpxor tt0, tt0, tt0; \
  290. vmovd kll, t0; \
  291. vpshufb tt0, t0, t3; \
  292. vpsrldq $1, t0, t0; \
  293. vpshufb tt0, t0, t2; \
  294. vpsrldq $1, t0, t0; \
  295. vpshufb tt0, t0, t1; \
  296. vpsrldq $1, t0, t0; \
  297. vpshufb tt0, t0, t0; \
  298. \
  299. vpand l0, t0, t0; \
  300. vpand l1, t1, t1; \
  301. vpand l2, t2, t2; \
  302. vpand l3, t3, t3; \
  303. \
  304. rol32_1_16(t3, t2, t1, t0, tt1, tt2, tt3, tt0); \
  305. \
  306. vpxor l4, t0, l4; \
  307. vmovdqu l4, 4 * 16(l); \
  308. vpxor l5, t1, l5; \
  309. vmovdqu l5, 5 * 16(l); \
  310. vpxor l6, t2, l6; \
  311. vmovdqu l6, 6 * 16(l); \
  312. vpxor l7, t3, l7; \
  313. vmovdqu l7, 7 * 16(l); \
  314. \
  315. /* \
  316. * t2 = krr; \
  317. * t2 |= rr; \
  318. * rl ^= t2; \
  319. */ \
  320. \
  321. vmovd krr, t0; \
  322. vpshufb tt0, t0, t3; \
  323. vpsrldq $1, t0, t0; \
  324. vpshufb tt0, t0, t2; \
  325. vpsrldq $1, t0, t0; \
  326. vpshufb tt0, t0, t1; \
  327. vpsrldq $1, t0, t0; \
  328. vpshufb tt0, t0, t0; \
  329. \
  330. vpor 4 * 16(r), t0, t0; \
  331. vpor 5 * 16(r), t1, t1; \
  332. vpor 6 * 16(r), t2, t2; \
  333. vpor 7 * 16(r), t3, t3; \
  334. \
  335. vpxor 0 * 16(r), t0, t0; \
  336. vpxor 1 * 16(r), t1, t1; \
  337. vpxor 2 * 16(r), t2, t2; \
  338. vpxor 3 * 16(r), t3, t3; \
  339. vmovdqu t0, 0 * 16(r); \
  340. vmovdqu t1, 1 * 16(r); \
  341. vmovdqu t2, 2 * 16(r); \
  342. vmovdqu t3, 3 * 16(r); \
  343. \
  344. /* \
  345. * t2 = krl; \
  346. * t2 &= rl; \
  347. * rr ^= rol32(t2, 1); \
  348. */ \
  349. vmovd krl, t0; \
  350. vpshufb tt0, t0, t3; \
  351. vpsrldq $1, t0, t0; \
  352. vpshufb tt0, t0, t2; \
  353. vpsrldq $1, t0, t0; \
  354. vpshufb tt0, t0, t1; \
  355. vpsrldq $1, t0, t0; \
  356. vpshufb tt0, t0, t0; \
  357. \
  358. vpand 0 * 16(r), t0, t0; \
  359. vpand 1 * 16(r), t1, t1; \
  360. vpand 2 * 16(r), t2, t2; \
  361. vpand 3 * 16(r), t3, t3; \
  362. \
  363. rol32_1_16(t3, t2, t1, t0, tt1, tt2, tt3, tt0); \
  364. \
  365. vpxor 4 * 16(r), t0, t0; \
  366. vpxor 5 * 16(r), t1, t1; \
  367. vpxor 6 * 16(r), t2, t2; \
  368. vpxor 7 * 16(r), t3, t3; \
  369. vmovdqu t0, 4 * 16(r); \
  370. vmovdqu t1, 5 * 16(r); \
  371. vmovdqu t2, 6 * 16(r); \
  372. vmovdqu t3, 7 * 16(r); \
  373. \
  374. /* \
  375. * t0 = klr; \
  376. * t0 |= lr; \
  377. * ll ^= t0; \
  378. */ \
  379. \
  380. vmovd klr, t0; \
  381. vpshufb tt0, t0, t3; \
  382. vpsrldq $1, t0, t0; \
  383. vpshufb tt0, t0, t2; \
  384. vpsrldq $1, t0, t0; \
  385. vpshufb tt0, t0, t1; \
  386. vpsrldq $1, t0, t0; \
  387. vpshufb tt0, t0, t0; \
  388. \
  389. vpor l4, t0, t0; \
  390. vpor l5, t1, t1; \
  391. vpor l6, t2, t2; \
  392. vpor l7, t3, t3; \
  393. \
  394. vpxor l0, t0, l0; \
  395. vmovdqu l0, 0 * 16(l); \
  396. vpxor l1, t1, l1; \
  397. vmovdqu l1, 1 * 16(l); \
  398. vpxor l2, t2, l2; \
  399. vmovdqu l2, 2 * 16(l); \
  400. vpxor l3, t3, l3; \
  401. vmovdqu l3, 3 * 16(l);
  402. #define transpose_4x4(x0, x1, x2, x3, t1, t2) \
  403. vpunpckhdq x1, x0, t2; \
  404. vpunpckldq x1, x0, x0; \
  405. \
  406. vpunpckldq x3, x2, t1; \
  407. vpunpckhdq x3, x2, x2; \
  408. \
  409. vpunpckhqdq t1, x0, x1; \
  410. vpunpcklqdq t1, x0, x0; \
  411. \
  412. vpunpckhqdq x2, t2, x3; \
  413. vpunpcklqdq x2, t2, x2;
  414. #define byteslice_16x16b(a0, b0, c0, d0, a1, b1, c1, d1, a2, b2, c2, d2, a3, \
  415. b3, c3, d3, st0, st1) \
  416. vmovdqu d2, st0; \
  417. vmovdqu d3, st1; \
  418. transpose_4x4(a0, a1, a2, a3, d2, d3); \
  419. transpose_4x4(b0, b1, b2, b3, d2, d3); \
  420. vmovdqu st0, d2; \
  421. vmovdqu st1, d3; \
  422. \
  423. vmovdqu a0, st0; \
  424. vmovdqu a1, st1; \
  425. transpose_4x4(c0, c1, c2, c3, a0, a1); \
  426. transpose_4x4(d0, d1, d2, d3, a0, a1); \
  427. \
  428. vmovdqu .Lshufb_16x16b, a0; \
  429. vmovdqu st1, a1; \
  430. vpshufb a0, a2, a2; \
  431. vpshufb a0, a3, a3; \
  432. vpshufb a0, b0, b0; \
  433. vpshufb a0, b1, b1; \
  434. vpshufb a0, b2, b2; \
  435. vpshufb a0, b3, b3; \
  436. vpshufb a0, a1, a1; \
  437. vpshufb a0, c0, c0; \
  438. vpshufb a0, c1, c1; \
  439. vpshufb a0, c2, c2; \
  440. vpshufb a0, c3, c3; \
  441. vpshufb a0, d0, d0; \
  442. vpshufb a0, d1, d1; \
  443. vpshufb a0, d2, d2; \
  444. vpshufb a0, d3, d3; \
  445. vmovdqu d3, st1; \
  446. vmovdqu st0, d3; \
  447. vpshufb a0, d3, a0; \
  448. vmovdqu d2, st0; \
  449. \
  450. transpose_4x4(a0, b0, c0, d0, d2, d3); \
  451. transpose_4x4(a1, b1, c1, d1, d2, d3); \
  452. vmovdqu st0, d2; \
  453. vmovdqu st1, d3; \
  454. \
  455. vmovdqu b0, st0; \
  456. vmovdqu b1, st1; \
  457. transpose_4x4(a2, b2, c2, d2, b0, b1); \
  458. transpose_4x4(a3, b3, c3, d3, b0, b1); \
  459. vmovdqu st0, b0; \
  460. vmovdqu st1, b1; \
  461. /* does not adjust output bytes inside vectors */
  462. /* load blocks to registers and apply pre-whitening */
  463. #define inpack16_pre(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  464. y6, y7, rio, key) \
  465. vmovq key, x0; \
  466. vpshufb .Lpack_bswap, x0, x0; \
  467. \
  468. vpxor 0 * 16(rio), x0, y7; \
  469. vpxor 1 * 16(rio), x0, y6; \
  470. vpxor 2 * 16(rio), x0, y5; \
  471. vpxor 3 * 16(rio), x0, y4; \
  472. vpxor 4 * 16(rio), x0, y3; \
  473. vpxor 5 * 16(rio), x0, y2; \
  474. vpxor 6 * 16(rio), x0, y1; \
  475. vpxor 7 * 16(rio), x0, y0; \
  476. vpxor 8 * 16(rio), x0, x7; \
  477. vpxor 9 * 16(rio), x0, x6; \
  478. vpxor 10 * 16(rio), x0, x5; \
  479. vpxor 11 * 16(rio), x0, x4; \
  480. vpxor 12 * 16(rio), x0, x3; \
  481. vpxor 13 * 16(rio), x0, x2; \
  482. vpxor 14 * 16(rio), x0, x1; \
  483. vpxor 15 * 16(rio), x0, x0;
  484. /* byteslice pre-whitened blocks and store to temporary memory */
  485. #define inpack16_post(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  486. y6, y7, mem_ab, mem_cd) \
  487. byteslice_16x16b(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, \
  488. y5, y6, y7, (mem_ab), (mem_cd)); \
  489. \
  490. vmovdqu x0, 0 * 16(mem_ab); \
  491. vmovdqu x1, 1 * 16(mem_ab); \
  492. vmovdqu x2, 2 * 16(mem_ab); \
  493. vmovdqu x3, 3 * 16(mem_ab); \
  494. vmovdqu x4, 4 * 16(mem_ab); \
  495. vmovdqu x5, 5 * 16(mem_ab); \
  496. vmovdqu x6, 6 * 16(mem_ab); \
  497. vmovdqu x7, 7 * 16(mem_ab); \
  498. vmovdqu y0, 0 * 16(mem_cd); \
  499. vmovdqu y1, 1 * 16(mem_cd); \
  500. vmovdqu y2, 2 * 16(mem_cd); \
  501. vmovdqu y3, 3 * 16(mem_cd); \
  502. vmovdqu y4, 4 * 16(mem_cd); \
  503. vmovdqu y5, 5 * 16(mem_cd); \
  504. vmovdqu y6, 6 * 16(mem_cd); \
  505. vmovdqu y7, 7 * 16(mem_cd);
  506. /* de-byteslice, apply post-whitening and store blocks */
  507. #define outunpack16(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, \
  508. y5, y6, y7, key, stack_tmp0, stack_tmp1) \
  509. byteslice_16x16b(y0, y4, x0, x4, y1, y5, x1, x5, y2, y6, x2, x6, y3, \
  510. y7, x3, x7, stack_tmp0, stack_tmp1); \
  511. \
  512. vmovdqu x0, stack_tmp0; \
  513. \
  514. vmovq key, x0; \
  515. vpshufb .Lpack_bswap, x0, x0; \
  516. \
  517. vpxor x0, y7, y7; \
  518. vpxor x0, y6, y6; \
  519. vpxor x0, y5, y5; \
  520. vpxor x0, y4, y4; \
  521. vpxor x0, y3, y3; \
  522. vpxor x0, y2, y2; \
  523. vpxor x0, y1, y1; \
  524. vpxor x0, y0, y0; \
  525. vpxor x0, x7, x7; \
  526. vpxor x0, x6, x6; \
  527. vpxor x0, x5, x5; \
  528. vpxor x0, x4, x4; \
  529. vpxor x0, x3, x3; \
  530. vpxor x0, x2, x2; \
  531. vpxor x0, x1, x1; \
  532. vpxor stack_tmp0, x0, x0;
  533. #define write_output(x0, x1, x2, x3, x4, x5, x6, x7, y0, y1, y2, y3, y4, y5, \
  534. y6, y7, rio) \
  535. vmovdqu x0, 0 * 16(rio); \
  536. vmovdqu x1, 1 * 16(rio); \
  537. vmovdqu x2, 2 * 16(rio); \
  538. vmovdqu x3, 3 * 16(rio); \
  539. vmovdqu x4, 4 * 16(rio); \
  540. vmovdqu x5, 5 * 16(rio); \
  541. vmovdqu x6, 6 * 16(rio); \
  542. vmovdqu x7, 7 * 16(rio); \
  543. vmovdqu y0, 8 * 16(rio); \
  544. vmovdqu y1, 9 * 16(rio); \
  545. vmovdqu y2, 10 * 16(rio); \
  546. vmovdqu y3, 11 * 16(rio); \
  547. vmovdqu y4, 12 * 16(rio); \
  548. vmovdqu y5, 13 * 16(rio); \
  549. vmovdqu y6, 14 * 16(rio); \
  550. vmovdqu y7, 15 * 16(rio);
  551. .data
  552. .align 16
  553. #define SHUFB_BYTES(idx) \
  554. 0 + (idx), 4 + (idx), 8 + (idx), 12 + (idx)
  555. .Lshufb_16x16b:
  556. .byte SHUFB_BYTES(0), SHUFB_BYTES(1), SHUFB_BYTES(2), SHUFB_BYTES(3);
  557. .Lpack_bswap:
  558. .long 0x00010203
  559. .long 0x04050607
  560. .long 0x80808080
  561. .long 0x80808080
  562. /* For CTR-mode IV byteswap */
  563. .Lbswap128_mask:
  564. .byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
  565. /* For XTS mode IV generation */
  566. .Lxts_gf128mul_and_shl1_mask:
  567. .byte 0x87, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0
  568. /*
  569. * pre-SubByte transform
  570. *
  571. * pre-lookup for sbox1, sbox2, sbox3:
  572. * swap_bitendianness(
  573. * isom_map_camellia_to_aes(
  574. * camellia_f(
  575. * swap_bitendianess(in)
  576. * )
  577. * )
  578. * )
  579. *
  580. * (note: '⊕ 0xc5' inside camellia_f())
  581. */
  582. .Lpre_tf_lo_s1:
  583. .byte 0x45, 0xe8, 0x40, 0xed, 0x2e, 0x83, 0x2b, 0x86
  584. .byte 0x4b, 0xe6, 0x4e, 0xe3, 0x20, 0x8d, 0x25, 0x88
  585. .Lpre_tf_hi_s1:
  586. .byte 0x00, 0x51, 0xf1, 0xa0, 0x8a, 0xdb, 0x7b, 0x2a
  587. .byte 0x09, 0x58, 0xf8, 0xa9, 0x83, 0xd2, 0x72, 0x23
  588. /*
  589. * pre-SubByte transform
  590. *
  591. * pre-lookup for sbox4:
  592. * swap_bitendianness(
  593. * isom_map_camellia_to_aes(
  594. * camellia_f(
  595. * swap_bitendianess(in <<< 1)
  596. * )
  597. * )
  598. * )
  599. *
  600. * (note: '⊕ 0xc5' inside camellia_f())
  601. */
  602. .Lpre_tf_lo_s4:
  603. .byte 0x45, 0x40, 0x2e, 0x2b, 0x4b, 0x4e, 0x20, 0x25
  604. .byte 0x14, 0x11, 0x7f, 0x7a, 0x1a, 0x1f, 0x71, 0x74
  605. .Lpre_tf_hi_s4:
  606. .byte 0x00, 0xf1, 0x8a, 0x7b, 0x09, 0xf8, 0x83, 0x72
  607. .byte 0xad, 0x5c, 0x27, 0xd6, 0xa4, 0x55, 0x2e, 0xdf
  608. /*
  609. * post-SubByte transform
  610. *
  611. * post-lookup for sbox1, sbox4:
  612. * swap_bitendianness(
  613. * camellia_h(
  614. * isom_map_aes_to_camellia(
  615. * swap_bitendianness(
  616. * aes_inverse_affine_transform(in)
  617. * )
  618. * )
  619. * )
  620. * )
  621. *
  622. * (note: '⊕ 0x6e' inside camellia_h())
  623. */
  624. .Lpost_tf_lo_s1:
  625. .byte 0x3c, 0xcc, 0xcf, 0x3f, 0x32, 0xc2, 0xc1, 0x31
  626. .byte 0xdc, 0x2c, 0x2f, 0xdf, 0xd2, 0x22, 0x21, 0xd1
  627. .Lpost_tf_hi_s1:
  628. .byte 0x00, 0xf9, 0x86, 0x7f, 0xd7, 0x2e, 0x51, 0xa8
  629. .byte 0xa4, 0x5d, 0x22, 0xdb, 0x73, 0x8a, 0xf5, 0x0c
  630. /*
  631. * post-SubByte transform
  632. *
  633. * post-lookup for sbox2:
  634. * swap_bitendianness(
  635. * camellia_h(
  636. * isom_map_aes_to_camellia(
  637. * swap_bitendianness(
  638. * aes_inverse_affine_transform(in)
  639. * )
  640. * )
  641. * )
  642. * ) <<< 1
  643. *
  644. * (note: '⊕ 0x6e' inside camellia_h())
  645. */
  646. .Lpost_tf_lo_s2:
  647. .byte 0x78, 0x99, 0x9f, 0x7e, 0x64, 0x85, 0x83, 0x62
  648. .byte 0xb9, 0x58, 0x5e, 0xbf, 0xa5, 0x44, 0x42, 0xa3
  649. .Lpost_tf_hi_s2:
  650. .byte 0x00, 0xf3, 0x0d, 0xfe, 0xaf, 0x5c, 0xa2, 0x51
  651. .byte 0x49, 0xba, 0x44, 0xb7, 0xe6, 0x15, 0xeb, 0x18
  652. /*
  653. * post-SubByte transform
  654. *
  655. * post-lookup for sbox3:
  656. * swap_bitendianness(
  657. * camellia_h(
  658. * isom_map_aes_to_camellia(
  659. * swap_bitendianness(
  660. * aes_inverse_affine_transform(in)
  661. * )
  662. * )
  663. * )
  664. * ) >>> 1
  665. *
  666. * (note: '⊕ 0x6e' inside camellia_h())
  667. */
  668. .Lpost_tf_lo_s3:
  669. .byte 0x1e, 0x66, 0xe7, 0x9f, 0x19, 0x61, 0xe0, 0x98
  670. .byte 0x6e, 0x16, 0x97, 0xef, 0x69, 0x11, 0x90, 0xe8
  671. .Lpost_tf_hi_s3:
  672. .byte 0x00, 0xfc, 0x43, 0xbf, 0xeb, 0x17, 0xa8, 0x54
  673. .byte 0x52, 0xae, 0x11, 0xed, 0xb9, 0x45, 0xfa, 0x06
  674. /* For isolating SubBytes from AESENCLAST, inverse shift row */
  675. .Linv_shift_row:
  676. .byte 0x00, 0x0d, 0x0a, 0x07, 0x04, 0x01, 0x0e, 0x0b
  677. .byte 0x08, 0x05, 0x02, 0x0f, 0x0c, 0x09, 0x06, 0x03
  678. /* 4-bit mask */
  679. .align 4
  680. .L0f0f0f0f:
  681. .long 0x0f0f0f0f
  682. .text
  683. .align 8
  684. __camellia_enc_blk16:
  685. /* input:
  686. * %rdi: ctx, CTX
  687. * %rax: temporary storage, 256 bytes
  688. * %xmm0..%xmm15: 16 plaintext blocks
  689. * output:
  690. * %xmm0..%xmm15: 16 encrypted blocks, order swapped:
  691. * 7, 8, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8
  692. */
  693. leaq 8 * 16(%rax), %rcx;
  694. inpack16_post(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  695. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  696. %xmm15, %rax, %rcx);
  697. enc_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  698. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  699. %xmm15, %rax, %rcx, 0);
  700. fls16(%rax, %xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  701. %rcx, %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  702. %xmm15,
  703. ((key_table + (8) * 8) + 0)(CTX),
  704. ((key_table + (8) * 8) + 4)(CTX),
  705. ((key_table + (8) * 8) + 8)(CTX),
  706. ((key_table + (8) * 8) + 12)(CTX));
  707. enc_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  708. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  709. %xmm15, %rax, %rcx, 8);
  710. fls16(%rax, %xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  711. %rcx, %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  712. %xmm15,
  713. ((key_table + (16) * 8) + 0)(CTX),
  714. ((key_table + (16) * 8) + 4)(CTX),
  715. ((key_table + (16) * 8) + 8)(CTX),
  716. ((key_table + (16) * 8) + 12)(CTX));
  717. enc_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  718. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  719. %xmm15, %rax, %rcx, 16);
  720. movl $24, %r8d;
  721. cmpl $16, key_length(CTX);
  722. jne .Lenc_max32;
  723. .Lenc_done:
  724. /* load CD for output */
  725. vmovdqu 0 * 16(%rcx), %xmm8;
  726. vmovdqu 1 * 16(%rcx), %xmm9;
  727. vmovdqu 2 * 16(%rcx), %xmm10;
  728. vmovdqu 3 * 16(%rcx), %xmm11;
  729. vmovdqu 4 * 16(%rcx), %xmm12;
  730. vmovdqu 5 * 16(%rcx), %xmm13;
  731. vmovdqu 6 * 16(%rcx), %xmm14;
  732. vmovdqu 7 * 16(%rcx), %xmm15;
  733. outunpack16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  734. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  735. %xmm15, (key_table)(CTX, %r8, 8), (%rax), 1 * 16(%rax));
  736. ret;
  737. .align 8
  738. .Lenc_max32:
  739. movl $32, %r8d;
  740. fls16(%rax, %xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  741. %rcx, %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  742. %xmm15,
  743. ((key_table + (24) * 8) + 0)(CTX),
  744. ((key_table + (24) * 8) + 4)(CTX),
  745. ((key_table + (24) * 8) + 8)(CTX),
  746. ((key_table + (24) * 8) + 12)(CTX));
  747. enc_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  748. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  749. %xmm15, %rax, %rcx, 24);
  750. jmp .Lenc_done;
  751. ENDPROC(__camellia_enc_blk16)
  752. .align 8
  753. __camellia_dec_blk16:
  754. /* input:
  755. * %rdi: ctx, CTX
  756. * %rax: temporary storage, 256 bytes
  757. * %r8d: 24 for 16 byte key, 32 for larger
  758. * %xmm0..%xmm15: 16 encrypted blocks
  759. * output:
  760. * %xmm0..%xmm15: 16 plaintext blocks, order swapped:
  761. * 7, 8, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8
  762. */
  763. leaq 8 * 16(%rax), %rcx;
  764. inpack16_post(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  765. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  766. %xmm15, %rax, %rcx);
  767. cmpl $32, %r8d;
  768. je .Ldec_max32;
  769. .Ldec_max24:
  770. dec_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  771. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  772. %xmm15, %rax, %rcx, 16);
  773. fls16(%rax, %xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  774. %rcx, %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  775. %xmm15,
  776. ((key_table + (16) * 8) + 8)(CTX),
  777. ((key_table + (16) * 8) + 12)(CTX),
  778. ((key_table + (16) * 8) + 0)(CTX),
  779. ((key_table + (16) * 8) + 4)(CTX));
  780. dec_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  781. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  782. %xmm15, %rax, %rcx, 8);
  783. fls16(%rax, %xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  784. %rcx, %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  785. %xmm15,
  786. ((key_table + (8) * 8) + 8)(CTX),
  787. ((key_table + (8) * 8) + 12)(CTX),
  788. ((key_table + (8) * 8) + 0)(CTX),
  789. ((key_table + (8) * 8) + 4)(CTX));
  790. dec_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  791. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  792. %xmm15, %rax, %rcx, 0);
  793. /* load CD for output */
  794. vmovdqu 0 * 16(%rcx), %xmm8;
  795. vmovdqu 1 * 16(%rcx), %xmm9;
  796. vmovdqu 2 * 16(%rcx), %xmm10;
  797. vmovdqu 3 * 16(%rcx), %xmm11;
  798. vmovdqu 4 * 16(%rcx), %xmm12;
  799. vmovdqu 5 * 16(%rcx), %xmm13;
  800. vmovdqu 6 * 16(%rcx), %xmm14;
  801. vmovdqu 7 * 16(%rcx), %xmm15;
  802. outunpack16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  803. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  804. %xmm15, (key_table)(CTX), (%rax), 1 * 16(%rax));
  805. ret;
  806. .align 8
  807. .Ldec_max32:
  808. dec_rounds16(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  809. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  810. %xmm15, %rax, %rcx, 24);
  811. fls16(%rax, %xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  812. %rcx, %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  813. %xmm15,
  814. ((key_table + (24) * 8) + 8)(CTX),
  815. ((key_table + (24) * 8) + 12)(CTX),
  816. ((key_table + (24) * 8) + 0)(CTX),
  817. ((key_table + (24) * 8) + 4)(CTX));
  818. jmp .Ldec_max24;
  819. ENDPROC(__camellia_dec_blk16)
  820. ENTRY(camellia_ecb_enc_16way)
  821. /* input:
  822. * %rdi: ctx, CTX
  823. * %rsi: dst (16 blocks)
  824. * %rdx: src (16 blocks)
  825. */
  826. inpack16_pre(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  827. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  828. %xmm15, %rdx, (key_table)(CTX));
  829. /* now dst can be used as temporary buffer (even in src == dst case) */
  830. movq %rsi, %rax;
  831. call __camellia_enc_blk16;
  832. write_output(%xmm7, %xmm6, %xmm5, %xmm4, %xmm3, %xmm2, %xmm1, %xmm0,
  833. %xmm15, %xmm14, %xmm13, %xmm12, %xmm11, %xmm10, %xmm9,
  834. %xmm8, %rsi);
  835. ret;
  836. ENDPROC(camellia_ecb_enc_16way)
  837. ENTRY(camellia_ecb_dec_16way)
  838. /* input:
  839. * %rdi: ctx, CTX
  840. * %rsi: dst (16 blocks)
  841. * %rdx: src (16 blocks)
  842. */
  843. cmpl $16, key_length(CTX);
  844. movl $32, %r8d;
  845. movl $24, %eax;
  846. cmovel %eax, %r8d; /* max */
  847. inpack16_pre(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  848. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  849. %xmm15, %rdx, (key_table)(CTX, %r8, 8));
  850. /* now dst can be used as temporary buffer (even in src == dst case) */
  851. movq %rsi, %rax;
  852. call __camellia_dec_blk16;
  853. write_output(%xmm7, %xmm6, %xmm5, %xmm4, %xmm3, %xmm2, %xmm1, %xmm0,
  854. %xmm15, %xmm14, %xmm13, %xmm12, %xmm11, %xmm10, %xmm9,
  855. %xmm8, %rsi);
  856. ret;
  857. ENDPROC(camellia_ecb_dec_16way)
  858. ENTRY(camellia_cbc_dec_16way)
  859. /* input:
  860. * %rdi: ctx, CTX
  861. * %rsi: dst (16 blocks)
  862. * %rdx: src (16 blocks)
  863. */
  864. cmpl $16, key_length(CTX);
  865. movl $32, %r8d;
  866. movl $24, %eax;
  867. cmovel %eax, %r8d; /* max */
  868. inpack16_pre(%xmm0, %xmm1, %xmm2, %xmm3, %xmm4, %xmm5, %xmm6, %xmm7,
  869. %xmm8, %xmm9, %xmm10, %xmm11, %xmm12, %xmm13, %xmm14,
  870. %xmm15, %rdx, (key_table)(CTX, %r8, 8));
  871. /*
  872. * dst might still be in-use (in case dst == src), so use stack for
  873. * temporary storage.
  874. */
  875. subq $(16 * 16), %rsp;
  876. movq %rsp, %rax;
  877. call __camellia_dec_blk16;
  878. addq $(16 * 16), %rsp;
  879. vpxor (0 * 16)(%rdx), %xmm6, %xmm6;
  880. vpxor (1 * 16)(%rdx), %xmm5, %xmm5;
  881. vpxor (2 * 16)(%rdx), %xmm4, %xmm4;
  882. vpxor (3 * 16)(%rdx), %xmm3, %xmm3;
  883. vpxor (4 * 16)(%rdx), %xmm2, %xmm2;
  884. vpxor (5 * 16)(%rdx), %xmm1, %xmm1;
  885. vpxor (6 * 16)(%rdx), %xmm0, %xmm0;
  886. vpxor (7 * 16)(%rdx), %xmm15, %xmm15;
  887. vpxor (8 * 16)(%rdx), %xmm14, %xmm14;
  888. vpxor (9 * 16)(%rdx), %xmm13, %xmm13;
  889. vpxor (10 * 16)(%rdx), %xmm12, %xmm12;
  890. vpxor (11 * 16)(%rdx), %xmm11, %xmm11;
  891. vpxor (12 * 16)(%rdx), %xmm10, %xmm10;
  892. vpxor (13 * 16)(%rdx), %xmm9, %xmm9;
  893. vpxor (14 * 16)(%rdx), %xmm8, %xmm8;
  894. write_output(%xmm7, %xmm6, %xmm5, %xmm4, %xmm3, %xmm2, %xmm1, %xmm0,
  895. %xmm15, %xmm14, %xmm13, %xmm12, %xmm11, %xmm10, %xmm9,
  896. %xmm8, %rsi);
  897. ret;
  898. ENDPROC(camellia_cbc_dec_16way)
  899. #define inc_le128(x, minus_one, tmp) \
  900. vpcmpeqq minus_one, x, tmp; \
  901. vpsubq minus_one, x, x; \
  902. vpslldq $8, tmp, tmp; \
  903. vpsubq tmp, x, x;
  904. ENTRY(camellia_ctr_16way)
  905. /* input:
  906. * %rdi: ctx, CTX
  907. * %rsi: dst (16 blocks)
  908. * %rdx: src (16 blocks)
  909. * %rcx: iv (little endian, 128bit)
  910. */
  911. subq $(16 * 16), %rsp;
  912. movq %rsp, %rax;
  913. vmovdqa .Lbswap128_mask, %xmm14;
  914. /* load IV and byteswap */
  915. vmovdqu (%rcx), %xmm0;
  916. vpshufb %xmm14, %xmm0, %xmm15;
  917. vmovdqu %xmm15, 15 * 16(%rax);
  918. vpcmpeqd %xmm15, %xmm15, %xmm15;
  919. vpsrldq $8, %xmm15, %xmm15; /* low: -1, high: 0 */
  920. /* construct IVs */
  921. inc_le128(%xmm0, %xmm15, %xmm13);
  922. vpshufb %xmm14, %xmm0, %xmm13;
  923. vmovdqu %xmm13, 14 * 16(%rax);
  924. inc_le128(%xmm0, %xmm15, %xmm13);
  925. vpshufb %xmm14, %xmm0, %xmm13;
  926. vmovdqu %xmm13, 13 * 16(%rax);
  927. inc_le128(%xmm0, %xmm15, %xmm13);
  928. vpshufb %xmm14, %xmm0, %xmm12;
  929. inc_le128(%xmm0, %xmm15, %xmm13);
  930. vpshufb %xmm14, %xmm0, %xmm11;
  931. inc_le128(%xmm0, %xmm15, %xmm13);
  932. vpshufb %xmm14, %xmm0, %xmm10;
  933. inc_le128(%xmm0, %xmm15, %xmm13);
  934. vpshufb %xmm14, %xmm0, %xmm9;
  935. inc_le128(%xmm0, %xmm15, %xmm13);
  936. vpshufb %xmm14, %xmm0, %xmm8;
  937. inc_le128(%xmm0, %xmm15, %xmm13);
  938. vpshufb %xmm14, %xmm0, %xmm7;
  939. inc_le128(%xmm0, %xmm15, %xmm13);
  940. vpshufb %xmm14, %xmm0, %xmm6;
  941. inc_le128(%xmm0, %xmm15, %xmm13);
  942. vpshufb %xmm14, %xmm0, %xmm5;
  943. inc_le128(%xmm0, %xmm15, %xmm13);
  944. vpshufb %xmm14, %xmm0, %xmm4;
  945. inc_le128(%xmm0, %xmm15, %xmm13);
  946. vpshufb %xmm14, %xmm0, %xmm3;
  947. inc_le128(%xmm0, %xmm15, %xmm13);
  948. vpshufb %xmm14, %xmm0, %xmm2;
  949. inc_le128(%xmm0, %xmm15, %xmm13);
  950. vpshufb %xmm14, %xmm0, %xmm1;
  951. inc_le128(%xmm0, %xmm15, %xmm13);
  952. vmovdqa %xmm0, %xmm13;
  953. vpshufb %xmm14, %xmm0, %xmm0;
  954. inc_le128(%xmm13, %xmm15, %xmm14);
  955. vmovdqu %xmm13, (%rcx);
  956. /* inpack16_pre: */
  957. vmovq (key_table)(CTX), %xmm15;
  958. vpshufb .Lpack_bswap, %xmm15, %xmm15;
  959. vpxor %xmm0, %xmm15, %xmm0;
  960. vpxor %xmm1, %xmm15, %xmm1;
  961. vpxor %xmm2, %xmm15, %xmm2;
  962. vpxor %xmm3, %xmm15, %xmm3;
  963. vpxor %xmm4, %xmm15, %xmm4;
  964. vpxor %xmm5, %xmm15, %xmm5;
  965. vpxor %xmm6, %xmm15, %xmm6;
  966. vpxor %xmm7, %xmm15, %xmm7;
  967. vpxor %xmm8, %xmm15, %xmm8;
  968. vpxor %xmm9, %xmm15, %xmm9;
  969. vpxor %xmm10, %xmm15, %xmm10;
  970. vpxor %xmm11, %xmm15, %xmm11;
  971. vpxor %xmm12, %xmm15, %xmm12;
  972. vpxor 13 * 16(%rax), %xmm15, %xmm13;
  973. vpxor 14 * 16(%rax), %xmm15, %xmm14;
  974. vpxor 15 * 16(%rax), %xmm15, %xmm15;
  975. call __camellia_enc_blk16;
  976. addq $(16 * 16), %rsp;
  977. vpxor 0 * 16(%rdx), %xmm7, %xmm7;
  978. vpxor 1 * 16(%rdx), %xmm6, %xmm6;
  979. vpxor 2 * 16(%rdx), %xmm5, %xmm5;
  980. vpxor 3 * 16(%rdx), %xmm4, %xmm4;
  981. vpxor 4 * 16(%rdx), %xmm3, %xmm3;
  982. vpxor 5 * 16(%rdx), %xmm2, %xmm2;
  983. vpxor 6 * 16(%rdx), %xmm1, %xmm1;
  984. vpxor 7 * 16(%rdx), %xmm0, %xmm0;
  985. vpxor 8 * 16(%rdx), %xmm15, %xmm15;
  986. vpxor 9 * 16(%rdx), %xmm14, %xmm14;
  987. vpxor 10 * 16(%rdx), %xmm13, %xmm13;
  988. vpxor 11 * 16(%rdx), %xmm12, %xmm12;
  989. vpxor 12 * 16(%rdx), %xmm11, %xmm11;
  990. vpxor 13 * 16(%rdx), %xmm10, %xmm10;
  991. vpxor 14 * 16(%rdx), %xmm9, %xmm9;
  992. vpxor 15 * 16(%rdx), %xmm8, %xmm8;
  993. write_output(%xmm7, %xmm6, %xmm5, %xmm4, %xmm3, %xmm2, %xmm1, %xmm0,
  994. %xmm15, %xmm14, %xmm13, %xmm12, %xmm11, %xmm10, %xmm9,
  995. %xmm8, %rsi);
  996. ret;
  997. ENDPROC(camellia_ctr_16way)
  998. #define gf128mul_x_ble(iv, mask, tmp) \
  999. vpsrad $31, iv, tmp; \
  1000. vpaddq iv, iv, iv; \
  1001. vpshufd $0x13, tmp, tmp; \
  1002. vpand mask, tmp, tmp; \
  1003. vpxor tmp, iv, iv;
  1004. .align 8
  1005. camellia_xts_crypt_16way:
  1006. /* input:
  1007. * %rdi: ctx, CTX
  1008. * %rsi: dst (16 blocks)
  1009. * %rdx: src (16 blocks)
  1010. * %rcx: iv (t ⊕ αⁿ ∈ GF(2¹²⁸))
  1011. * %r8: index for input whitening key
  1012. * %r9: pointer to __camellia_enc_blk16 or __camellia_dec_blk16
  1013. */
  1014. subq $(16 * 16), %rsp;
  1015. movq %rsp, %rax;
  1016. vmovdqa .Lxts_gf128mul_and_shl1_mask, %xmm14;
  1017. /* load IV */
  1018. vmovdqu (%rcx), %xmm0;
  1019. vpxor 0 * 16(%rdx), %xmm0, %xmm15;
  1020. vmovdqu %xmm15, 15 * 16(%rax);
  1021. vmovdqu %xmm0, 0 * 16(%rsi);
  1022. /* construct IVs */
  1023. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1024. vpxor 1 * 16(%rdx), %xmm0, %xmm15;
  1025. vmovdqu %xmm15, 14 * 16(%rax);
  1026. vmovdqu %xmm0, 1 * 16(%rsi);
  1027. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1028. vpxor 2 * 16(%rdx), %xmm0, %xmm13;
  1029. vmovdqu %xmm0, 2 * 16(%rsi);
  1030. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1031. vpxor 3 * 16(%rdx), %xmm0, %xmm12;
  1032. vmovdqu %xmm0, 3 * 16(%rsi);
  1033. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1034. vpxor 4 * 16(%rdx), %xmm0, %xmm11;
  1035. vmovdqu %xmm0, 4 * 16(%rsi);
  1036. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1037. vpxor 5 * 16(%rdx), %xmm0, %xmm10;
  1038. vmovdqu %xmm0, 5 * 16(%rsi);
  1039. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1040. vpxor 6 * 16(%rdx), %xmm0, %xmm9;
  1041. vmovdqu %xmm0, 6 * 16(%rsi);
  1042. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1043. vpxor 7 * 16(%rdx), %xmm0, %xmm8;
  1044. vmovdqu %xmm0, 7 * 16(%rsi);
  1045. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1046. vpxor 8 * 16(%rdx), %xmm0, %xmm7;
  1047. vmovdqu %xmm0, 8 * 16(%rsi);
  1048. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1049. vpxor 9 * 16(%rdx), %xmm0, %xmm6;
  1050. vmovdqu %xmm0, 9 * 16(%rsi);
  1051. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1052. vpxor 10 * 16(%rdx), %xmm0, %xmm5;
  1053. vmovdqu %xmm0, 10 * 16(%rsi);
  1054. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1055. vpxor 11 * 16(%rdx), %xmm0, %xmm4;
  1056. vmovdqu %xmm0, 11 * 16(%rsi);
  1057. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1058. vpxor 12 * 16(%rdx), %xmm0, %xmm3;
  1059. vmovdqu %xmm0, 12 * 16(%rsi);
  1060. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1061. vpxor 13 * 16(%rdx), %xmm0, %xmm2;
  1062. vmovdqu %xmm0, 13 * 16(%rsi);
  1063. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1064. vpxor 14 * 16(%rdx), %xmm0, %xmm1;
  1065. vmovdqu %xmm0, 14 * 16(%rsi);
  1066. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1067. vpxor 15 * 16(%rdx), %xmm0, %xmm15;
  1068. vmovdqu %xmm15, 0 * 16(%rax);
  1069. vmovdqu %xmm0, 15 * 16(%rsi);
  1070. gf128mul_x_ble(%xmm0, %xmm14, %xmm15);
  1071. vmovdqu %xmm0, (%rcx);
  1072. /* inpack16_pre: */
  1073. vmovq (key_table)(CTX, %r8, 8), %xmm15;
  1074. vpshufb .Lpack_bswap, %xmm15, %xmm15;
  1075. vpxor 0 * 16(%rax), %xmm15, %xmm0;
  1076. vpxor %xmm1, %xmm15, %xmm1;
  1077. vpxor %xmm2, %xmm15, %xmm2;
  1078. vpxor %xmm3, %xmm15, %xmm3;
  1079. vpxor %xmm4, %xmm15, %xmm4;
  1080. vpxor %xmm5, %xmm15, %xmm5;
  1081. vpxor %xmm6, %xmm15, %xmm6;
  1082. vpxor %xmm7, %xmm15, %xmm7;
  1083. vpxor %xmm8, %xmm15, %xmm8;
  1084. vpxor %xmm9, %xmm15, %xmm9;
  1085. vpxor %xmm10, %xmm15, %xmm10;
  1086. vpxor %xmm11, %xmm15, %xmm11;
  1087. vpxor %xmm12, %xmm15, %xmm12;
  1088. vpxor %xmm13, %xmm15, %xmm13;
  1089. vpxor 14 * 16(%rax), %xmm15, %xmm14;
  1090. vpxor 15 * 16(%rax), %xmm15, %xmm15;
  1091. CALL_NOSPEC %r9;
  1092. addq $(16 * 16), %rsp;
  1093. vpxor 0 * 16(%rsi), %xmm7, %xmm7;
  1094. vpxor 1 * 16(%rsi), %xmm6, %xmm6;
  1095. vpxor 2 * 16(%rsi), %xmm5, %xmm5;
  1096. vpxor 3 * 16(%rsi), %xmm4, %xmm4;
  1097. vpxor 4 * 16(%rsi), %xmm3, %xmm3;
  1098. vpxor 5 * 16(%rsi), %xmm2, %xmm2;
  1099. vpxor 6 * 16(%rsi), %xmm1, %xmm1;
  1100. vpxor 7 * 16(%rsi), %xmm0, %xmm0;
  1101. vpxor 8 * 16(%rsi), %xmm15, %xmm15;
  1102. vpxor 9 * 16(%rsi), %xmm14, %xmm14;
  1103. vpxor 10 * 16(%rsi), %xmm13, %xmm13;
  1104. vpxor 11 * 16(%rsi), %xmm12, %xmm12;
  1105. vpxor 12 * 16(%rsi), %xmm11, %xmm11;
  1106. vpxor 13 * 16(%rsi), %xmm10, %xmm10;
  1107. vpxor 14 * 16(%rsi), %xmm9, %xmm9;
  1108. vpxor 15 * 16(%rsi), %xmm8, %xmm8;
  1109. write_output(%xmm7, %xmm6, %xmm5, %xmm4, %xmm3, %xmm2, %xmm1, %xmm0,
  1110. %xmm15, %xmm14, %xmm13, %xmm12, %xmm11, %xmm10, %xmm9,
  1111. %xmm8, %rsi);
  1112. ret;
  1113. ENDPROC(camellia_xts_crypt_16way)
  1114. ENTRY(camellia_xts_enc_16way)
  1115. /* input:
  1116. * %rdi: ctx, CTX
  1117. * %rsi: dst (16 blocks)
  1118. * %rdx: src (16 blocks)
  1119. * %rcx: iv (t ⊕ αⁿ ∈ GF(2¹²⁸))
  1120. */
  1121. xorl %r8d, %r8d; /* input whitening key, 0 for enc */
  1122. leaq __camellia_enc_blk16, %r9;
  1123. jmp camellia_xts_crypt_16way;
  1124. ENDPROC(camellia_xts_enc_16way)
  1125. ENTRY(camellia_xts_dec_16way)
  1126. /* input:
  1127. * %rdi: ctx, CTX
  1128. * %rsi: dst (16 blocks)
  1129. * %rdx: src (16 blocks)
  1130. * %rcx: iv (t ⊕ αⁿ ∈ GF(2¹²⁸))
  1131. */
  1132. cmpl $16, key_length(CTX);
  1133. movl $32, %r8d;
  1134. movl $24, %eax;
  1135. cmovel %eax, %r8d; /* input whitening key, last for dec */
  1136. leaq __camellia_dec_blk16, %r9;
  1137. jmp camellia_xts_crypt_16way;
  1138. ENDPROC(camellia_xts_dec_16way)