intel_pt.h 3.0 KB

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  1. /*
  2. * Intel(R) Processor Trace PMU driver for perf
  3. * Copyright (c) 2013-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * Intel PT is specified in the Intel Architecture Instruction Set Extensions
  15. * Programming Reference:
  16. * http://software.intel.com/en-us/intel-isa-extensions
  17. */
  18. #ifndef __INTEL_PT_H__
  19. #define __INTEL_PT_H__
  20. /*
  21. * Single-entry ToPA: when this close to region boundary, switch
  22. * buffers to avoid losing data.
  23. */
  24. #define TOPA_PMI_MARGIN 512
  25. #define TOPA_SHIFT 12
  26. static inline unsigned int sizes(unsigned int tsz)
  27. {
  28. return 1 << (tsz + TOPA_SHIFT);
  29. };
  30. struct topa_entry {
  31. u64 end : 1;
  32. u64 rsvd0 : 1;
  33. u64 intr : 1;
  34. u64 rsvd1 : 1;
  35. u64 stop : 1;
  36. u64 rsvd2 : 1;
  37. u64 size : 4;
  38. u64 rsvd3 : 2;
  39. u64 base : 36;
  40. u64 rsvd4 : 16;
  41. };
  42. #define PT_CPUID_LEAVES 2
  43. #define PT_CPUID_REGS_NUM 4 /* number of regsters (eax, ebx, ecx, edx) */
  44. enum pt_capabilities {
  45. PT_CAP_max_subleaf = 0,
  46. PT_CAP_cr3_filtering,
  47. PT_CAP_psb_cyc,
  48. PT_CAP_mtc,
  49. PT_CAP_topa_output,
  50. PT_CAP_topa_multiple_entries,
  51. PT_CAP_single_range_output,
  52. PT_CAP_payloads_lip,
  53. PT_CAP_mtc_periods,
  54. PT_CAP_cycle_thresholds,
  55. PT_CAP_psb_periods,
  56. };
  57. struct pt_pmu {
  58. struct pmu pmu;
  59. u32 caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
  60. };
  61. /**
  62. * struct pt_buffer - buffer configuration; one buffer per task_struct or
  63. * cpu, depending on perf event configuration
  64. * @cpu: cpu for per-cpu allocation
  65. * @tables: list of ToPA tables in this buffer
  66. * @first: shorthand for first topa table
  67. * @last: shorthand for last topa table
  68. * @cur: current topa table
  69. * @nr_pages: buffer size in pages
  70. * @cur_idx: current output region's index within @cur table
  71. * @output_off: offset within the current output region
  72. * @data_size: running total of the amount of data in this buffer
  73. * @lost: if data was lost/truncated
  74. * @head: logical write offset inside the buffer
  75. * @snapshot: if this is for a snapshot/overwrite counter
  76. * @stop_pos: STOP topa entry in the buffer
  77. * @intr_pos: INT topa entry in the buffer
  78. * @data_pages: array of pages from perf
  79. * @topa_index: table of topa entries indexed by page offset
  80. */
  81. struct pt_buffer {
  82. int cpu;
  83. struct list_head tables;
  84. struct topa *first, *last, *cur;
  85. unsigned int cur_idx;
  86. size_t output_off;
  87. unsigned long nr_pages;
  88. local_t data_size;
  89. local_t lost;
  90. local64_t head;
  91. bool snapshot;
  92. unsigned long stop_pos, intr_pos;
  93. void **data_pages;
  94. struct topa_entry *topa_index[0];
  95. };
  96. /**
  97. * struct pt - per-cpu pt context
  98. * @handle: perf output handle
  99. * @handle_nmi: do handle PT PMI on this cpu, there's an active event
  100. */
  101. struct pt {
  102. struct perf_output_handle handle;
  103. int handle_nmi;
  104. };
  105. #endif /* __INTEL_PT_H__ */