head_64.S 14 KB

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  1. /*
  2. * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
  3. *
  4. * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
  5. * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
  6. * Copyright (C) 2000 Karsten Keil <kkeil@suse.de>
  7. * Copyright (C) 2001,2002 Andi Kleen <ak@suse.de>
  8. * Copyright (C) 2005 Eric Biederman <ebiederm@xmission.com>
  9. */
  10. #include <linux/linkage.h>
  11. #include <linux/threads.h>
  12. #include <linux/init.h>
  13. #include <asm/segment.h>
  14. #include <asm/pgtable.h>
  15. #include <asm/page.h>
  16. #include <asm/msr.h>
  17. #include <asm/cache.h>
  18. #include <asm/processor-flags.h>
  19. #include <asm/percpu.h>
  20. #include <asm/nops.h>
  21. #ifdef CONFIG_PARAVIRT
  22. #include <asm/asm-offsets.h>
  23. #include <asm/paravirt.h>
  24. #define GET_CR2_INTO(reg) GET_CR2_INTO_RAX ; movq %rax, reg
  25. #else
  26. #define GET_CR2_INTO(reg) movq %cr2, reg
  27. #define INTERRUPT_RETURN iretq
  28. #endif
  29. /* we are not able to switch in one step to the final KERNEL ADDRESS SPACE
  30. * because we need identity-mapped pages.
  31. *
  32. */
  33. #define pud_index(x) (((x) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
  34. L4_PAGE_OFFSET = pgd_index(__PAGE_OFFSET)
  35. L3_PAGE_OFFSET = pud_index(__PAGE_OFFSET)
  36. L4_START_KERNEL = pgd_index(__START_KERNEL_map)
  37. L3_START_KERNEL = pud_index(__START_KERNEL_map)
  38. .text
  39. __HEAD
  40. .code64
  41. .globl startup_64
  42. startup_64:
  43. /*
  44. * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
  45. * and someone has loaded an identity mapped page table
  46. * for us. These identity mapped page tables map all of the
  47. * kernel pages and possibly all of memory.
  48. *
  49. * %rsi holds a physical pointer to real_mode_data.
  50. *
  51. * We come here either directly from a 64bit bootloader, or from
  52. * arch/x86/boot/compressed/head_64.S.
  53. *
  54. * We only come here initially at boot nothing else comes here.
  55. *
  56. * Since we may be loaded at an address different from what we were
  57. * compiled to run at we first fixup the physical addresses in our page
  58. * tables and then reload them.
  59. */
  60. /* Sanitize CPU configuration */
  61. call verify_cpu
  62. /*
  63. * Compute the delta between the address I am compiled to run at and the
  64. * address I am actually running at.
  65. */
  66. leaq _text(%rip), %rbp
  67. subq $_text - __START_KERNEL_map, %rbp
  68. /* Is the address not 2M aligned? */
  69. testl $~PMD_PAGE_MASK, %ebp
  70. jnz bad_address
  71. /*
  72. * Is the address too large?
  73. */
  74. leaq _text(%rip), %rax
  75. shrq $MAX_PHYSMEM_BITS, %rax
  76. jnz bad_address
  77. /*
  78. * Fixup the physical addresses in the page table
  79. */
  80. addq %rbp, early_level4_pgt + (L4_START_KERNEL*8)(%rip)
  81. addq %rbp, level3_kernel_pgt + (510*8)(%rip)
  82. addq %rbp, level3_kernel_pgt + (511*8)(%rip)
  83. addq %rbp, level2_fixmap_pgt + (506*8)(%rip)
  84. /*
  85. * Set up the identity mapping for the switchover. These
  86. * entries should *NOT* have the global bit set! This also
  87. * creates a bunch of nonsense entries but that is fine --
  88. * it avoids problems around wraparound.
  89. */
  90. leaq _text(%rip), %rdi
  91. leaq early_level4_pgt(%rip), %rbx
  92. movq %rdi, %rax
  93. shrq $PGDIR_SHIFT, %rax
  94. leaq (4096 + _KERNPG_TABLE)(%rbx), %rdx
  95. movq %rdx, 0(%rbx,%rax,8)
  96. movq %rdx, 8(%rbx,%rax,8)
  97. addq $4096, %rdx
  98. movq %rdi, %rax
  99. shrq $PUD_SHIFT, %rax
  100. andl $(PTRS_PER_PUD-1), %eax
  101. movq %rdx, 4096(%rbx,%rax,8)
  102. incl %eax
  103. andl $(PTRS_PER_PUD-1), %eax
  104. movq %rdx, 4096(%rbx,%rax,8)
  105. addq $8192, %rbx
  106. movq %rdi, %rax
  107. shrq $PMD_SHIFT, %rdi
  108. addq $(__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL), %rax
  109. leaq (_end - 1)(%rip), %rcx
  110. shrq $PMD_SHIFT, %rcx
  111. subq %rdi, %rcx
  112. incl %ecx
  113. 1:
  114. andq $(PTRS_PER_PMD - 1), %rdi
  115. movq %rax, (%rbx,%rdi,8)
  116. incq %rdi
  117. addq $PMD_SIZE, %rax
  118. decl %ecx
  119. jnz 1b
  120. /*
  121. * Fixup the kernel text+data virtual addresses. Note that
  122. * we might write invalid pmds, when the kernel is relocated
  123. * cleanup_highmap() fixes this up along with the mappings
  124. * beyond _end.
  125. */
  126. leaq level2_kernel_pgt(%rip), %rdi
  127. leaq 4096(%rdi), %r8
  128. /* See if it is a valid page table entry */
  129. 1: testb $1, 0(%rdi)
  130. jz 2f
  131. addq %rbp, 0(%rdi)
  132. /* Go to the next page */
  133. 2: addq $8, %rdi
  134. cmp %r8, %rdi
  135. jne 1b
  136. /* Fixup phys_base */
  137. addq %rbp, phys_base(%rip)
  138. movq $(early_level4_pgt - __START_KERNEL_map), %rax
  139. jmp 1f
  140. ENTRY(secondary_startup_64)
  141. /*
  142. * At this point the CPU runs in 64bit mode CS.L = 1 CS.D = 0,
  143. * and someone has loaded a mapped page table.
  144. *
  145. * %rsi holds a physical pointer to real_mode_data.
  146. *
  147. * We come here either from startup_64 (using physical addresses)
  148. * or from trampoline.S (using virtual addresses).
  149. *
  150. * Using virtual addresses from trampoline.S removes the need
  151. * to have any identity mapped pages in the kernel page table
  152. * after the boot processor executes this code.
  153. */
  154. /* Sanitize CPU configuration */
  155. call verify_cpu
  156. movq $(init_level4_pgt - __START_KERNEL_map), %rax
  157. 1:
  158. /* Enable PAE and PSE, but defer PGE until kaiser_enabled is decided */
  159. movl $(X86_CR4_PAE | X86_CR4_PSE), %ecx
  160. movq %rcx, %cr4
  161. /* Setup early boot stage 4 level pagetables. */
  162. addq phys_base(%rip), %rax
  163. movq %rax, %cr3
  164. /* Ensure I am executing from virtual addresses */
  165. movq $1f, %rax
  166. jmp *%rax
  167. 1:
  168. /* Check if nx is implemented */
  169. movl $0x80000001, %eax
  170. cpuid
  171. movl %edx,%edi
  172. /* Setup EFER (Extended Feature Enable Register) */
  173. movl $MSR_EFER, %ecx
  174. rdmsr
  175. btsl $_EFER_SCE, %eax /* Enable System Call */
  176. btl $20,%edi /* No Execute supported? */
  177. jnc 1f
  178. btsl $_EFER_NX, %eax
  179. btsq $_PAGE_BIT_NX,early_pmd_flags(%rip)
  180. 1: wrmsr /* Make changes effective */
  181. /* Setup cr0 */
  182. #define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | \
  183. X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | \
  184. X86_CR0_PG)
  185. movl $CR0_STATE, %eax
  186. /* Make changes effective */
  187. movq %rax, %cr0
  188. /* Setup a boot time stack */
  189. movq stack_start(%rip), %rsp
  190. /* zero EFLAGS after setting rsp */
  191. pushq $0
  192. popfq
  193. /*
  194. * We must switch to a new descriptor in kernel space for the GDT
  195. * because soon the kernel won't have access anymore to the userspace
  196. * addresses where we're currently running on. We have to do that here
  197. * because in 32bit we couldn't load a 64bit linear address.
  198. */
  199. lgdt early_gdt_descr(%rip)
  200. /* set up data segments */
  201. xorl %eax,%eax
  202. movl %eax,%ds
  203. movl %eax,%ss
  204. movl %eax,%es
  205. /*
  206. * We don't really need to load %fs or %gs, but load them anyway
  207. * to kill any stale realmode selectors. This allows execution
  208. * under VT hardware.
  209. */
  210. movl %eax,%fs
  211. movl %eax,%gs
  212. /* Set up %gs.
  213. *
  214. * The base of %gs always points to the bottom of the irqstack
  215. * union. If the stack protector canary is enabled, it is
  216. * located at %gs:40. Note that, on SMP, the boot cpu uses
  217. * init data section till per cpu areas are set up.
  218. */
  219. movl $MSR_GS_BASE,%ecx
  220. movl initial_gs(%rip),%eax
  221. movl initial_gs+4(%rip),%edx
  222. wrmsr
  223. /* rsi is pointer to real mode structure with interesting info.
  224. pass it to C */
  225. movq %rsi, %rdi
  226. /* Finally jump to run C code and to be on real kernel address
  227. * Since we are running on identity-mapped space we have to jump
  228. * to the full 64bit address, this is only possible as indirect
  229. * jump. In addition we need to ensure %cs is set so we make this
  230. * a far return.
  231. *
  232. * Note: do not change to far jump indirect with 64bit offset.
  233. *
  234. * AMD does not support far jump indirect with 64bit offset.
  235. * AMD64 Architecture Programmer's Manual, Volume 3: states only
  236. * JMP FAR mem16:16 FF /5 Far jump indirect,
  237. * with the target specified by a far pointer in memory.
  238. * JMP FAR mem16:32 FF /5 Far jump indirect,
  239. * with the target specified by a far pointer in memory.
  240. *
  241. * Intel64 does support 64bit offset.
  242. * Software Developer Manual Vol 2: states:
  243. * FF /5 JMP m16:16 Jump far, absolute indirect,
  244. * address given in m16:16
  245. * FF /5 JMP m16:32 Jump far, absolute indirect,
  246. * address given in m16:32.
  247. * REX.W + FF /5 JMP m16:64 Jump far, absolute indirect,
  248. * address given in m16:64.
  249. */
  250. movq initial_code(%rip),%rax
  251. pushq $0 # fake return address to stop unwinder
  252. pushq $__KERNEL_CS # set correct cs
  253. pushq %rax # target address in negative space
  254. lretq
  255. #include "verify_cpu.S"
  256. #ifdef CONFIG_HOTPLUG_CPU
  257. /*
  258. * Boot CPU0 entry point. It's called from play_dead(). Everything has been set
  259. * up already except stack. We just set up stack here. Then call
  260. * start_secondary().
  261. */
  262. ENTRY(start_cpu0)
  263. movq stack_start(%rip),%rsp
  264. movq initial_code(%rip),%rax
  265. pushq $0 # fake return address to stop unwinder
  266. pushq $__KERNEL_CS # set correct cs
  267. pushq %rax # target address in negative space
  268. lretq
  269. ENDPROC(start_cpu0)
  270. #endif
  271. /* SMP bootup changes these two */
  272. __REFDATA
  273. .balign 8
  274. GLOBAL(initial_code)
  275. .quad x86_64_start_kernel
  276. GLOBAL(initial_gs)
  277. .quad INIT_PER_CPU_VAR(irq_stack_union)
  278. GLOBAL(stack_start)
  279. .quad init_thread_union+THREAD_SIZE-8
  280. .word 0
  281. __FINITDATA
  282. bad_address:
  283. jmp bad_address
  284. __INIT
  285. ENTRY(early_idt_handler_array)
  286. # 104(%rsp) %rflags
  287. # 96(%rsp) %cs
  288. # 88(%rsp) %rip
  289. # 80(%rsp) error code
  290. i = 0
  291. .rept NUM_EXCEPTION_VECTORS
  292. .ifeq (EXCEPTION_ERRCODE_MASK >> i) & 1
  293. pushq $0 # Dummy error code, to make stack frame uniform
  294. .endif
  295. pushq $i # 72(%rsp) Vector number
  296. jmp early_idt_handler_common
  297. i = i + 1
  298. .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc
  299. .endr
  300. ENDPROC(early_idt_handler_array)
  301. early_idt_handler_common:
  302. /*
  303. * The stack is the hardware frame, an error code or zero, and the
  304. * vector number.
  305. */
  306. cld
  307. cmpl $2,(%rsp) # X86_TRAP_NMI
  308. je .Lis_nmi # Ignore NMI
  309. cmpl $2,early_recursion_flag(%rip)
  310. jz 1f
  311. incl early_recursion_flag(%rip)
  312. pushq %rax # 64(%rsp)
  313. pushq %rcx # 56(%rsp)
  314. pushq %rdx # 48(%rsp)
  315. pushq %rsi # 40(%rsp)
  316. pushq %rdi # 32(%rsp)
  317. pushq %r8 # 24(%rsp)
  318. pushq %r9 # 16(%rsp)
  319. pushq %r10 # 8(%rsp)
  320. pushq %r11 # 0(%rsp)
  321. cmpl $__KERNEL_CS,96(%rsp)
  322. jne 11f
  323. cmpl $14,72(%rsp) # Page fault?
  324. jnz 10f
  325. GET_CR2_INTO(%rdi) # can clobber any volatile register if pv
  326. call early_make_pgtable
  327. andl %eax,%eax
  328. jz 20f # All good
  329. 10:
  330. leaq 88(%rsp),%rdi # Pointer to %rip
  331. call early_fixup_exception
  332. andl %eax,%eax
  333. jnz 20f # Found an exception entry
  334. 11:
  335. #ifdef CONFIG_EARLY_PRINTK
  336. GET_CR2_INTO(%r9) # can clobber any volatile register if pv
  337. movl 80(%rsp),%r8d # error code
  338. movl 72(%rsp),%esi # vector number
  339. movl 96(%rsp),%edx # %cs
  340. movq 88(%rsp),%rcx # %rip
  341. xorl %eax,%eax
  342. leaq early_idt_msg(%rip),%rdi
  343. call early_printk
  344. cmpl $2,early_recursion_flag(%rip)
  345. jz 1f
  346. call dump_stack
  347. #ifdef CONFIG_KALLSYMS
  348. leaq early_idt_ripmsg(%rip),%rdi
  349. movq 40(%rsp),%rsi # %rip again
  350. call __print_symbol
  351. #endif
  352. #endif /* EARLY_PRINTK */
  353. 1: hlt
  354. jmp 1b
  355. 20: # Exception table entry found or page table generated
  356. popq %r11
  357. popq %r10
  358. popq %r9
  359. popq %r8
  360. popq %rdi
  361. popq %rsi
  362. popq %rdx
  363. popq %rcx
  364. popq %rax
  365. decl early_recursion_flag(%rip)
  366. .Lis_nmi:
  367. addq $16,%rsp # drop vector number and error code
  368. INTERRUPT_RETURN
  369. ENDPROC(early_idt_handler_common)
  370. __INITDATA
  371. .balign 4
  372. early_recursion_flag:
  373. .long 0
  374. #ifdef CONFIG_EARLY_PRINTK
  375. early_idt_msg:
  376. .asciz "PANIC: early exception %02lx rip %lx:%lx error %lx cr2 %lx\n"
  377. early_idt_ripmsg:
  378. .asciz "RIP %s\n"
  379. #endif /* CONFIG_EARLY_PRINTK */
  380. #define NEXT_PAGE(name) \
  381. .balign PAGE_SIZE; \
  382. GLOBAL(name)
  383. #ifdef CONFIG_PAGE_TABLE_ISOLATION
  384. /*
  385. * Each PGD needs to be 8k long and 8k aligned. We do not
  386. * ever go out to userspace with these, so we do not
  387. * strictly *need* the second page, but this allows us to
  388. * have a single set_pgd() implementation that does not
  389. * need to worry about whether it has 4k or 8k to work
  390. * with.
  391. *
  392. * This ensures PGDs are 8k long:
  393. */
  394. #define KAISER_USER_PGD_FILL 512
  395. /* This ensures they are 8k-aligned: */
  396. #define NEXT_PGD_PAGE(name) \
  397. .balign 2 * PAGE_SIZE; \
  398. GLOBAL(name)
  399. #else
  400. #define NEXT_PGD_PAGE(name) NEXT_PAGE(name)
  401. #define KAISER_USER_PGD_FILL 0
  402. #endif
  403. /* Automate the creation of 1 to 1 mapping pmd entries */
  404. #define PMDS(START, PERM, COUNT) \
  405. i = 0 ; \
  406. .rept (COUNT) ; \
  407. .quad (START) + (i << PMD_SHIFT) + (PERM) ; \
  408. i = i + 1 ; \
  409. .endr
  410. __INITDATA
  411. NEXT_PGD_PAGE(early_level4_pgt)
  412. .fill 511,8,0
  413. .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE
  414. .fill KAISER_USER_PGD_FILL,8,0
  415. NEXT_PAGE(early_dynamic_pgts)
  416. .fill 512*EARLY_DYNAMIC_PAGE_TABLES,8,0
  417. .data
  418. #ifndef CONFIG_XEN
  419. NEXT_PGD_PAGE(init_level4_pgt)
  420. .fill 512,8,0
  421. .fill KAISER_USER_PGD_FILL,8,0
  422. #else
  423. NEXT_PGD_PAGE(init_level4_pgt)
  424. .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
  425. .org init_level4_pgt + L4_PAGE_OFFSET*8, 0
  426. .quad level3_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
  427. .org init_level4_pgt + L4_START_KERNEL*8, 0
  428. /* (2^48-(2*1024*1024*1024))/(2^39) = 511 */
  429. .quad level3_kernel_pgt - __START_KERNEL_map + _PAGE_TABLE
  430. .fill KAISER_USER_PGD_FILL,8,0
  431. NEXT_PAGE(level3_ident_pgt)
  432. .quad level2_ident_pgt - __START_KERNEL_map + _KERNPG_TABLE
  433. .fill 511, 8, 0
  434. NEXT_PAGE(level2_ident_pgt)
  435. /* Since I easily can, map the first 1G.
  436. * Don't set NX because code runs from these pages.
  437. */
  438. PMDS(0, __PAGE_KERNEL_IDENT_LARGE_EXEC, PTRS_PER_PMD)
  439. #endif
  440. .fill KAISER_USER_PGD_FILL,8,0
  441. NEXT_PAGE(level3_kernel_pgt)
  442. .fill L3_START_KERNEL,8,0
  443. /* (2^48-(2*1024*1024*1024)-((2^39)*511))/(2^30) = 510 */
  444. .quad level2_kernel_pgt - __START_KERNEL_map + _KERNPG_TABLE
  445. .quad level2_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
  446. NEXT_PAGE(level2_kernel_pgt)
  447. /*
  448. * 512 MB kernel mapping. We spend a full page on this pagetable
  449. * anyway.
  450. *
  451. * The kernel code+data+bss must not be bigger than that.
  452. *
  453. * (NOTE: at +512MB starts the module area, see MODULES_VADDR.
  454. * If you want to increase this then increase MODULES_VADDR
  455. * too.)
  456. */
  457. PMDS(0, __PAGE_KERNEL_LARGE_EXEC,
  458. KERNEL_IMAGE_SIZE/PMD_SIZE)
  459. NEXT_PAGE(level2_fixmap_pgt)
  460. .fill 506,8,0
  461. .quad level1_fixmap_pgt - __START_KERNEL_map + _PAGE_TABLE
  462. /* 8MB reserved for vsyscalls + a 2MB hole = 4 + 1 entries */
  463. .fill 5,8,0
  464. NEXT_PAGE(level1_fixmap_pgt)
  465. .fill 512,8,0
  466. #undef PMDS
  467. .data
  468. .align 16
  469. .globl early_gdt_descr
  470. early_gdt_descr:
  471. .word GDT_ENTRIES*8-1
  472. early_gdt_descr_base:
  473. .quad INIT_PER_CPU_VAR(gdt_page)
  474. ENTRY(phys_base)
  475. /* This must match the first entry in level2_kernel_pgt */
  476. .quad 0x0000000000000000
  477. #include "../../x86/xen/xen-head.S"
  478. __PAGE_ALIGNED_BSS
  479. NEXT_PAGE(empty_zero_page)
  480. .skip PAGE_SIZE