pageattr.c 48 KB

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  1. /*
  2. * Copyright 2002 Andi Kleen, SuSE Labs.
  3. * Thanks to Ben LaHaise for precious feedback.
  4. */
  5. #include <linux/highmem.h>
  6. #include <linux/bootmem.h>
  7. #include <linux/sched.h>
  8. #include <linux/mm.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/seq_file.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/pfn.h>
  13. #include <linux/percpu.h>
  14. #include <linux/gfp.h>
  15. #include <linux/pci.h>
  16. #include <linux/vmalloc.h>
  17. #include <asm/e820.h>
  18. #include <asm/processor.h>
  19. #include <asm/tlbflush.h>
  20. #include <asm/sections.h>
  21. #include <asm/setup.h>
  22. #include <asm/uaccess.h>
  23. #include <asm/pgalloc.h>
  24. #include <asm/proto.h>
  25. #include <asm/pat.h>
  26. /*
  27. * The current flushing context - we pass it instead of 5 arguments:
  28. */
  29. struct cpa_data {
  30. unsigned long *vaddr;
  31. pgd_t *pgd;
  32. pgprot_t mask_set;
  33. pgprot_t mask_clr;
  34. unsigned long numpages;
  35. int flags;
  36. unsigned long pfn;
  37. unsigned force_split : 1;
  38. int curpage;
  39. struct page **pages;
  40. };
  41. /*
  42. * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
  43. * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
  44. * entries change the page attribute in parallel to some other cpu
  45. * splitting a large page entry along with changing the attribute.
  46. */
  47. static DEFINE_SPINLOCK(cpa_lock);
  48. #define CPA_FLUSHTLB 1
  49. #define CPA_ARRAY 2
  50. #define CPA_PAGES_ARRAY 4
  51. #define CPA_FREE_PAGETABLES 8
  52. #ifdef CONFIG_PROC_FS
  53. static unsigned long direct_pages_count[PG_LEVEL_NUM];
  54. void update_page_count(int level, unsigned long pages)
  55. {
  56. /* Protect against CPA */
  57. spin_lock(&pgd_lock);
  58. direct_pages_count[level] += pages;
  59. spin_unlock(&pgd_lock);
  60. }
  61. static void split_page_count(int level)
  62. {
  63. direct_pages_count[level]--;
  64. direct_pages_count[level - 1] += PTRS_PER_PTE;
  65. }
  66. void arch_report_meminfo(struct seq_file *m)
  67. {
  68. seq_printf(m, "DirectMap4k: %8lu kB\n",
  69. direct_pages_count[PG_LEVEL_4K] << 2);
  70. #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  71. seq_printf(m, "DirectMap2M: %8lu kB\n",
  72. direct_pages_count[PG_LEVEL_2M] << 11);
  73. #else
  74. seq_printf(m, "DirectMap4M: %8lu kB\n",
  75. direct_pages_count[PG_LEVEL_2M] << 12);
  76. #endif
  77. if (direct_gbpages)
  78. seq_printf(m, "DirectMap1G: %8lu kB\n",
  79. direct_pages_count[PG_LEVEL_1G] << 20);
  80. }
  81. #else
  82. static inline void split_page_count(int level) { }
  83. #endif
  84. #ifdef CONFIG_X86_64
  85. static inline unsigned long highmap_start_pfn(void)
  86. {
  87. return __pa_symbol(_text) >> PAGE_SHIFT;
  88. }
  89. static inline unsigned long highmap_end_pfn(void)
  90. {
  91. return __pa_symbol(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
  92. }
  93. #endif
  94. #ifdef CONFIG_DEBUG_PAGEALLOC
  95. # define debug_pagealloc 1
  96. #else
  97. # define debug_pagealloc 0
  98. #endif
  99. static inline int
  100. within(unsigned long addr, unsigned long start, unsigned long end)
  101. {
  102. return addr >= start && addr < end;
  103. }
  104. /*
  105. * Flushing functions
  106. */
  107. /**
  108. * clflush_cache_range - flush a cache range with clflush
  109. * @vaddr: virtual start address
  110. * @size: number of bytes to flush
  111. *
  112. * clflushopt is an unordered instruction which needs fencing with mfence or
  113. * sfence to avoid ordering issues.
  114. */
  115. void clflush_cache_range(void *vaddr, unsigned int size)
  116. {
  117. unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1;
  118. void *vend = vaddr + size;
  119. void *p;
  120. mb();
  121. for (p = (void *)((unsigned long)vaddr & ~clflush_mask);
  122. p < vend; p += boot_cpu_data.x86_clflush_size)
  123. clflushopt(p);
  124. mb();
  125. }
  126. EXPORT_SYMBOL_GPL(clflush_cache_range);
  127. static void __cpa_flush_all(void *arg)
  128. {
  129. unsigned long cache = (unsigned long)arg;
  130. /*
  131. * Flush all to work around Errata in early athlons regarding
  132. * large page flushing.
  133. */
  134. __flush_tlb_all();
  135. if (cache && boot_cpu_data.x86 >= 4)
  136. wbinvd();
  137. }
  138. static void cpa_flush_all(unsigned long cache)
  139. {
  140. BUG_ON(irqs_disabled());
  141. on_each_cpu(__cpa_flush_all, (void *) cache, 1);
  142. }
  143. static void __cpa_flush_range(void *arg)
  144. {
  145. /*
  146. * We could optimize that further and do individual per page
  147. * tlb invalidates for a low number of pages. Caveat: we must
  148. * flush the high aliases on 64bit as well.
  149. */
  150. __flush_tlb_all();
  151. }
  152. static void cpa_flush_range(unsigned long start, int numpages, int cache)
  153. {
  154. unsigned int i, level;
  155. unsigned long addr;
  156. BUG_ON(irqs_disabled());
  157. WARN_ON(PAGE_ALIGN(start) != start);
  158. on_each_cpu(__cpa_flush_range, NULL, 1);
  159. if (!cache)
  160. return;
  161. /*
  162. * We only need to flush on one CPU,
  163. * clflush is a MESI-coherent instruction that
  164. * will cause all other CPUs to flush the same
  165. * cachelines:
  166. */
  167. for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
  168. pte_t *pte = lookup_address(addr, &level);
  169. /*
  170. * Only flush present addresses:
  171. */
  172. if (pte && (pte_val(*pte) & _PAGE_PRESENT))
  173. clflush_cache_range((void *) addr, PAGE_SIZE);
  174. }
  175. }
  176. static void cpa_flush_array(unsigned long *start, int numpages, int cache,
  177. int in_flags, struct page **pages)
  178. {
  179. unsigned int i, level;
  180. unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
  181. BUG_ON(irqs_disabled());
  182. on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
  183. if (!cache || do_wbinvd)
  184. return;
  185. /*
  186. * We only need to flush on one CPU,
  187. * clflush is a MESI-coherent instruction that
  188. * will cause all other CPUs to flush the same
  189. * cachelines:
  190. */
  191. for (i = 0; i < numpages; i++) {
  192. unsigned long addr;
  193. pte_t *pte;
  194. if (in_flags & CPA_PAGES_ARRAY)
  195. addr = (unsigned long)page_address(pages[i]);
  196. else
  197. addr = start[i];
  198. pte = lookup_address(addr, &level);
  199. /*
  200. * Only flush present addresses:
  201. */
  202. if (pte && (pte_val(*pte) & _PAGE_PRESENT))
  203. clflush_cache_range((void *)addr, PAGE_SIZE);
  204. }
  205. }
  206. /*
  207. * Certain areas of memory on x86 require very specific protection flags,
  208. * for example the BIOS area or kernel text. Callers don't always get this
  209. * right (again, ioremap() on BIOS memory is not uncommon) so this function
  210. * checks and fixes these known static required protection bits.
  211. */
  212. static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
  213. unsigned long pfn)
  214. {
  215. pgprot_t forbidden = __pgprot(0);
  216. /*
  217. * The BIOS area between 640k and 1Mb needs to be executable for
  218. * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
  219. */
  220. #ifdef CONFIG_PCI_BIOS
  221. if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
  222. pgprot_val(forbidden) |= _PAGE_NX;
  223. #endif
  224. /*
  225. * The kernel text needs to be executable for obvious reasons
  226. * Does not cover __inittext since that is gone later on. On
  227. * 64bit we do not enforce !NX on the low mapping
  228. */
  229. if (within(address, (unsigned long)_text, (unsigned long)_etext))
  230. pgprot_val(forbidden) |= _PAGE_NX;
  231. /*
  232. * The .rodata section needs to be read-only. Using the pfn
  233. * catches all aliases.
  234. */
  235. if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
  236. __pa_symbol(__end_rodata) >> PAGE_SHIFT))
  237. pgprot_val(forbidden) |= _PAGE_RW;
  238. #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA)
  239. /*
  240. * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
  241. * kernel text mappings for the large page aligned text, rodata sections
  242. * will be always read-only. For the kernel identity mappings covering
  243. * the holes caused by this alignment can be anything that user asks.
  244. *
  245. * This will preserve the large page mappings for kernel text/data
  246. * at no extra cost.
  247. */
  248. if (kernel_set_to_readonly &&
  249. within(address, (unsigned long)_text,
  250. (unsigned long)__end_rodata_hpage_align)) {
  251. unsigned int level;
  252. /*
  253. * Don't enforce the !RW mapping for the kernel text mapping,
  254. * if the current mapping is already using small page mapping.
  255. * No need to work hard to preserve large page mappings in this
  256. * case.
  257. *
  258. * This also fixes the Linux Xen paravirt guest boot failure
  259. * (because of unexpected read-only mappings for kernel identity
  260. * mappings). In this paravirt guest case, the kernel text
  261. * mapping and the kernel identity mapping share the same
  262. * page-table pages. Thus we can't really use different
  263. * protections for the kernel text and identity mappings. Also,
  264. * these shared mappings are made of small page mappings.
  265. * Thus this don't enforce !RW mapping for small page kernel
  266. * text mapping logic will help Linux Xen parvirt guest boot
  267. * as well.
  268. */
  269. if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
  270. pgprot_val(forbidden) |= _PAGE_RW;
  271. }
  272. #endif
  273. prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
  274. return prot;
  275. }
  276. /*
  277. * Lookup the page table entry for a virtual address in a specific pgd.
  278. * Return a pointer to the entry and the level of the mapping.
  279. */
  280. pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
  281. unsigned int *level)
  282. {
  283. pud_t *pud;
  284. pmd_t *pmd;
  285. *level = PG_LEVEL_NONE;
  286. if (pgd_none(*pgd))
  287. return NULL;
  288. pud = pud_offset(pgd, address);
  289. if (pud_none(*pud))
  290. return NULL;
  291. *level = PG_LEVEL_1G;
  292. if (pud_large(*pud) || !pud_present(*pud))
  293. return (pte_t *)pud;
  294. pmd = pmd_offset(pud, address);
  295. if (pmd_none(*pmd))
  296. return NULL;
  297. *level = PG_LEVEL_2M;
  298. if (pmd_large(*pmd) || !pmd_present(*pmd))
  299. return (pte_t *)pmd;
  300. *level = PG_LEVEL_4K;
  301. return pte_offset_kernel(pmd, address);
  302. }
  303. /*
  304. * Lookup the page table entry for a virtual address. Return a pointer
  305. * to the entry and the level of the mapping.
  306. *
  307. * Note: We return pud and pmd either when the entry is marked large
  308. * or when the present bit is not set. Otherwise we would return a
  309. * pointer to a nonexisting mapping.
  310. */
  311. pte_t *lookup_address(unsigned long address, unsigned int *level)
  312. {
  313. return lookup_address_in_pgd(pgd_offset_k(address), address, level);
  314. }
  315. EXPORT_SYMBOL_GPL(lookup_address);
  316. static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
  317. unsigned int *level)
  318. {
  319. if (cpa->pgd)
  320. return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
  321. address, level);
  322. return lookup_address(address, level);
  323. }
  324. /*
  325. * Lookup the PMD entry for a virtual address. Return a pointer to the entry
  326. * or NULL if not present.
  327. */
  328. pmd_t *lookup_pmd_address(unsigned long address)
  329. {
  330. pgd_t *pgd;
  331. pud_t *pud;
  332. pgd = pgd_offset_k(address);
  333. if (pgd_none(*pgd))
  334. return NULL;
  335. pud = pud_offset(pgd, address);
  336. if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
  337. return NULL;
  338. return pmd_offset(pud, address);
  339. }
  340. /*
  341. * This is necessary because __pa() does not work on some
  342. * kinds of memory, like vmalloc() or the alloc_remap()
  343. * areas on 32-bit NUMA systems. The percpu areas can
  344. * end up in this kind of memory, for instance.
  345. *
  346. * This could be optimized, but it is only intended to be
  347. * used at inititalization time, and keeping it
  348. * unoptimized should increase the testing coverage for
  349. * the more obscure platforms.
  350. */
  351. phys_addr_t slow_virt_to_phys(void *__virt_addr)
  352. {
  353. unsigned long virt_addr = (unsigned long)__virt_addr;
  354. phys_addr_t phys_addr;
  355. unsigned long offset;
  356. enum pg_level level;
  357. pte_t *pte;
  358. pte = lookup_address(virt_addr, &level);
  359. BUG_ON(!pte);
  360. /*
  361. * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
  362. * before being left-shifted PAGE_SHIFT bits -- this trick is to
  363. * make 32-PAE kernel work correctly.
  364. */
  365. switch (level) {
  366. case PG_LEVEL_1G:
  367. phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
  368. offset = virt_addr & ~PUD_PAGE_MASK;
  369. break;
  370. case PG_LEVEL_2M:
  371. phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
  372. offset = virt_addr & ~PMD_PAGE_MASK;
  373. break;
  374. default:
  375. phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
  376. offset = virt_addr & ~PAGE_MASK;
  377. }
  378. return (phys_addr_t)(phys_addr | offset);
  379. }
  380. EXPORT_SYMBOL_GPL(slow_virt_to_phys);
  381. /*
  382. * Set the new pmd in all the pgds we know about:
  383. */
  384. static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
  385. {
  386. /* change init_mm */
  387. set_pte_atomic(kpte, pte);
  388. #ifdef CONFIG_X86_32
  389. if (!SHARED_KERNEL_PMD) {
  390. struct page *page;
  391. list_for_each_entry(page, &pgd_list, lru) {
  392. pgd_t *pgd;
  393. pud_t *pud;
  394. pmd_t *pmd;
  395. pgd = (pgd_t *)page_address(page) + pgd_index(address);
  396. pud = pud_offset(pgd, address);
  397. pmd = pmd_offset(pud, address);
  398. set_pte_atomic((pte_t *)pmd, pte);
  399. }
  400. }
  401. #endif
  402. }
  403. static int
  404. try_preserve_large_page(pte_t *kpte, unsigned long address,
  405. struct cpa_data *cpa)
  406. {
  407. unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
  408. pte_t new_pte, old_pte, *tmp;
  409. pgprot_t old_prot, new_prot, req_prot;
  410. int i, do_split = 1;
  411. enum pg_level level;
  412. if (cpa->force_split)
  413. return 1;
  414. spin_lock(&pgd_lock);
  415. /*
  416. * Check for races, another CPU might have split this page
  417. * up already:
  418. */
  419. tmp = _lookup_address_cpa(cpa, address, &level);
  420. if (tmp != kpte)
  421. goto out_unlock;
  422. switch (level) {
  423. case PG_LEVEL_2M:
  424. old_prot = pmd_pgprot(*(pmd_t *)kpte);
  425. old_pfn = pmd_pfn(*(pmd_t *)kpte);
  426. break;
  427. case PG_LEVEL_1G:
  428. old_prot = pud_pgprot(*(pud_t *)kpte);
  429. old_pfn = pud_pfn(*(pud_t *)kpte);
  430. break;
  431. default:
  432. do_split = -EINVAL;
  433. goto out_unlock;
  434. }
  435. psize = page_level_size(level);
  436. pmask = page_level_mask(level);
  437. /*
  438. * Calculate the number of pages, which fit into this large
  439. * page starting at address:
  440. */
  441. nextpage_addr = (address + psize) & pmask;
  442. numpages = (nextpage_addr - address) >> PAGE_SHIFT;
  443. if (numpages < cpa->numpages)
  444. cpa->numpages = numpages;
  445. /*
  446. * We are safe now. Check whether the new pgprot is the same:
  447. * Convert protection attributes to 4k-format, as cpa->mask* are set
  448. * up accordingly.
  449. */
  450. old_pte = *kpte;
  451. req_prot = pgprot_large_2_4k(old_prot);
  452. pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
  453. pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
  454. /*
  455. * req_prot is in format of 4k pages. It must be converted to large
  456. * page format: the caching mode includes the PAT bit located at
  457. * different bit positions in the two formats.
  458. */
  459. req_prot = pgprot_4k_2_large(req_prot);
  460. /*
  461. * Set the PSE and GLOBAL flags only if the PRESENT flag is
  462. * set otherwise pmd_present/pmd_huge will return true even on
  463. * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
  464. * for the ancient hardware that doesn't support it.
  465. */
  466. if (pgprot_val(req_prot) & _PAGE_PRESENT)
  467. pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
  468. else
  469. pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
  470. req_prot = canon_pgprot(req_prot);
  471. /*
  472. * old_pfn points to the large page base pfn. So we need
  473. * to add the offset of the virtual address:
  474. */
  475. pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
  476. cpa->pfn = pfn;
  477. new_prot = static_protections(req_prot, address, pfn);
  478. /*
  479. * We need to check the full range, whether
  480. * static_protection() requires a different pgprot for one of
  481. * the pages in the range we try to preserve:
  482. */
  483. addr = address & pmask;
  484. pfn = old_pfn;
  485. for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
  486. pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
  487. if (pgprot_val(chk_prot) != pgprot_val(new_prot))
  488. goto out_unlock;
  489. }
  490. /*
  491. * If there are no changes, return. maxpages has been updated
  492. * above:
  493. */
  494. if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
  495. do_split = 0;
  496. goto out_unlock;
  497. }
  498. /*
  499. * We need to change the attributes. Check, whether we can
  500. * change the large page in one go. We request a split, when
  501. * the address is not aligned and the number of pages is
  502. * smaller than the number of pages in the large page. Note
  503. * that we limited the number of possible pages already to
  504. * the number of pages in the large page.
  505. */
  506. if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
  507. /*
  508. * The address is aligned and the number of pages
  509. * covers the full page.
  510. */
  511. new_pte = pfn_pte(old_pfn, new_prot);
  512. __set_pmd_pte(kpte, address, new_pte);
  513. cpa->flags |= CPA_FLUSHTLB;
  514. do_split = 0;
  515. }
  516. out_unlock:
  517. spin_unlock(&pgd_lock);
  518. return do_split;
  519. }
  520. static int
  521. __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
  522. struct page *base)
  523. {
  524. pte_t *pbase = (pte_t *)page_address(base);
  525. unsigned long ref_pfn, pfn, pfninc = 1;
  526. unsigned int i, level;
  527. pte_t *tmp;
  528. pgprot_t ref_prot;
  529. spin_lock(&pgd_lock);
  530. /*
  531. * Check for races, another CPU might have split this page
  532. * up for us already:
  533. */
  534. tmp = _lookup_address_cpa(cpa, address, &level);
  535. if (tmp != kpte) {
  536. spin_unlock(&pgd_lock);
  537. return 1;
  538. }
  539. paravirt_alloc_pte(&init_mm, page_to_pfn(base));
  540. switch (level) {
  541. case PG_LEVEL_2M:
  542. ref_prot = pmd_pgprot(*(pmd_t *)kpte);
  543. /* clear PSE and promote PAT bit to correct position */
  544. ref_prot = pgprot_large_2_4k(ref_prot);
  545. ref_pfn = pmd_pfn(*(pmd_t *)kpte);
  546. break;
  547. case PG_LEVEL_1G:
  548. ref_prot = pud_pgprot(*(pud_t *)kpte);
  549. ref_pfn = pud_pfn(*(pud_t *)kpte);
  550. pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
  551. /*
  552. * Clear the PSE flags if the PRESENT flag is not set
  553. * otherwise pmd_present/pmd_huge will return true
  554. * even on a non present pmd.
  555. */
  556. if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
  557. pgprot_val(ref_prot) &= ~_PAGE_PSE;
  558. break;
  559. default:
  560. spin_unlock(&pgd_lock);
  561. return 1;
  562. }
  563. /*
  564. * Set the GLOBAL flags only if the PRESENT flag is set
  565. * otherwise pmd/pte_present will return true even on a non
  566. * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
  567. * for the ancient hardware that doesn't support it.
  568. */
  569. if (pgprot_val(ref_prot) & _PAGE_PRESENT)
  570. pgprot_val(ref_prot) |= _PAGE_GLOBAL;
  571. else
  572. pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
  573. /*
  574. * Get the target pfn from the original entry:
  575. */
  576. pfn = ref_pfn;
  577. for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
  578. set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
  579. if (virt_addr_valid(address)) {
  580. unsigned long pfn = PFN_DOWN(__pa(address));
  581. if (pfn_range_is_mapped(pfn, pfn + 1))
  582. split_page_count(level);
  583. }
  584. /*
  585. * Install the new, split up pagetable.
  586. *
  587. * We use the standard kernel pagetable protections for the new
  588. * pagetable protections, the actual ptes set above control the
  589. * primary protection behavior:
  590. */
  591. __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
  592. /*
  593. * Intel Atom errata AAH41 workaround.
  594. *
  595. * The real fix should be in hw or in a microcode update, but
  596. * we also probabilistically try to reduce the window of having
  597. * a large TLB mixed with 4K TLBs while instruction fetches are
  598. * going on.
  599. */
  600. __flush_tlb_all();
  601. spin_unlock(&pgd_lock);
  602. return 0;
  603. }
  604. static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
  605. unsigned long address)
  606. {
  607. struct page *base;
  608. if (!debug_pagealloc)
  609. spin_unlock(&cpa_lock);
  610. base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
  611. if (!debug_pagealloc)
  612. spin_lock(&cpa_lock);
  613. if (!base)
  614. return -ENOMEM;
  615. if (__split_large_page(cpa, kpte, address, base))
  616. __free_page(base);
  617. return 0;
  618. }
  619. static bool try_to_free_pte_page(struct cpa_data *cpa, pte_t *pte)
  620. {
  621. int i;
  622. if (!(cpa->flags & CPA_FREE_PAGETABLES))
  623. return false;
  624. for (i = 0; i < PTRS_PER_PTE; i++)
  625. if (!pte_none(pte[i]))
  626. return false;
  627. free_page((unsigned long)pte);
  628. return true;
  629. }
  630. static bool try_to_free_pmd_page(struct cpa_data *cpa, pmd_t *pmd)
  631. {
  632. int i;
  633. if (!(cpa->flags & CPA_FREE_PAGETABLES))
  634. return false;
  635. for (i = 0; i < PTRS_PER_PMD; i++)
  636. if (!pmd_none(pmd[i]))
  637. return false;
  638. free_page((unsigned long)pmd);
  639. return true;
  640. }
  641. static bool try_to_free_pud_page(pud_t *pud)
  642. {
  643. int i;
  644. for (i = 0; i < PTRS_PER_PUD; i++)
  645. if (!pud_none(pud[i]))
  646. return false;
  647. free_page((unsigned long)pud);
  648. return true;
  649. }
  650. static bool unmap_pte_range(struct cpa_data *cpa, pmd_t *pmd,
  651. unsigned long start,
  652. unsigned long end)
  653. {
  654. pte_t *pte = pte_offset_kernel(pmd, start);
  655. while (start < end) {
  656. set_pte(pte, __pte(0));
  657. start += PAGE_SIZE;
  658. pte++;
  659. }
  660. if (try_to_free_pte_page(cpa, (pte_t *)pmd_page_vaddr(*pmd))) {
  661. pmd_clear(pmd);
  662. return true;
  663. }
  664. return false;
  665. }
  666. static void __unmap_pmd_range(struct cpa_data *cpa, pud_t *pud, pmd_t *pmd,
  667. unsigned long start, unsigned long end)
  668. {
  669. if (unmap_pte_range(cpa, pmd, start, end))
  670. if (try_to_free_pmd_page(cpa, (pmd_t *)pud_page_vaddr(*pud)))
  671. pud_clear(pud);
  672. }
  673. static void unmap_pmd_range(struct cpa_data *cpa, pud_t *pud,
  674. unsigned long start, unsigned long end)
  675. {
  676. pmd_t *pmd = pmd_offset(pud, start);
  677. /*
  678. * Not on a 2MB page boundary?
  679. */
  680. if (start & (PMD_SIZE - 1)) {
  681. unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
  682. unsigned long pre_end = min_t(unsigned long, end, next_page);
  683. __unmap_pmd_range(cpa, pud, pmd, start, pre_end);
  684. start = pre_end;
  685. pmd++;
  686. }
  687. /*
  688. * Try to unmap in 2M chunks.
  689. */
  690. while (end - start >= PMD_SIZE) {
  691. if (pmd_large(*pmd))
  692. pmd_clear(pmd);
  693. else
  694. __unmap_pmd_range(cpa, pud, pmd,
  695. start, start + PMD_SIZE);
  696. start += PMD_SIZE;
  697. pmd++;
  698. }
  699. /*
  700. * 4K leftovers?
  701. */
  702. if (start < end)
  703. return __unmap_pmd_range(cpa, pud, pmd, start, end);
  704. /*
  705. * Try again to free the PMD page if haven't succeeded above.
  706. */
  707. if (!pud_none(*pud))
  708. if (try_to_free_pmd_page(cpa, (pmd_t *)pud_page_vaddr(*pud)))
  709. pud_clear(pud);
  710. }
  711. static void __unmap_pud_range(struct cpa_data *cpa, pgd_t *pgd,
  712. unsigned long start,
  713. unsigned long end)
  714. {
  715. pud_t *pud = pud_offset(pgd, start);
  716. /*
  717. * Not on a GB page boundary?
  718. */
  719. if (start & (PUD_SIZE - 1)) {
  720. unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
  721. unsigned long pre_end = min_t(unsigned long, end, next_page);
  722. unmap_pmd_range(cpa, pud, start, pre_end);
  723. start = pre_end;
  724. pud++;
  725. }
  726. /*
  727. * Try to unmap in 1G chunks?
  728. */
  729. while (end - start >= PUD_SIZE) {
  730. if (pud_large(*pud))
  731. pud_clear(pud);
  732. else
  733. unmap_pmd_range(cpa, pud, start, start + PUD_SIZE);
  734. start += PUD_SIZE;
  735. pud++;
  736. }
  737. /*
  738. * 2M leftovers?
  739. */
  740. if (start < end)
  741. unmap_pmd_range(cpa, pud, start, end);
  742. /*
  743. * No need to try to free the PUD page because we'll free it in
  744. * populate_pgd's error path
  745. */
  746. }
  747. static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end)
  748. {
  749. struct cpa_data cpa = {
  750. .flags = CPA_FREE_PAGETABLES,
  751. };
  752. __unmap_pud_range(&cpa, pgd, start, end);
  753. }
  754. void unmap_pud_range_nofree(pgd_t *pgd, unsigned long start, unsigned long end)
  755. {
  756. struct cpa_data cpa = {
  757. .flags = 0,
  758. };
  759. __unmap_pud_range(&cpa, pgd, start, end);
  760. }
  761. static void unmap_pgd_range(pgd_t *root, unsigned long addr, unsigned long end)
  762. {
  763. pgd_t *pgd_entry = root + pgd_index(addr);
  764. unmap_pud_range(pgd_entry, addr, end);
  765. if (try_to_free_pud_page((pud_t *)pgd_page_vaddr(*pgd_entry)))
  766. pgd_clear(pgd_entry);
  767. }
  768. static int alloc_pte_page(pmd_t *pmd)
  769. {
  770. pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
  771. if (!pte)
  772. return -1;
  773. set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
  774. return 0;
  775. }
  776. static int alloc_pmd_page(pud_t *pud)
  777. {
  778. pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
  779. if (!pmd)
  780. return -1;
  781. set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
  782. return 0;
  783. }
  784. static void populate_pte(struct cpa_data *cpa,
  785. unsigned long start, unsigned long end,
  786. unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
  787. {
  788. pte_t *pte;
  789. pte = pte_offset_kernel(pmd, start);
  790. while (num_pages-- && start < end) {
  791. /* deal with the NX bit */
  792. if (!(pgprot_val(pgprot) & _PAGE_NX))
  793. cpa->pfn &= ~_PAGE_NX;
  794. set_pte(pte, pfn_pte(cpa->pfn >> PAGE_SHIFT, pgprot));
  795. start += PAGE_SIZE;
  796. cpa->pfn += PAGE_SIZE;
  797. pte++;
  798. }
  799. }
  800. static long populate_pmd(struct cpa_data *cpa,
  801. unsigned long start, unsigned long end,
  802. unsigned num_pages, pud_t *pud, pgprot_t pgprot)
  803. {
  804. long cur_pages = 0;
  805. pmd_t *pmd;
  806. pgprot_t pmd_pgprot;
  807. /*
  808. * Not on a 2M boundary?
  809. */
  810. if (start & (PMD_SIZE - 1)) {
  811. unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
  812. unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
  813. pre_end = min_t(unsigned long, pre_end, next_page);
  814. cur_pages = (pre_end - start) >> PAGE_SHIFT;
  815. cur_pages = min_t(unsigned int, num_pages, cur_pages);
  816. /*
  817. * Need a PTE page?
  818. */
  819. pmd = pmd_offset(pud, start);
  820. if (pmd_none(*pmd))
  821. if (alloc_pte_page(pmd))
  822. return -1;
  823. populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
  824. start = pre_end;
  825. }
  826. /*
  827. * We mapped them all?
  828. */
  829. if (num_pages == cur_pages)
  830. return cur_pages;
  831. pmd_pgprot = pgprot_4k_2_large(pgprot);
  832. while (end - start >= PMD_SIZE) {
  833. /*
  834. * We cannot use a 1G page so allocate a PMD page if needed.
  835. */
  836. if (pud_none(*pud))
  837. if (alloc_pmd_page(pud))
  838. return -1;
  839. pmd = pmd_offset(pud, start);
  840. set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn >> PAGE_SHIFT,
  841. canon_pgprot(pmd_pgprot))));
  842. start += PMD_SIZE;
  843. cpa->pfn += PMD_SIZE;
  844. cur_pages += PMD_SIZE >> PAGE_SHIFT;
  845. }
  846. /*
  847. * Map trailing 4K pages.
  848. */
  849. if (start < end) {
  850. pmd = pmd_offset(pud, start);
  851. if (pmd_none(*pmd))
  852. if (alloc_pte_page(pmd))
  853. return -1;
  854. populate_pte(cpa, start, end, num_pages - cur_pages,
  855. pmd, pgprot);
  856. }
  857. return num_pages;
  858. }
  859. static long populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd,
  860. pgprot_t pgprot)
  861. {
  862. pud_t *pud;
  863. unsigned long end;
  864. long cur_pages = 0;
  865. pgprot_t pud_pgprot;
  866. end = start + (cpa->numpages << PAGE_SHIFT);
  867. /*
  868. * Not on a Gb page boundary? => map everything up to it with
  869. * smaller pages.
  870. */
  871. if (start & (PUD_SIZE - 1)) {
  872. unsigned long pre_end;
  873. unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
  874. pre_end = min_t(unsigned long, end, next_page);
  875. cur_pages = (pre_end - start) >> PAGE_SHIFT;
  876. cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
  877. pud = pud_offset(pgd, start);
  878. /*
  879. * Need a PMD page?
  880. */
  881. if (pud_none(*pud))
  882. if (alloc_pmd_page(pud))
  883. return -1;
  884. cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
  885. pud, pgprot);
  886. if (cur_pages < 0)
  887. return cur_pages;
  888. start = pre_end;
  889. }
  890. /* We mapped them all? */
  891. if (cpa->numpages == cur_pages)
  892. return cur_pages;
  893. pud = pud_offset(pgd, start);
  894. pud_pgprot = pgprot_4k_2_large(pgprot);
  895. /*
  896. * Map everything starting from the Gb boundary, possibly with 1G pages
  897. */
  898. while (end - start >= PUD_SIZE) {
  899. set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn >> PAGE_SHIFT,
  900. canon_pgprot(pud_pgprot))));
  901. start += PUD_SIZE;
  902. cpa->pfn += PUD_SIZE;
  903. cur_pages += PUD_SIZE >> PAGE_SHIFT;
  904. pud++;
  905. }
  906. /* Map trailing leftover */
  907. if (start < end) {
  908. long tmp;
  909. pud = pud_offset(pgd, start);
  910. if (pud_none(*pud))
  911. if (alloc_pmd_page(pud))
  912. return -1;
  913. tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
  914. pud, pgprot);
  915. if (tmp < 0)
  916. return cur_pages;
  917. cur_pages += tmp;
  918. }
  919. return cur_pages;
  920. }
  921. /*
  922. * Restrictions for kernel page table do not necessarily apply when mapping in
  923. * an alternate PGD.
  924. */
  925. static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
  926. {
  927. pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
  928. pud_t *pud = NULL; /* shut up gcc */
  929. pgd_t *pgd_entry;
  930. long ret;
  931. pgd_entry = cpa->pgd + pgd_index(addr);
  932. /*
  933. * Allocate a PUD page and hand it down for mapping.
  934. */
  935. if (pgd_none(*pgd_entry)) {
  936. pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
  937. if (!pud)
  938. return -1;
  939. set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE));
  940. }
  941. pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
  942. pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
  943. ret = populate_pud(cpa, addr, pgd_entry, pgprot);
  944. if (ret < 0) {
  945. unmap_pgd_range(cpa->pgd, addr,
  946. addr + (cpa->numpages << PAGE_SHIFT));
  947. return ret;
  948. }
  949. cpa->numpages = ret;
  950. return 0;
  951. }
  952. static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
  953. int primary)
  954. {
  955. if (cpa->pgd)
  956. return populate_pgd(cpa, vaddr);
  957. /*
  958. * Ignore all non primary paths.
  959. */
  960. if (!primary)
  961. return 0;
  962. /*
  963. * Ignore the NULL PTE for kernel identity mapping, as it is expected
  964. * to have holes.
  965. * Also set numpages to '1' indicating that we processed cpa req for
  966. * one virtual address page and its pfn. TBD: numpages can be set based
  967. * on the initial value and the level returned by lookup_address().
  968. */
  969. if (within(vaddr, PAGE_OFFSET,
  970. PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
  971. cpa->numpages = 1;
  972. cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
  973. return 0;
  974. } else {
  975. WARN(1, KERN_WARNING "CPA: called for zero pte. "
  976. "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
  977. *cpa->vaddr);
  978. return -EFAULT;
  979. }
  980. }
  981. static int __change_page_attr(struct cpa_data *cpa, int primary)
  982. {
  983. unsigned long address;
  984. int do_split, err;
  985. unsigned int level;
  986. pte_t *kpte, old_pte;
  987. if (cpa->flags & CPA_PAGES_ARRAY) {
  988. struct page *page = cpa->pages[cpa->curpage];
  989. if (unlikely(PageHighMem(page)))
  990. return 0;
  991. address = (unsigned long)page_address(page);
  992. } else if (cpa->flags & CPA_ARRAY)
  993. address = cpa->vaddr[cpa->curpage];
  994. else
  995. address = *cpa->vaddr;
  996. repeat:
  997. kpte = _lookup_address_cpa(cpa, address, &level);
  998. if (!kpte)
  999. return __cpa_process_fault(cpa, address, primary);
  1000. old_pte = *kpte;
  1001. if (!pte_val(old_pte))
  1002. return __cpa_process_fault(cpa, address, primary);
  1003. if (level == PG_LEVEL_4K) {
  1004. pte_t new_pte;
  1005. pgprot_t new_prot = pte_pgprot(old_pte);
  1006. unsigned long pfn = pte_pfn(old_pte);
  1007. pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
  1008. pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
  1009. new_prot = static_protections(new_prot, address, pfn);
  1010. /*
  1011. * Set the GLOBAL flags only if the PRESENT flag is
  1012. * set otherwise pte_present will return true even on
  1013. * a non present pte. The canon_pgprot will clear
  1014. * _PAGE_GLOBAL for the ancient hardware that doesn't
  1015. * support it.
  1016. */
  1017. if (pgprot_val(new_prot) & _PAGE_PRESENT)
  1018. pgprot_val(new_prot) |= _PAGE_GLOBAL;
  1019. else
  1020. pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
  1021. /*
  1022. * We need to keep the pfn from the existing PTE,
  1023. * after all we're only going to change it's attributes
  1024. * not the memory it points to
  1025. */
  1026. new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
  1027. cpa->pfn = pfn;
  1028. /*
  1029. * Do we really change anything ?
  1030. */
  1031. if (pte_val(old_pte) != pte_val(new_pte)) {
  1032. set_pte_atomic(kpte, new_pte);
  1033. cpa->flags |= CPA_FLUSHTLB;
  1034. }
  1035. cpa->numpages = 1;
  1036. return 0;
  1037. }
  1038. /*
  1039. * Check, whether we can keep the large page intact
  1040. * and just change the pte:
  1041. */
  1042. do_split = try_preserve_large_page(kpte, address, cpa);
  1043. /*
  1044. * When the range fits into the existing large page,
  1045. * return. cp->numpages and cpa->tlbflush have been updated in
  1046. * try_large_page:
  1047. */
  1048. if (do_split <= 0)
  1049. return do_split;
  1050. /*
  1051. * We have to split the large page:
  1052. */
  1053. err = split_large_page(cpa, kpte, address);
  1054. if (!err) {
  1055. /*
  1056. * Do a global flush tlb after splitting the large page
  1057. * and before we do the actual change page attribute in the PTE.
  1058. *
  1059. * With out this, we violate the TLB application note, that says
  1060. * "The TLBs may contain both ordinary and large-page
  1061. * translations for a 4-KByte range of linear addresses. This
  1062. * may occur if software modifies the paging structures so that
  1063. * the page size used for the address range changes. If the two
  1064. * translations differ with respect to page frame or attributes
  1065. * (e.g., permissions), processor behavior is undefined and may
  1066. * be implementation-specific."
  1067. *
  1068. * We do this global tlb flush inside the cpa_lock, so that we
  1069. * don't allow any other cpu, with stale tlb entries change the
  1070. * page attribute in parallel, that also falls into the
  1071. * just split large page entry.
  1072. */
  1073. flush_tlb_all();
  1074. goto repeat;
  1075. }
  1076. return err;
  1077. }
  1078. static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
  1079. static int cpa_process_alias(struct cpa_data *cpa)
  1080. {
  1081. struct cpa_data alias_cpa;
  1082. unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
  1083. unsigned long vaddr;
  1084. int ret;
  1085. if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
  1086. return 0;
  1087. /*
  1088. * No need to redo, when the primary call touched the direct
  1089. * mapping already:
  1090. */
  1091. if (cpa->flags & CPA_PAGES_ARRAY) {
  1092. struct page *page = cpa->pages[cpa->curpage];
  1093. if (unlikely(PageHighMem(page)))
  1094. return 0;
  1095. vaddr = (unsigned long)page_address(page);
  1096. } else if (cpa->flags & CPA_ARRAY)
  1097. vaddr = cpa->vaddr[cpa->curpage];
  1098. else
  1099. vaddr = *cpa->vaddr;
  1100. if (!(within(vaddr, PAGE_OFFSET,
  1101. PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
  1102. alias_cpa = *cpa;
  1103. alias_cpa.vaddr = &laddr;
  1104. alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
  1105. ret = __change_page_attr_set_clr(&alias_cpa, 0);
  1106. if (ret)
  1107. return ret;
  1108. }
  1109. #ifdef CONFIG_X86_64
  1110. /*
  1111. * If the primary call didn't touch the high mapping already
  1112. * and the physical address is inside the kernel map, we need
  1113. * to touch the high mapped kernel as well:
  1114. */
  1115. if (!within(vaddr, (unsigned long)_text, _brk_end) &&
  1116. within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
  1117. unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
  1118. __START_KERNEL_map - phys_base;
  1119. alias_cpa = *cpa;
  1120. alias_cpa.vaddr = &temp_cpa_vaddr;
  1121. alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
  1122. /*
  1123. * The high mapping range is imprecise, so ignore the
  1124. * return value.
  1125. */
  1126. __change_page_attr_set_clr(&alias_cpa, 0);
  1127. }
  1128. #endif
  1129. return 0;
  1130. }
  1131. static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
  1132. {
  1133. unsigned long numpages = cpa->numpages;
  1134. int ret;
  1135. while (numpages) {
  1136. /*
  1137. * Store the remaining nr of pages for the large page
  1138. * preservation check.
  1139. */
  1140. cpa->numpages = numpages;
  1141. /* for array changes, we can't use large page */
  1142. if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
  1143. cpa->numpages = 1;
  1144. if (!debug_pagealloc)
  1145. spin_lock(&cpa_lock);
  1146. ret = __change_page_attr(cpa, checkalias);
  1147. if (!debug_pagealloc)
  1148. spin_unlock(&cpa_lock);
  1149. if (ret)
  1150. return ret;
  1151. if (checkalias) {
  1152. ret = cpa_process_alias(cpa);
  1153. if (ret)
  1154. return ret;
  1155. }
  1156. /*
  1157. * Adjust the number of pages with the result of the
  1158. * CPA operation. Either a large page has been
  1159. * preserved or a single page update happened.
  1160. */
  1161. BUG_ON(cpa->numpages > numpages || !cpa->numpages);
  1162. numpages -= cpa->numpages;
  1163. if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
  1164. cpa->curpage++;
  1165. else
  1166. *cpa->vaddr += cpa->numpages * PAGE_SIZE;
  1167. }
  1168. return 0;
  1169. }
  1170. static int change_page_attr_set_clr(unsigned long *addr, int numpages,
  1171. pgprot_t mask_set, pgprot_t mask_clr,
  1172. int force_split, int in_flag,
  1173. struct page **pages)
  1174. {
  1175. struct cpa_data cpa;
  1176. int ret, cache, checkalias;
  1177. unsigned long baddr = 0;
  1178. memset(&cpa, 0, sizeof(cpa));
  1179. /*
  1180. * Check, if we are requested to change a not supported
  1181. * feature:
  1182. */
  1183. mask_set = canon_pgprot(mask_set);
  1184. mask_clr = canon_pgprot(mask_clr);
  1185. if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
  1186. return 0;
  1187. /* Ensure we are PAGE_SIZE aligned */
  1188. if (in_flag & CPA_ARRAY) {
  1189. int i;
  1190. for (i = 0; i < numpages; i++) {
  1191. if (addr[i] & ~PAGE_MASK) {
  1192. addr[i] &= PAGE_MASK;
  1193. WARN_ON_ONCE(1);
  1194. }
  1195. }
  1196. } else if (!(in_flag & CPA_PAGES_ARRAY)) {
  1197. /*
  1198. * in_flag of CPA_PAGES_ARRAY implies it is aligned.
  1199. * No need to cehck in that case
  1200. */
  1201. if (*addr & ~PAGE_MASK) {
  1202. *addr &= PAGE_MASK;
  1203. /*
  1204. * People should not be passing in unaligned addresses:
  1205. */
  1206. WARN_ON_ONCE(1);
  1207. }
  1208. /*
  1209. * Save address for cache flush. *addr is modified in the call
  1210. * to __change_page_attr_set_clr() below.
  1211. */
  1212. baddr = *addr;
  1213. }
  1214. /* Must avoid aliasing mappings in the highmem code */
  1215. kmap_flush_unused();
  1216. vm_unmap_aliases();
  1217. cpa.vaddr = addr;
  1218. cpa.pages = pages;
  1219. cpa.numpages = numpages;
  1220. cpa.mask_set = mask_set;
  1221. cpa.mask_clr = mask_clr;
  1222. cpa.flags = 0;
  1223. cpa.curpage = 0;
  1224. cpa.force_split = force_split;
  1225. if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
  1226. cpa.flags |= in_flag;
  1227. /* No alias checking for _NX bit modifications */
  1228. checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
  1229. ret = __change_page_attr_set_clr(&cpa, checkalias);
  1230. /*
  1231. * Check whether we really changed something:
  1232. */
  1233. if (!(cpa.flags & CPA_FLUSHTLB))
  1234. goto out;
  1235. /*
  1236. * No need to flush, when we did not set any of the caching
  1237. * attributes:
  1238. */
  1239. cache = !!pgprot2cachemode(mask_set);
  1240. /*
  1241. * On success we use CLFLUSH, when the CPU supports it to
  1242. * avoid the WBINVD. If the CPU does not support it and in the
  1243. * error case we fall back to cpa_flush_all (which uses
  1244. * WBINVD):
  1245. */
  1246. if (!ret && cpu_has_clflush) {
  1247. if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
  1248. cpa_flush_array(addr, numpages, cache,
  1249. cpa.flags, pages);
  1250. } else
  1251. cpa_flush_range(baddr, numpages, cache);
  1252. } else
  1253. cpa_flush_all(cache);
  1254. out:
  1255. return ret;
  1256. }
  1257. static inline int change_page_attr_set(unsigned long *addr, int numpages,
  1258. pgprot_t mask, int array)
  1259. {
  1260. return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
  1261. (array ? CPA_ARRAY : 0), NULL);
  1262. }
  1263. static inline int change_page_attr_clear(unsigned long *addr, int numpages,
  1264. pgprot_t mask, int array)
  1265. {
  1266. return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
  1267. (array ? CPA_ARRAY : 0), NULL);
  1268. }
  1269. static inline int cpa_set_pages_array(struct page **pages, int numpages,
  1270. pgprot_t mask)
  1271. {
  1272. return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
  1273. CPA_PAGES_ARRAY, pages);
  1274. }
  1275. static inline int cpa_clear_pages_array(struct page **pages, int numpages,
  1276. pgprot_t mask)
  1277. {
  1278. return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
  1279. CPA_PAGES_ARRAY, pages);
  1280. }
  1281. int _set_memory_uc(unsigned long addr, int numpages)
  1282. {
  1283. /*
  1284. * for now UC MINUS. see comments in ioremap_nocache()
  1285. * If you really need strong UC use ioremap_uc(), but note
  1286. * that you cannot override IO areas with set_memory_*() as
  1287. * these helpers cannot work with IO memory.
  1288. */
  1289. return change_page_attr_set(&addr, numpages,
  1290. cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
  1291. 0);
  1292. }
  1293. int set_memory_uc(unsigned long addr, int numpages)
  1294. {
  1295. int ret;
  1296. /*
  1297. * for now UC MINUS. see comments in ioremap_nocache()
  1298. */
  1299. ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
  1300. _PAGE_CACHE_MODE_UC_MINUS, NULL);
  1301. if (ret)
  1302. goto out_err;
  1303. ret = _set_memory_uc(addr, numpages);
  1304. if (ret)
  1305. goto out_free;
  1306. return 0;
  1307. out_free:
  1308. free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
  1309. out_err:
  1310. return ret;
  1311. }
  1312. EXPORT_SYMBOL(set_memory_uc);
  1313. static int _set_memory_array(unsigned long *addr, int addrinarray,
  1314. enum page_cache_mode new_type)
  1315. {
  1316. enum page_cache_mode set_type;
  1317. int i, j;
  1318. int ret;
  1319. for (i = 0; i < addrinarray; i++) {
  1320. ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
  1321. new_type, NULL);
  1322. if (ret)
  1323. goto out_free;
  1324. }
  1325. /* If WC, set to UC- first and then WC */
  1326. set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
  1327. _PAGE_CACHE_MODE_UC_MINUS : new_type;
  1328. ret = change_page_attr_set(addr, addrinarray,
  1329. cachemode2pgprot(set_type), 1);
  1330. if (!ret && new_type == _PAGE_CACHE_MODE_WC)
  1331. ret = change_page_attr_set_clr(addr, addrinarray,
  1332. cachemode2pgprot(
  1333. _PAGE_CACHE_MODE_WC),
  1334. __pgprot(_PAGE_CACHE_MASK),
  1335. 0, CPA_ARRAY, NULL);
  1336. if (ret)
  1337. goto out_free;
  1338. return 0;
  1339. out_free:
  1340. for (j = 0; j < i; j++)
  1341. free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
  1342. return ret;
  1343. }
  1344. int set_memory_array_uc(unsigned long *addr, int addrinarray)
  1345. {
  1346. return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
  1347. }
  1348. EXPORT_SYMBOL(set_memory_array_uc);
  1349. int set_memory_array_wc(unsigned long *addr, int addrinarray)
  1350. {
  1351. return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
  1352. }
  1353. EXPORT_SYMBOL(set_memory_array_wc);
  1354. int set_memory_array_wt(unsigned long *addr, int addrinarray)
  1355. {
  1356. return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
  1357. }
  1358. EXPORT_SYMBOL_GPL(set_memory_array_wt);
  1359. int _set_memory_wc(unsigned long addr, int numpages)
  1360. {
  1361. int ret;
  1362. unsigned long addr_copy = addr;
  1363. ret = change_page_attr_set(&addr, numpages,
  1364. cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
  1365. 0);
  1366. if (!ret) {
  1367. ret = change_page_attr_set_clr(&addr_copy, numpages,
  1368. cachemode2pgprot(
  1369. _PAGE_CACHE_MODE_WC),
  1370. __pgprot(_PAGE_CACHE_MASK),
  1371. 0, 0, NULL);
  1372. }
  1373. return ret;
  1374. }
  1375. int set_memory_wc(unsigned long addr, int numpages)
  1376. {
  1377. int ret;
  1378. ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
  1379. _PAGE_CACHE_MODE_WC, NULL);
  1380. if (ret)
  1381. return ret;
  1382. ret = _set_memory_wc(addr, numpages);
  1383. if (ret)
  1384. free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
  1385. return ret;
  1386. }
  1387. EXPORT_SYMBOL(set_memory_wc);
  1388. int _set_memory_wt(unsigned long addr, int numpages)
  1389. {
  1390. return change_page_attr_set(&addr, numpages,
  1391. cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
  1392. }
  1393. int set_memory_wt(unsigned long addr, int numpages)
  1394. {
  1395. int ret;
  1396. ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
  1397. _PAGE_CACHE_MODE_WT, NULL);
  1398. if (ret)
  1399. return ret;
  1400. ret = _set_memory_wt(addr, numpages);
  1401. if (ret)
  1402. free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
  1403. return ret;
  1404. }
  1405. EXPORT_SYMBOL_GPL(set_memory_wt);
  1406. int _set_memory_wb(unsigned long addr, int numpages)
  1407. {
  1408. /* WB cache mode is hard wired to all cache attribute bits being 0 */
  1409. return change_page_attr_clear(&addr, numpages,
  1410. __pgprot(_PAGE_CACHE_MASK), 0);
  1411. }
  1412. int set_memory_wb(unsigned long addr, int numpages)
  1413. {
  1414. int ret;
  1415. ret = _set_memory_wb(addr, numpages);
  1416. if (ret)
  1417. return ret;
  1418. free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
  1419. return 0;
  1420. }
  1421. EXPORT_SYMBOL(set_memory_wb);
  1422. int set_memory_array_wb(unsigned long *addr, int addrinarray)
  1423. {
  1424. int i;
  1425. int ret;
  1426. /* WB cache mode is hard wired to all cache attribute bits being 0 */
  1427. ret = change_page_attr_clear(addr, addrinarray,
  1428. __pgprot(_PAGE_CACHE_MASK), 1);
  1429. if (ret)
  1430. return ret;
  1431. for (i = 0; i < addrinarray; i++)
  1432. free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
  1433. return 0;
  1434. }
  1435. EXPORT_SYMBOL(set_memory_array_wb);
  1436. int set_memory_x(unsigned long addr, int numpages)
  1437. {
  1438. if (!(__supported_pte_mask & _PAGE_NX))
  1439. return 0;
  1440. return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
  1441. }
  1442. EXPORT_SYMBOL(set_memory_x);
  1443. int set_memory_nx(unsigned long addr, int numpages)
  1444. {
  1445. if (!(__supported_pte_mask & _PAGE_NX))
  1446. return 0;
  1447. return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
  1448. }
  1449. EXPORT_SYMBOL(set_memory_nx);
  1450. int set_memory_ro(unsigned long addr, int numpages)
  1451. {
  1452. return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
  1453. }
  1454. int set_memory_rw(unsigned long addr, int numpages)
  1455. {
  1456. return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
  1457. }
  1458. int set_memory_np(unsigned long addr, int numpages)
  1459. {
  1460. return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
  1461. }
  1462. int set_memory_4k(unsigned long addr, int numpages)
  1463. {
  1464. return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
  1465. __pgprot(0), 1, 0, NULL);
  1466. }
  1467. int set_pages_uc(struct page *page, int numpages)
  1468. {
  1469. unsigned long addr = (unsigned long)page_address(page);
  1470. return set_memory_uc(addr, numpages);
  1471. }
  1472. EXPORT_SYMBOL(set_pages_uc);
  1473. static int _set_pages_array(struct page **pages, int addrinarray,
  1474. enum page_cache_mode new_type)
  1475. {
  1476. unsigned long start;
  1477. unsigned long end;
  1478. enum page_cache_mode set_type;
  1479. int i;
  1480. int free_idx;
  1481. int ret;
  1482. for (i = 0; i < addrinarray; i++) {
  1483. if (PageHighMem(pages[i]))
  1484. continue;
  1485. start = page_to_pfn(pages[i]) << PAGE_SHIFT;
  1486. end = start + PAGE_SIZE;
  1487. if (reserve_memtype(start, end, new_type, NULL))
  1488. goto err_out;
  1489. }
  1490. /* If WC, set to UC- first and then WC */
  1491. set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
  1492. _PAGE_CACHE_MODE_UC_MINUS : new_type;
  1493. ret = cpa_set_pages_array(pages, addrinarray,
  1494. cachemode2pgprot(set_type));
  1495. if (!ret && new_type == _PAGE_CACHE_MODE_WC)
  1496. ret = change_page_attr_set_clr(NULL, addrinarray,
  1497. cachemode2pgprot(
  1498. _PAGE_CACHE_MODE_WC),
  1499. __pgprot(_PAGE_CACHE_MASK),
  1500. 0, CPA_PAGES_ARRAY, pages);
  1501. if (ret)
  1502. goto err_out;
  1503. return 0; /* Success */
  1504. err_out:
  1505. free_idx = i;
  1506. for (i = 0; i < free_idx; i++) {
  1507. if (PageHighMem(pages[i]))
  1508. continue;
  1509. start = page_to_pfn(pages[i]) << PAGE_SHIFT;
  1510. end = start + PAGE_SIZE;
  1511. free_memtype(start, end);
  1512. }
  1513. return -EINVAL;
  1514. }
  1515. int set_pages_array_uc(struct page **pages, int addrinarray)
  1516. {
  1517. return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
  1518. }
  1519. EXPORT_SYMBOL(set_pages_array_uc);
  1520. int set_pages_array_wc(struct page **pages, int addrinarray)
  1521. {
  1522. return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
  1523. }
  1524. EXPORT_SYMBOL(set_pages_array_wc);
  1525. int set_pages_array_wt(struct page **pages, int addrinarray)
  1526. {
  1527. return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
  1528. }
  1529. EXPORT_SYMBOL_GPL(set_pages_array_wt);
  1530. int set_pages_wb(struct page *page, int numpages)
  1531. {
  1532. unsigned long addr = (unsigned long)page_address(page);
  1533. return set_memory_wb(addr, numpages);
  1534. }
  1535. EXPORT_SYMBOL(set_pages_wb);
  1536. int set_pages_array_wb(struct page **pages, int addrinarray)
  1537. {
  1538. int retval;
  1539. unsigned long start;
  1540. unsigned long end;
  1541. int i;
  1542. /* WB cache mode is hard wired to all cache attribute bits being 0 */
  1543. retval = cpa_clear_pages_array(pages, addrinarray,
  1544. __pgprot(_PAGE_CACHE_MASK));
  1545. if (retval)
  1546. return retval;
  1547. for (i = 0; i < addrinarray; i++) {
  1548. if (PageHighMem(pages[i]))
  1549. continue;
  1550. start = page_to_pfn(pages[i]) << PAGE_SHIFT;
  1551. end = start + PAGE_SIZE;
  1552. free_memtype(start, end);
  1553. }
  1554. return 0;
  1555. }
  1556. EXPORT_SYMBOL(set_pages_array_wb);
  1557. int set_pages_x(struct page *page, int numpages)
  1558. {
  1559. unsigned long addr = (unsigned long)page_address(page);
  1560. return set_memory_x(addr, numpages);
  1561. }
  1562. EXPORT_SYMBOL(set_pages_x);
  1563. int set_pages_nx(struct page *page, int numpages)
  1564. {
  1565. unsigned long addr = (unsigned long)page_address(page);
  1566. return set_memory_nx(addr, numpages);
  1567. }
  1568. EXPORT_SYMBOL(set_pages_nx);
  1569. int set_pages_ro(struct page *page, int numpages)
  1570. {
  1571. unsigned long addr = (unsigned long)page_address(page);
  1572. return set_memory_ro(addr, numpages);
  1573. }
  1574. int set_pages_rw(struct page *page, int numpages)
  1575. {
  1576. unsigned long addr = (unsigned long)page_address(page);
  1577. return set_memory_rw(addr, numpages);
  1578. }
  1579. #ifdef CONFIG_DEBUG_PAGEALLOC
  1580. static int __set_pages_p(struct page *page, int numpages)
  1581. {
  1582. unsigned long tempaddr = (unsigned long) page_address(page);
  1583. struct cpa_data cpa = { .vaddr = &tempaddr,
  1584. .pgd = NULL,
  1585. .numpages = numpages,
  1586. .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
  1587. .mask_clr = __pgprot(0),
  1588. .flags = 0};
  1589. /*
  1590. * No alias checking needed for setting present flag. otherwise,
  1591. * we may need to break large pages for 64-bit kernel text
  1592. * mappings (this adds to complexity if we want to do this from
  1593. * atomic context especially). Let's keep it simple!
  1594. */
  1595. return __change_page_attr_set_clr(&cpa, 0);
  1596. }
  1597. static int __set_pages_np(struct page *page, int numpages)
  1598. {
  1599. unsigned long tempaddr = (unsigned long) page_address(page);
  1600. struct cpa_data cpa = { .vaddr = &tempaddr,
  1601. .pgd = NULL,
  1602. .numpages = numpages,
  1603. .mask_set = __pgprot(0),
  1604. .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
  1605. .flags = 0};
  1606. /*
  1607. * No alias checking needed for setting not present flag. otherwise,
  1608. * we may need to break large pages for 64-bit kernel text
  1609. * mappings (this adds to complexity if we want to do this from
  1610. * atomic context especially). Let's keep it simple!
  1611. */
  1612. return __change_page_attr_set_clr(&cpa, 0);
  1613. }
  1614. void __kernel_map_pages(struct page *page, int numpages, int enable)
  1615. {
  1616. if (PageHighMem(page))
  1617. return;
  1618. if (!enable) {
  1619. debug_check_no_locks_freed(page_address(page),
  1620. numpages * PAGE_SIZE);
  1621. }
  1622. /*
  1623. * The return value is ignored as the calls cannot fail.
  1624. * Large pages for identity mappings are not used at boot time
  1625. * and hence no memory allocations during large page split.
  1626. */
  1627. if (enable)
  1628. __set_pages_p(page, numpages);
  1629. else
  1630. __set_pages_np(page, numpages);
  1631. /*
  1632. * We should perform an IPI and flush all tlbs,
  1633. * but that can deadlock->flush only current cpu:
  1634. */
  1635. __flush_tlb_all();
  1636. arch_flush_lazy_mmu_mode();
  1637. }
  1638. #ifdef CONFIG_HIBERNATION
  1639. bool kernel_page_present(struct page *page)
  1640. {
  1641. unsigned int level;
  1642. pte_t *pte;
  1643. if (PageHighMem(page))
  1644. return false;
  1645. pte = lookup_address((unsigned long)page_address(page), &level);
  1646. return (pte_val(*pte) & _PAGE_PRESENT);
  1647. }
  1648. #endif /* CONFIG_HIBERNATION */
  1649. #endif /* CONFIG_DEBUG_PAGEALLOC */
  1650. int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
  1651. unsigned numpages, unsigned long page_flags)
  1652. {
  1653. int retval = -EINVAL;
  1654. struct cpa_data cpa = {
  1655. .vaddr = &address,
  1656. .pfn = pfn,
  1657. .pgd = pgd,
  1658. .numpages = numpages,
  1659. .mask_set = __pgprot(0),
  1660. .mask_clr = __pgprot(0),
  1661. .flags = 0,
  1662. };
  1663. if (!(__supported_pte_mask & _PAGE_NX))
  1664. goto out;
  1665. if (!(page_flags & _PAGE_NX))
  1666. cpa.mask_clr = __pgprot(_PAGE_NX);
  1667. cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
  1668. retval = __change_page_attr_set_clr(&cpa, 0);
  1669. __flush_tlb_all();
  1670. out:
  1671. return retval;
  1672. }
  1673. void kernel_unmap_pages_in_pgd(pgd_t *root, unsigned long address,
  1674. unsigned numpages)
  1675. {
  1676. unmap_pgd_range(root, address, address + (numpages << PAGE_SHIFT));
  1677. }
  1678. /*
  1679. * The testcases use internal knowledge of the implementation that shouldn't
  1680. * be exposed to the rest of the kernel. Include these directly here.
  1681. */
  1682. #ifdef CONFIG_CPA_DEBUG
  1683. #include "pageattr-test.c"
  1684. #endif