imr.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661
  1. /**
  2. * imr.c
  3. *
  4. * Copyright(c) 2013 Intel Corporation.
  5. * Copyright(c) 2015 Bryan O'Donoghue <pure.logic@nexus-software.ie>
  6. *
  7. * IMR registers define an isolated region of memory that can
  8. * be masked to prohibit certain system agents from accessing memory.
  9. * When a device behind a masked port performs an access - snooped or
  10. * not, an IMR may optionally prevent that transaction from changing
  11. * the state of memory or from getting correct data in response to the
  12. * operation.
  13. *
  14. * Write data will be dropped and reads will return 0xFFFFFFFF, the
  15. * system will reset and system BIOS will print out an error message to
  16. * inform the user that an IMR has been violated.
  17. *
  18. * This code is based on the Linux MTRR code and reference code from
  19. * Intel's Quark BSP EFI, Linux and grub code.
  20. *
  21. * See quark-x1000-datasheet.pdf for register definitions.
  22. * http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-x1000-datasheet.pdf
  23. */
  24. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25. #include <asm-generic/sections.h>
  26. #include <asm/cpu_device_id.h>
  27. #include <asm/imr.h>
  28. #include <asm/iosf_mbi.h>
  29. #include <linux/debugfs.h>
  30. #include <linux/init.h>
  31. #include <linux/mm.h>
  32. #include <linux/module.h>
  33. #include <linux/types.h>
  34. struct imr_device {
  35. struct dentry *file;
  36. bool init;
  37. struct mutex lock;
  38. int max_imr;
  39. int reg_base;
  40. };
  41. static struct imr_device imr_dev;
  42. /*
  43. * IMR read/write mask control registers.
  44. * See quark-x1000-datasheet.pdf sections 12.7.4.5 and 12.7.4.6 for
  45. * bit definitions.
  46. *
  47. * addr_hi
  48. * 31 Lock bit
  49. * 30:24 Reserved
  50. * 23:2 1 KiB aligned lo address
  51. * 1:0 Reserved
  52. *
  53. * addr_hi
  54. * 31:24 Reserved
  55. * 23:2 1 KiB aligned hi address
  56. * 1:0 Reserved
  57. */
  58. #define IMR_LOCK BIT(31)
  59. struct imr_regs {
  60. u32 addr_lo;
  61. u32 addr_hi;
  62. u32 rmask;
  63. u32 wmask;
  64. };
  65. #define IMR_NUM_REGS (sizeof(struct imr_regs)/sizeof(u32))
  66. #define IMR_SHIFT 8
  67. #define imr_to_phys(x) ((x) << IMR_SHIFT)
  68. #define phys_to_imr(x) ((x) >> IMR_SHIFT)
  69. /**
  70. * imr_is_enabled - true if an IMR is enabled false otherwise.
  71. *
  72. * Determines if an IMR is enabled based on address range and read/write
  73. * mask. An IMR set with an address range set to zero and a read/write
  74. * access mask set to all is considered to be disabled. An IMR in any
  75. * other state - for example set to zero but without read/write access
  76. * all is considered to be enabled. This definition of disabled is how
  77. * firmware switches off an IMR and is maintained in kernel for
  78. * consistency.
  79. *
  80. * @imr: pointer to IMR descriptor.
  81. * @return: true if IMR enabled false if disabled.
  82. */
  83. static inline int imr_is_enabled(struct imr_regs *imr)
  84. {
  85. return !(imr->rmask == IMR_READ_ACCESS_ALL &&
  86. imr->wmask == IMR_WRITE_ACCESS_ALL &&
  87. imr_to_phys(imr->addr_lo) == 0 &&
  88. imr_to_phys(imr->addr_hi) == 0);
  89. }
  90. /**
  91. * imr_read - read an IMR at a given index.
  92. *
  93. * Requires caller to hold imr mutex.
  94. *
  95. * @idev: pointer to imr_device structure.
  96. * @imr_id: IMR entry to read.
  97. * @imr: IMR structure representing address and access masks.
  98. * @return: 0 on success or error code passed from mbi_iosf on failure.
  99. */
  100. static int imr_read(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)
  101. {
  102. u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;
  103. int ret;
  104. ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
  105. reg++, &imr->addr_lo);
  106. if (ret)
  107. return ret;
  108. ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
  109. reg++, &imr->addr_hi);
  110. if (ret)
  111. return ret;
  112. ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
  113. reg++, &imr->rmask);
  114. if (ret)
  115. return ret;
  116. return iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
  117. reg++, &imr->wmask);
  118. }
  119. /**
  120. * imr_write - write an IMR at a given index.
  121. *
  122. * Requires caller to hold imr mutex.
  123. * Note lock bits need to be written independently of address bits.
  124. *
  125. * @idev: pointer to imr_device structure.
  126. * @imr_id: IMR entry to write.
  127. * @imr: IMR structure representing address and access masks.
  128. * @lock: indicates if the IMR lock bit should be applied.
  129. * @return: 0 on success or error code passed from mbi_iosf on failure.
  130. */
  131. static int imr_write(struct imr_device *idev, u32 imr_id,
  132. struct imr_regs *imr, bool lock)
  133. {
  134. unsigned long flags;
  135. u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;
  136. int ret;
  137. local_irq_save(flags);
  138. ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, reg++,
  139. imr->addr_lo);
  140. if (ret)
  141. goto failed;
  142. ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
  143. reg++, imr->addr_hi);
  144. if (ret)
  145. goto failed;
  146. ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
  147. reg++, imr->rmask);
  148. if (ret)
  149. goto failed;
  150. ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
  151. reg++, imr->wmask);
  152. if (ret)
  153. goto failed;
  154. /* Lock bit must be set separately to addr_lo address bits. */
  155. if (lock) {
  156. imr->addr_lo |= IMR_LOCK;
  157. ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
  158. reg - IMR_NUM_REGS, imr->addr_lo);
  159. if (ret)
  160. goto failed;
  161. }
  162. local_irq_restore(flags);
  163. return 0;
  164. failed:
  165. /*
  166. * If writing to the IOSF failed then we're in an unknown state,
  167. * likely a very bad state. An IMR in an invalid state will almost
  168. * certainly lead to a memory access violation.
  169. */
  170. local_irq_restore(flags);
  171. WARN(ret, "IOSF-MBI write fail range 0x%08x-0x%08x unreliable\n",
  172. imr_to_phys(imr->addr_lo), imr_to_phys(imr->addr_hi) + IMR_MASK);
  173. return ret;
  174. }
  175. /**
  176. * imr_dbgfs_state_show - print state of IMR registers.
  177. *
  178. * @s: pointer to seq_file for output.
  179. * @unused: unused parameter.
  180. * @return: 0 on success or error code passed from mbi_iosf on failure.
  181. */
  182. static int imr_dbgfs_state_show(struct seq_file *s, void *unused)
  183. {
  184. phys_addr_t base;
  185. phys_addr_t end;
  186. int i;
  187. struct imr_device *idev = s->private;
  188. struct imr_regs imr;
  189. size_t size;
  190. int ret = -ENODEV;
  191. mutex_lock(&idev->lock);
  192. for (i = 0; i < idev->max_imr; i++) {
  193. ret = imr_read(idev, i, &imr);
  194. if (ret)
  195. break;
  196. /*
  197. * Remember to add IMR_ALIGN bytes to size to indicate the
  198. * inherent IMR_ALIGN size bytes contained in the masked away
  199. * lower ten bits.
  200. */
  201. if (imr_is_enabled(&imr)) {
  202. base = imr_to_phys(imr.addr_lo);
  203. end = imr_to_phys(imr.addr_hi) + IMR_MASK;
  204. } else {
  205. base = 0;
  206. end = 0;
  207. }
  208. size = end - base;
  209. seq_printf(s, "imr%02i: base=%pa, end=%pa, size=0x%08zx "
  210. "rmask=0x%08x, wmask=0x%08x, %s, %s\n", i,
  211. &base, &end, size, imr.rmask, imr.wmask,
  212. imr_is_enabled(&imr) ? "enabled " : "disabled",
  213. imr.addr_lo & IMR_LOCK ? "locked" : "unlocked");
  214. }
  215. mutex_unlock(&idev->lock);
  216. return ret;
  217. }
  218. /**
  219. * imr_state_open - debugfs open callback.
  220. *
  221. * @inode: pointer to struct inode.
  222. * @file: pointer to struct file.
  223. * @return: result of single open.
  224. */
  225. static int imr_state_open(struct inode *inode, struct file *file)
  226. {
  227. return single_open(file, imr_dbgfs_state_show, inode->i_private);
  228. }
  229. static const struct file_operations imr_state_ops = {
  230. .open = imr_state_open,
  231. .read = seq_read,
  232. .llseek = seq_lseek,
  233. .release = single_release,
  234. };
  235. /**
  236. * imr_debugfs_register - register debugfs hooks.
  237. *
  238. * @idev: pointer to imr_device structure.
  239. * @return: 0 on success - errno on failure.
  240. */
  241. static int imr_debugfs_register(struct imr_device *idev)
  242. {
  243. idev->file = debugfs_create_file("imr_state", S_IFREG | S_IRUGO, NULL,
  244. idev, &imr_state_ops);
  245. return PTR_ERR_OR_ZERO(idev->file);
  246. }
  247. /**
  248. * imr_debugfs_unregister - unregister debugfs hooks.
  249. *
  250. * @idev: pointer to imr_device structure.
  251. * @return:
  252. */
  253. static void imr_debugfs_unregister(struct imr_device *idev)
  254. {
  255. debugfs_remove(idev->file);
  256. }
  257. /**
  258. * imr_check_params - check passed address range IMR alignment and non-zero size
  259. *
  260. * @base: base address of intended IMR.
  261. * @size: size of intended IMR.
  262. * @return: zero on valid range -EINVAL on unaligned base/size.
  263. */
  264. static int imr_check_params(phys_addr_t base, size_t size)
  265. {
  266. if ((base & IMR_MASK) || (size & IMR_MASK)) {
  267. pr_err("base %pa size 0x%08zx must align to 1KiB\n",
  268. &base, size);
  269. return -EINVAL;
  270. }
  271. if (size == 0)
  272. return -EINVAL;
  273. return 0;
  274. }
  275. /**
  276. * imr_raw_size - account for the IMR_ALIGN bytes that addr_hi appends.
  277. *
  278. * IMR addr_hi has a built in offset of plus IMR_ALIGN (0x400) bytes from the
  279. * value in the register. We need to subtract IMR_ALIGN bytes from input sizes
  280. * as a result.
  281. *
  282. * @size: input size bytes.
  283. * @return: reduced size.
  284. */
  285. static inline size_t imr_raw_size(size_t size)
  286. {
  287. return size - IMR_ALIGN;
  288. }
  289. /**
  290. * imr_address_overlap - detects an address overlap.
  291. *
  292. * @addr: address to check against an existing IMR.
  293. * @imr: imr being checked.
  294. * @return: true for overlap false for no overlap.
  295. */
  296. static inline int imr_address_overlap(phys_addr_t addr, struct imr_regs *imr)
  297. {
  298. return addr >= imr_to_phys(imr->addr_lo) && addr <= imr_to_phys(imr->addr_hi);
  299. }
  300. /**
  301. * imr_add_range - add an Isolated Memory Region.
  302. *
  303. * @base: physical base address of region aligned to 1KiB.
  304. * @size: physical size of region in bytes must be aligned to 1KiB.
  305. * @read_mask: read access mask.
  306. * @write_mask: write access mask.
  307. * @lock: indicates whether or not to permanently lock this region.
  308. * @return: zero on success or negative value indicating error.
  309. */
  310. int imr_add_range(phys_addr_t base, size_t size,
  311. unsigned int rmask, unsigned int wmask, bool lock)
  312. {
  313. phys_addr_t end;
  314. unsigned int i;
  315. struct imr_device *idev = &imr_dev;
  316. struct imr_regs imr;
  317. size_t raw_size;
  318. int reg;
  319. int ret;
  320. if (WARN_ONCE(idev->init == false, "driver not initialized"))
  321. return -ENODEV;
  322. ret = imr_check_params(base, size);
  323. if (ret)
  324. return ret;
  325. /* Tweak the size value. */
  326. raw_size = imr_raw_size(size);
  327. end = base + raw_size;
  328. /*
  329. * Check for reserved IMR value common to firmware, kernel and grub
  330. * indicating a disabled IMR.
  331. */
  332. imr.addr_lo = phys_to_imr(base);
  333. imr.addr_hi = phys_to_imr(end);
  334. imr.rmask = rmask;
  335. imr.wmask = wmask;
  336. if (!imr_is_enabled(&imr))
  337. return -ENOTSUPP;
  338. mutex_lock(&idev->lock);
  339. /*
  340. * Find a free IMR while checking for an existing overlapping range.
  341. * Note there's no restriction in silicon to prevent IMR overlaps.
  342. * For the sake of simplicity and ease in defining/debugging an IMR
  343. * memory map we exclude IMR overlaps.
  344. */
  345. reg = -1;
  346. for (i = 0; i < idev->max_imr; i++) {
  347. ret = imr_read(idev, i, &imr);
  348. if (ret)
  349. goto failed;
  350. /* Find overlap @ base or end of requested range. */
  351. ret = -EINVAL;
  352. if (imr_is_enabled(&imr)) {
  353. if (imr_address_overlap(base, &imr))
  354. goto failed;
  355. if (imr_address_overlap(end, &imr))
  356. goto failed;
  357. } else {
  358. reg = i;
  359. }
  360. }
  361. /* Error out if we have no free IMR entries. */
  362. if (reg == -1) {
  363. ret = -ENOMEM;
  364. goto failed;
  365. }
  366. pr_debug("add %d phys %pa-%pa size %zx mask 0x%08x wmask 0x%08x\n",
  367. reg, &base, &end, raw_size, rmask, wmask);
  368. /* Enable IMR at specified range and access mask. */
  369. imr.addr_lo = phys_to_imr(base);
  370. imr.addr_hi = phys_to_imr(end);
  371. imr.rmask = rmask;
  372. imr.wmask = wmask;
  373. ret = imr_write(idev, reg, &imr, lock);
  374. if (ret < 0) {
  375. /*
  376. * In the highly unlikely event iosf_mbi_write failed
  377. * attempt to rollback the IMR setup skipping the trapping
  378. * of further IOSF write failures.
  379. */
  380. imr.addr_lo = 0;
  381. imr.addr_hi = 0;
  382. imr.rmask = IMR_READ_ACCESS_ALL;
  383. imr.wmask = IMR_WRITE_ACCESS_ALL;
  384. imr_write(idev, reg, &imr, false);
  385. }
  386. failed:
  387. mutex_unlock(&idev->lock);
  388. return ret;
  389. }
  390. EXPORT_SYMBOL_GPL(imr_add_range);
  391. /**
  392. * __imr_remove_range - delete an Isolated Memory Region.
  393. *
  394. * This function allows you to delete an IMR by its index specified by reg or
  395. * by address range specified by base and size respectively. If you specify an
  396. * index on its own the base and size parameters are ignored.
  397. * imr_remove_range(0, base, size); delete IMR at index 0 base/size ignored.
  398. * imr_remove_range(-1, base, size); delete IMR from base to base+size.
  399. *
  400. * @reg: imr index to remove.
  401. * @base: physical base address of region aligned to 1 KiB.
  402. * @size: physical size of region in bytes aligned to 1 KiB.
  403. * @return: -EINVAL on invalid range or out or range id
  404. * -ENODEV if reg is valid but no IMR exists or is locked
  405. * 0 on success.
  406. */
  407. static int __imr_remove_range(int reg, phys_addr_t base, size_t size)
  408. {
  409. phys_addr_t end;
  410. bool found = false;
  411. unsigned int i;
  412. struct imr_device *idev = &imr_dev;
  413. struct imr_regs imr;
  414. size_t raw_size;
  415. int ret = 0;
  416. if (WARN_ONCE(idev->init == false, "driver not initialized"))
  417. return -ENODEV;
  418. /*
  419. * Validate address range if deleting by address, else we are
  420. * deleting by index where base and size will be ignored.
  421. */
  422. if (reg == -1) {
  423. ret = imr_check_params(base, size);
  424. if (ret)
  425. return ret;
  426. }
  427. /* Tweak the size value. */
  428. raw_size = imr_raw_size(size);
  429. end = base + raw_size;
  430. mutex_lock(&idev->lock);
  431. if (reg >= 0) {
  432. /* If a specific IMR is given try to use it. */
  433. ret = imr_read(idev, reg, &imr);
  434. if (ret)
  435. goto failed;
  436. if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) {
  437. ret = -ENODEV;
  438. goto failed;
  439. }
  440. found = true;
  441. } else {
  442. /* Search for match based on address range. */
  443. for (i = 0; i < idev->max_imr; i++) {
  444. ret = imr_read(idev, i, &imr);
  445. if (ret)
  446. goto failed;
  447. if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK)
  448. continue;
  449. if ((imr_to_phys(imr.addr_lo) == base) &&
  450. (imr_to_phys(imr.addr_hi) == end)) {
  451. found = true;
  452. reg = i;
  453. break;
  454. }
  455. }
  456. }
  457. if (!found) {
  458. ret = -ENODEV;
  459. goto failed;
  460. }
  461. pr_debug("remove %d phys %pa-%pa size %zx\n", reg, &base, &end, raw_size);
  462. /* Tear down the IMR. */
  463. imr.addr_lo = 0;
  464. imr.addr_hi = 0;
  465. imr.rmask = IMR_READ_ACCESS_ALL;
  466. imr.wmask = IMR_WRITE_ACCESS_ALL;
  467. ret = imr_write(idev, reg, &imr, false);
  468. failed:
  469. mutex_unlock(&idev->lock);
  470. return ret;
  471. }
  472. /**
  473. * imr_remove_range - delete an Isolated Memory Region by address
  474. *
  475. * This function allows you to delete an IMR by an address range specified
  476. * by base and size respectively.
  477. * imr_remove_range(base, size); delete IMR from base to base+size.
  478. *
  479. * @base: physical base address of region aligned to 1 KiB.
  480. * @size: physical size of region in bytes aligned to 1 KiB.
  481. * @return: -EINVAL on invalid range or out or range id
  482. * -ENODEV if reg is valid but no IMR exists or is locked
  483. * 0 on success.
  484. */
  485. int imr_remove_range(phys_addr_t base, size_t size)
  486. {
  487. return __imr_remove_range(-1, base, size);
  488. }
  489. EXPORT_SYMBOL_GPL(imr_remove_range);
  490. /**
  491. * imr_clear - delete an Isolated Memory Region by index
  492. *
  493. * This function allows you to delete an IMR by an address range specified
  494. * by the index of the IMR. Useful for initial sanitization of the IMR
  495. * address map.
  496. * imr_ge(base, size); delete IMR from base to base+size.
  497. *
  498. * @reg: imr index to remove.
  499. * @return: -EINVAL on invalid range or out or range id
  500. * -ENODEV if reg is valid but no IMR exists or is locked
  501. * 0 on success.
  502. */
  503. static inline int imr_clear(int reg)
  504. {
  505. return __imr_remove_range(reg, 0, 0);
  506. }
  507. /**
  508. * imr_fixup_memmap - Tear down IMRs used during bootup.
  509. *
  510. * BIOS and Grub both setup IMRs around compressed kernel, initrd memory
  511. * that need to be removed before the kernel hands out one of the IMR
  512. * encased addresses to a downstream DMA agent such as the SD or Ethernet.
  513. * IMRs on Galileo are setup to immediately reset the system on violation.
  514. * As a result if you're running a root filesystem from SD - you'll need
  515. * the boot-time IMRs torn down or you'll find seemingly random resets when
  516. * using your filesystem.
  517. *
  518. * @idev: pointer to imr_device structure.
  519. * @return:
  520. */
  521. static void __init imr_fixup_memmap(struct imr_device *idev)
  522. {
  523. phys_addr_t base = virt_to_phys(&_text);
  524. size_t size = virt_to_phys(&__end_rodata) - base;
  525. int i;
  526. int ret;
  527. /* Tear down all existing unlocked IMRs. */
  528. for (i = 0; i < idev->max_imr; i++)
  529. imr_clear(i);
  530. /*
  531. * Setup a locked IMR around the physical extent of the kernel
  532. * from the beginning of the .text secton to the end of the
  533. * .rodata section as one physically contiguous block.
  534. */
  535. ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, true);
  536. if (ret < 0) {
  537. pr_err("unable to setup IMR for kernel: (%p - %p)\n",
  538. &_text, &__end_rodata);
  539. } else {
  540. pr_info("protecting kernel .text - .rodata: %zu KiB (%p - %p)\n",
  541. size / 1024, &_text, &__end_rodata);
  542. }
  543. }
  544. static const struct x86_cpu_id imr_ids[] __initconst = {
  545. { X86_VENDOR_INTEL, 5, 9 }, /* Intel Quark SoC X1000. */
  546. {}
  547. };
  548. MODULE_DEVICE_TABLE(x86cpu, imr_ids);
  549. /**
  550. * imr_init - entry point for IMR driver.
  551. *
  552. * return: -ENODEV for no IMR support 0 if good to go.
  553. */
  554. static int __init imr_init(void)
  555. {
  556. struct imr_device *idev = &imr_dev;
  557. int ret;
  558. if (!x86_match_cpu(imr_ids) || !iosf_mbi_available())
  559. return -ENODEV;
  560. idev->max_imr = QUARK_X1000_IMR_MAX;
  561. idev->reg_base = QUARK_X1000_IMR_REGBASE;
  562. idev->init = true;
  563. mutex_init(&idev->lock);
  564. ret = imr_debugfs_register(idev);
  565. if (ret != 0)
  566. pr_warn("debugfs register failed!\n");
  567. imr_fixup_memmap(idev);
  568. return 0;
  569. }
  570. /**
  571. * imr_exit - exit point for IMR code.
  572. *
  573. * Deregisters debugfs, leave IMR state as-is.
  574. *
  575. * return:
  576. */
  577. static void __exit imr_exit(void)
  578. {
  579. imr_debugfs_unregister(&imr_dev);
  580. }
  581. module_init(imr_init);
  582. module_exit(imr_exit);
  583. MODULE_AUTHOR("Bryan O'Donoghue <pure.logic@nexus-software.ie>");
  584. MODULE_DESCRIPTION("Intel Isolated Memory Region driver");
  585. MODULE_LICENSE("Dual BSD/GPL");