init.c 3.4 KB

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  1. #include <linux/io.h>
  2. #include <linux/memblock.h>
  3. #include <asm/cacheflush.h>
  4. #include <asm/pgtable.h>
  5. #include <asm/realmode.h>
  6. #include <asm/kaiser.h>
  7. struct real_mode_header *real_mode_header;
  8. u32 *trampoline_cr4_features;
  9. void __init reserve_real_mode(void)
  10. {
  11. phys_addr_t mem;
  12. unsigned char *base;
  13. size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
  14. /* Has to be under 1M so we can execute real-mode AP code. */
  15. mem = memblock_find_in_range(0, 1 << 20, size,
  16. KAISER_KERNEL_PGD_ALIGNMENT);
  17. if (!mem)
  18. panic("Cannot allocate trampoline\n");
  19. base = __va(mem);
  20. memblock_reserve(mem, size);
  21. real_mode_header = (struct real_mode_header *) base;
  22. printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",
  23. base, (unsigned long long)mem, size);
  24. }
  25. void __init setup_real_mode(void)
  26. {
  27. u16 real_mode_seg;
  28. const u32 *rel;
  29. u32 count;
  30. unsigned char *base;
  31. unsigned long phys_base;
  32. struct trampoline_header *trampoline_header;
  33. size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
  34. #ifdef CONFIG_X86_64
  35. u64 *trampoline_pgd;
  36. u64 efer;
  37. #endif
  38. base = (unsigned char *)real_mode_header;
  39. memcpy(base, real_mode_blob, size);
  40. phys_base = __pa(base);
  41. real_mode_seg = phys_base >> 4;
  42. rel = (u32 *) real_mode_relocs;
  43. /* 16-bit segment relocations. */
  44. count = *rel++;
  45. while (count--) {
  46. u16 *seg = (u16 *) (base + *rel++);
  47. *seg = real_mode_seg;
  48. }
  49. /* 32-bit linear relocations. */
  50. count = *rel++;
  51. while (count--) {
  52. u32 *ptr = (u32 *) (base + *rel++);
  53. *ptr += phys_base;
  54. }
  55. /* Must be perfomed *after* relocation. */
  56. trampoline_header = (struct trampoline_header *)
  57. __va(real_mode_header->trampoline_header);
  58. #ifdef CONFIG_X86_32
  59. trampoline_header->start = __pa_symbol(startup_32_smp);
  60. trampoline_header->gdt_limit = __BOOT_DS + 7;
  61. trampoline_header->gdt_base = __pa_symbol(boot_gdt);
  62. #else
  63. /*
  64. * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
  65. * so we need to mask it out.
  66. */
  67. rdmsrl(MSR_EFER, efer);
  68. trampoline_header->efer = efer & ~EFER_LMA;
  69. trampoline_header->start = (u64) secondary_startup_64;
  70. trampoline_cr4_features = &trampoline_header->cr4;
  71. *trampoline_cr4_features = __read_cr4();
  72. trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
  73. trampoline_pgd[0] = init_level4_pgt[pgd_index(__PAGE_OFFSET)].pgd;
  74. trampoline_pgd[511] = init_level4_pgt[511].pgd;
  75. #endif
  76. }
  77. /*
  78. * reserve_real_mode() gets called very early, to guarantee the
  79. * availability of low memory. This is before the proper kernel page
  80. * tables are set up, so we cannot set page permissions in that
  81. * function. Also trampoline code will be executed by APs so we
  82. * need to mark it executable at do_pre_smp_initcalls() at least,
  83. * thus run it as a early_initcall().
  84. */
  85. static int __init set_real_mode_permissions(void)
  86. {
  87. unsigned char *base = (unsigned char *) real_mode_header;
  88. size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
  89. size_t ro_size =
  90. PAGE_ALIGN(real_mode_header->ro_end) -
  91. __pa(base);
  92. size_t text_size =
  93. PAGE_ALIGN(real_mode_header->ro_end) -
  94. real_mode_header->text_start;
  95. unsigned long text_start =
  96. (unsigned long) __va(real_mode_header->text_start);
  97. set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
  98. set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
  99. set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
  100. return 0;
  101. }
  102. early_initcall(set_real_mode_permissions);