cppc_acpi.c 19 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739
  1. /*
  2. * CPPC (Collaborative Processor Performance Control) methods used by CPUfreq drivers.
  3. *
  4. * (C) Copyright 2014, 2015 Linaro Ltd.
  5. * Author: Ashwin Chaugule <ashwin.chaugule@linaro.org>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; version 2
  10. * of the License.
  11. *
  12. * CPPC describes a few methods for controlling CPU performance using
  13. * information from a per CPU table called CPC. This table is described in
  14. * the ACPI v5.0+ specification. The table consists of a list of
  15. * registers which may be memory mapped or hardware registers and also may
  16. * include some static integer values.
  17. *
  18. * CPU performance is on an abstract continuous scale as against a discretized
  19. * P-state scale which is tied to CPU frequency only. In brief, the basic
  20. * operation involves:
  21. *
  22. * - OS makes a CPU performance request. (Can provide min and max bounds)
  23. *
  24. * - Platform (such as BMC) is free to optimize request within requested bounds
  25. * depending on power/thermal budgets etc.
  26. *
  27. * - Platform conveys its decision back to OS
  28. *
  29. * The communication between OS and platform occurs through another medium
  30. * called (PCC) Platform Communication Channel. This is a generic mailbox like
  31. * mechanism which includes doorbell semantics to indicate register updates.
  32. * See drivers/mailbox/pcc.c for details on PCC.
  33. *
  34. * Finer details about the PCC and CPPC spec are available in the ACPI v5.1 and
  35. * above specifications.
  36. */
  37. #define pr_fmt(fmt) "ACPI CPPC: " fmt
  38. #include <linux/cpufreq.h>
  39. #include <linux/delay.h>
  40. #include <acpi/cppc_acpi.h>
  41. /*
  42. * Lock to provide mutually exclusive access to the PCC
  43. * channel. e.g. When the remote updates the shared region
  44. * with new data, the reader needs to be protected from
  45. * other CPUs activity on the same channel.
  46. */
  47. static DEFINE_SPINLOCK(pcc_lock);
  48. /*
  49. * The cpc_desc structure contains the ACPI register details
  50. * as described in the per CPU _CPC tables. The details
  51. * include the type of register (e.g. PCC, System IO, FFH etc.)
  52. * and destination addresses which lets us READ/WRITE CPU performance
  53. * information using the appropriate I/O methods.
  54. */
  55. static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr);
  56. /* This layer handles all the PCC specifics for CPPC. */
  57. static struct mbox_chan *pcc_channel;
  58. static void __iomem *pcc_comm_addr;
  59. static u64 comm_base_addr;
  60. static int pcc_subspace_idx = -1;
  61. static u16 pcc_cmd_delay;
  62. static bool pcc_channel_acquired;
  63. /*
  64. * Arbitrary Retries in case the remote processor is slow to respond
  65. * to PCC commands.
  66. */
  67. #define NUM_RETRIES 500
  68. static int send_pcc_cmd(u16 cmd)
  69. {
  70. int retries, result = -EIO;
  71. struct acpi_pcct_hw_reduced *pcct_ss = pcc_channel->con_priv;
  72. struct acpi_pcct_shared_memory *generic_comm_base =
  73. (struct acpi_pcct_shared_memory *) pcc_comm_addr;
  74. u32 cmd_latency = pcct_ss->latency;
  75. /* Min time OS should wait before sending next command. */
  76. udelay(pcc_cmd_delay);
  77. /* Write to the shared comm region. */
  78. writew(cmd, &generic_comm_base->command);
  79. /* Flip CMD COMPLETE bit */
  80. writew(0, &generic_comm_base->status);
  81. /* Ring doorbell */
  82. result = mbox_send_message(pcc_channel, &cmd);
  83. if (result < 0) {
  84. pr_err("Err sending PCC mbox message. cmd:%d, ret:%d\n",
  85. cmd, result);
  86. return result;
  87. }
  88. /* Wait for a nominal time to let platform process command. */
  89. udelay(cmd_latency);
  90. /* Retry in case the remote processor was too slow to catch up. */
  91. for (retries = NUM_RETRIES; retries > 0; retries--) {
  92. if (readw_relaxed(&generic_comm_base->status) & PCC_CMD_COMPLETE) {
  93. result = 0;
  94. break;
  95. }
  96. }
  97. mbox_client_txdone(pcc_channel, result);
  98. return result;
  99. }
  100. static void cppc_chan_tx_done(struct mbox_client *cl, void *msg, int ret)
  101. {
  102. if (ret)
  103. pr_debug("TX did not complete: CMD sent:%x, ret:%d\n",
  104. *(u16 *)msg, ret);
  105. else
  106. pr_debug("TX completed. CMD sent:%x, ret:%d\n",
  107. *(u16 *)msg, ret);
  108. }
  109. struct mbox_client cppc_mbox_cl = {
  110. .tx_done = cppc_chan_tx_done,
  111. .knows_txdone = true,
  112. };
  113. static int acpi_get_psd(struct cpc_desc *cpc_ptr, acpi_handle handle)
  114. {
  115. int result = -EFAULT;
  116. acpi_status status = AE_OK;
  117. struct acpi_buffer buffer = {ACPI_ALLOCATE_BUFFER, NULL};
  118. struct acpi_buffer format = {sizeof("NNNNN"), "NNNNN"};
  119. struct acpi_buffer state = {0, NULL};
  120. union acpi_object *psd = NULL;
  121. struct acpi_psd_package *pdomain;
  122. status = acpi_evaluate_object_typed(handle, "_PSD", NULL, &buffer,
  123. ACPI_TYPE_PACKAGE);
  124. if (ACPI_FAILURE(status))
  125. return -ENODEV;
  126. psd = buffer.pointer;
  127. if (!psd || psd->package.count != 1) {
  128. pr_debug("Invalid _PSD data\n");
  129. goto end;
  130. }
  131. pdomain = &(cpc_ptr->domain_info);
  132. state.length = sizeof(struct acpi_psd_package);
  133. state.pointer = pdomain;
  134. status = acpi_extract_package(&(psd->package.elements[0]),
  135. &format, &state);
  136. if (ACPI_FAILURE(status)) {
  137. pr_debug("Invalid _PSD data for CPU:%d\n", cpc_ptr->cpu_id);
  138. goto end;
  139. }
  140. if (pdomain->num_entries != ACPI_PSD_REV0_ENTRIES) {
  141. pr_debug("Unknown _PSD:num_entries for CPU:%d\n", cpc_ptr->cpu_id);
  142. goto end;
  143. }
  144. if (pdomain->revision != ACPI_PSD_REV0_REVISION) {
  145. pr_debug("Unknown _PSD:revision for CPU: %d\n", cpc_ptr->cpu_id);
  146. goto end;
  147. }
  148. if (pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ALL &&
  149. pdomain->coord_type != DOMAIN_COORD_TYPE_SW_ANY &&
  150. pdomain->coord_type != DOMAIN_COORD_TYPE_HW_ALL) {
  151. pr_debug("Invalid _PSD:coord_type for CPU:%d\n", cpc_ptr->cpu_id);
  152. goto end;
  153. }
  154. result = 0;
  155. end:
  156. kfree(buffer.pointer);
  157. return result;
  158. }
  159. /**
  160. * acpi_get_psd_map - Map the CPUs in a common freq domain.
  161. * @all_cpu_data: Ptrs to CPU specific CPPC data including PSD info.
  162. *
  163. * Return: 0 for success or negative value for err.
  164. */
  165. int acpi_get_psd_map(struct cpudata **all_cpu_data)
  166. {
  167. int count_target;
  168. int retval = 0;
  169. unsigned int i, j;
  170. cpumask_var_t covered_cpus;
  171. struct cpudata *pr, *match_pr;
  172. struct acpi_psd_package *pdomain;
  173. struct acpi_psd_package *match_pdomain;
  174. struct cpc_desc *cpc_ptr, *match_cpc_ptr;
  175. if (!zalloc_cpumask_var(&covered_cpus, GFP_KERNEL))
  176. return -ENOMEM;
  177. /*
  178. * Now that we have _PSD data from all CPUs, lets setup P-state
  179. * domain info.
  180. */
  181. for_each_possible_cpu(i) {
  182. pr = all_cpu_data[i];
  183. if (!pr)
  184. continue;
  185. if (cpumask_test_cpu(i, covered_cpus))
  186. continue;
  187. cpc_ptr = per_cpu(cpc_desc_ptr, i);
  188. if (!cpc_ptr) {
  189. retval = -EFAULT;
  190. goto err_ret;
  191. }
  192. pdomain = &(cpc_ptr->domain_info);
  193. cpumask_set_cpu(i, pr->shared_cpu_map);
  194. cpumask_set_cpu(i, covered_cpus);
  195. if (pdomain->num_processors <= 1)
  196. continue;
  197. /* Validate the Domain info */
  198. count_target = pdomain->num_processors;
  199. if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ALL)
  200. pr->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  201. else if (pdomain->coord_type == DOMAIN_COORD_TYPE_HW_ALL)
  202. pr->shared_type = CPUFREQ_SHARED_TYPE_HW;
  203. else if (pdomain->coord_type == DOMAIN_COORD_TYPE_SW_ANY)
  204. pr->shared_type = CPUFREQ_SHARED_TYPE_ANY;
  205. for_each_possible_cpu(j) {
  206. if (i == j)
  207. continue;
  208. match_cpc_ptr = per_cpu(cpc_desc_ptr, j);
  209. if (!match_cpc_ptr) {
  210. retval = -EFAULT;
  211. goto err_ret;
  212. }
  213. match_pdomain = &(match_cpc_ptr->domain_info);
  214. if (match_pdomain->domain != pdomain->domain)
  215. continue;
  216. /* Here i and j are in the same domain */
  217. if (match_pdomain->num_processors != count_target) {
  218. retval = -EFAULT;
  219. goto err_ret;
  220. }
  221. if (pdomain->coord_type != match_pdomain->coord_type) {
  222. retval = -EFAULT;
  223. goto err_ret;
  224. }
  225. cpumask_set_cpu(j, covered_cpus);
  226. cpumask_set_cpu(j, pr->shared_cpu_map);
  227. }
  228. for_each_possible_cpu(j) {
  229. if (i == j)
  230. continue;
  231. match_pr = all_cpu_data[j];
  232. if (!match_pr)
  233. continue;
  234. match_cpc_ptr = per_cpu(cpc_desc_ptr, j);
  235. if (!match_cpc_ptr) {
  236. retval = -EFAULT;
  237. goto err_ret;
  238. }
  239. match_pdomain = &(match_cpc_ptr->domain_info);
  240. if (match_pdomain->domain != pdomain->domain)
  241. continue;
  242. match_pr->shared_type = pr->shared_type;
  243. cpumask_copy(match_pr->shared_cpu_map,
  244. pr->shared_cpu_map);
  245. }
  246. }
  247. err_ret:
  248. for_each_possible_cpu(i) {
  249. pr = all_cpu_data[i];
  250. if (!pr)
  251. continue;
  252. /* Assume no coordination on any error parsing domain info */
  253. if (retval) {
  254. cpumask_clear(pr->shared_cpu_map);
  255. cpumask_set_cpu(i, pr->shared_cpu_map);
  256. pr->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  257. }
  258. }
  259. free_cpumask_var(covered_cpus);
  260. return retval;
  261. }
  262. EXPORT_SYMBOL_GPL(acpi_get_psd_map);
  263. static int register_pcc_channel(int pcc_subspace_idx)
  264. {
  265. struct acpi_pcct_hw_reduced *cppc_ss;
  266. unsigned int len;
  267. if (pcc_subspace_idx >= 0) {
  268. pcc_channel = pcc_mbox_request_channel(&cppc_mbox_cl,
  269. pcc_subspace_idx);
  270. if (IS_ERR(pcc_channel)) {
  271. pr_err("Failed to find PCC communication channel\n");
  272. return -ENODEV;
  273. }
  274. /*
  275. * The PCC mailbox controller driver should
  276. * have parsed the PCCT (global table of all
  277. * PCC channels) and stored pointers to the
  278. * subspace communication region in con_priv.
  279. */
  280. cppc_ss = pcc_channel->con_priv;
  281. if (!cppc_ss) {
  282. pr_err("No PCC subspace found for CPPC\n");
  283. return -ENODEV;
  284. }
  285. /*
  286. * This is the shared communication region
  287. * for the OS and Platform to communicate over.
  288. */
  289. comm_base_addr = cppc_ss->base_address;
  290. len = cppc_ss->length;
  291. pcc_cmd_delay = cppc_ss->min_turnaround_time;
  292. pcc_comm_addr = acpi_os_ioremap(comm_base_addr, len);
  293. if (!pcc_comm_addr) {
  294. pr_err("Failed to ioremap PCC comm region mem\n");
  295. return -ENOMEM;
  296. }
  297. /* Set flag so that we dont come here for each CPU. */
  298. pcc_channel_acquired = true;
  299. }
  300. return 0;
  301. }
  302. /*
  303. * An example CPC table looks like the following.
  304. *
  305. * Name(_CPC, Package()
  306. * {
  307. * 17,
  308. * NumEntries
  309. * 1,
  310. * // Revision
  311. * ResourceTemplate(){Register(PCC, 32, 0, 0x120, 2)},
  312. * // Highest Performance
  313. * ResourceTemplate(){Register(PCC, 32, 0, 0x124, 2)},
  314. * // Nominal Performance
  315. * ResourceTemplate(){Register(PCC, 32, 0, 0x128, 2)},
  316. * // Lowest Nonlinear Performance
  317. * ResourceTemplate(){Register(PCC, 32, 0, 0x12C, 2)},
  318. * // Lowest Performance
  319. * ResourceTemplate(){Register(PCC, 32, 0, 0x130, 2)},
  320. * // Guaranteed Performance Register
  321. * ResourceTemplate(){Register(PCC, 32, 0, 0x110, 2)},
  322. * // Desired Performance Register
  323. * ResourceTemplate(){Register(SystemMemory, 0, 0, 0, 0)},
  324. * ..
  325. * ..
  326. * ..
  327. *
  328. * }
  329. * Each Register() encodes how to access that specific register.
  330. * e.g. a sample PCC entry has the following encoding:
  331. *
  332. * Register (
  333. * PCC,
  334. * AddressSpaceKeyword
  335. * 8,
  336. * //RegisterBitWidth
  337. * 8,
  338. * //RegisterBitOffset
  339. * 0x30,
  340. * //RegisterAddress
  341. * 9
  342. * //AccessSize (subspace ID)
  343. * 0
  344. * )
  345. * }
  346. */
  347. /**
  348. * acpi_cppc_processor_probe - Search for per CPU _CPC objects.
  349. * @pr: Ptr to acpi_processor containing this CPUs logical Id.
  350. *
  351. * Return: 0 for success or negative value for err.
  352. */
  353. int acpi_cppc_processor_probe(struct acpi_processor *pr)
  354. {
  355. struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
  356. union acpi_object *out_obj, *cpc_obj;
  357. struct cpc_desc *cpc_ptr;
  358. struct cpc_reg *gas_t;
  359. acpi_handle handle = pr->handle;
  360. unsigned int num_ent, i, cpc_rev;
  361. acpi_status status;
  362. int ret = -EFAULT;
  363. /* Parse the ACPI _CPC table for this cpu. */
  364. status = acpi_evaluate_object_typed(handle, "_CPC", NULL, &output,
  365. ACPI_TYPE_PACKAGE);
  366. if (ACPI_FAILURE(status)) {
  367. ret = -ENODEV;
  368. goto out_buf_free;
  369. }
  370. out_obj = (union acpi_object *) output.pointer;
  371. cpc_ptr = kzalloc(sizeof(struct cpc_desc), GFP_KERNEL);
  372. if (!cpc_ptr) {
  373. ret = -ENOMEM;
  374. goto out_buf_free;
  375. }
  376. /* First entry is NumEntries. */
  377. cpc_obj = &out_obj->package.elements[0];
  378. if (cpc_obj->type == ACPI_TYPE_INTEGER) {
  379. num_ent = cpc_obj->integer.value;
  380. } else {
  381. pr_debug("Unexpected entry type(%d) for NumEntries\n",
  382. cpc_obj->type);
  383. goto out_free;
  384. }
  385. /* Only support CPPCv2. Bail otherwise. */
  386. if (num_ent != CPPC_NUM_ENT) {
  387. pr_debug("Firmware exports %d entries. Expected: %d\n",
  388. num_ent, CPPC_NUM_ENT);
  389. goto out_free;
  390. }
  391. /* Second entry should be revision. */
  392. cpc_obj = &out_obj->package.elements[1];
  393. if (cpc_obj->type == ACPI_TYPE_INTEGER) {
  394. cpc_rev = cpc_obj->integer.value;
  395. } else {
  396. pr_debug("Unexpected entry type(%d) for Revision\n",
  397. cpc_obj->type);
  398. goto out_free;
  399. }
  400. if (cpc_rev != CPPC_REV) {
  401. pr_debug("Firmware exports revision:%d. Expected:%d\n",
  402. cpc_rev, CPPC_REV);
  403. goto out_free;
  404. }
  405. /* Iterate through remaining entries in _CPC */
  406. for (i = 2; i < num_ent; i++) {
  407. cpc_obj = &out_obj->package.elements[i];
  408. if (cpc_obj->type == ACPI_TYPE_INTEGER) {
  409. cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_INTEGER;
  410. cpc_ptr->cpc_regs[i-2].cpc_entry.int_value = cpc_obj->integer.value;
  411. } else if (cpc_obj->type == ACPI_TYPE_BUFFER) {
  412. gas_t = (struct cpc_reg *)
  413. cpc_obj->buffer.pointer;
  414. /*
  415. * The PCC Subspace index is encoded inside
  416. * the CPC table entries. The same PCC index
  417. * will be used for all the PCC entries,
  418. * so extract it only once.
  419. */
  420. if (gas_t->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
  421. if (pcc_subspace_idx < 0)
  422. pcc_subspace_idx = gas_t->access_width;
  423. else if (pcc_subspace_idx != gas_t->access_width) {
  424. pr_debug("Mismatched PCC ids.\n");
  425. goto out_free;
  426. }
  427. } else if (gas_t->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
  428. /* Support only PCC and SYS MEM type regs */
  429. pr_debug("Unsupported register type: %d\n", gas_t->space_id);
  430. goto out_free;
  431. }
  432. cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_BUFFER;
  433. memcpy(&cpc_ptr->cpc_regs[i-2].cpc_entry.reg, gas_t, sizeof(*gas_t));
  434. } else {
  435. pr_debug("Err in entry:%d in CPC table of CPU:%d \n", i, pr->id);
  436. goto out_free;
  437. }
  438. }
  439. /* Store CPU Logical ID */
  440. cpc_ptr->cpu_id = pr->id;
  441. /* Parse PSD data for this CPU */
  442. ret = acpi_get_psd(cpc_ptr, handle);
  443. if (ret)
  444. goto out_free;
  445. /* Register PCC channel once for all CPUs. */
  446. if (!pcc_channel_acquired) {
  447. ret = register_pcc_channel(pcc_subspace_idx);
  448. if (ret)
  449. goto out_free;
  450. }
  451. /* Plug PSD data into this CPUs CPC descriptor. */
  452. per_cpu(cpc_desc_ptr, pr->id) = cpc_ptr;
  453. /* Everything looks okay */
  454. pr_debug("Parsed CPC struct for CPU: %d\n", pr->id);
  455. kfree(output.pointer);
  456. return 0;
  457. out_free:
  458. kfree(cpc_ptr);
  459. out_buf_free:
  460. kfree(output.pointer);
  461. return ret;
  462. }
  463. EXPORT_SYMBOL_GPL(acpi_cppc_processor_probe);
  464. /**
  465. * acpi_cppc_processor_exit - Cleanup CPC structs.
  466. * @pr: Ptr to acpi_processor containing this CPUs logical Id.
  467. *
  468. * Return: Void
  469. */
  470. void acpi_cppc_processor_exit(struct acpi_processor *pr)
  471. {
  472. struct cpc_desc *cpc_ptr;
  473. cpc_ptr = per_cpu(cpc_desc_ptr, pr->id);
  474. kfree(cpc_ptr);
  475. }
  476. EXPORT_SYMBOL_GPL(acpi_cppc_processor_exit);
  477. static u64 get_phys_addr(struct cpc_reg *reg)
  478. {
  479. /* PCC communication addr space begins at byte offset 0x8. */
  480. if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM)
  481. return (u64)comm_base_addr + 0x8 + reg->address;
  482. else
  483. return reg->address;
  484. }
  485. static void cpc_read(struct cpc_reg *reg, u64 *val)
  486. {
  487. u64 addr = get_phys_addr(reg);
  488. acpi_os_read_memory((acpi_physical_address)addr,
  489. val, reg->bit_width);
  490. }
  491. static void cpc_write(struct cpc_reg *reg, u64 val)
  492. {
  493. u64 addr = get_phys_addr(reg);
  494. acpi_os_write_memory((acpi_physical_address)addr,
  495. val, reg->bit_width);
  496. }
  497. /**
  498. * cppc_get_perf_caps - Get a CPUs performance capabilities.
  499. * @cpunum: CPU from which to get capabilities info.
  500. * @perf_caps: ptr to cppc_perf_caps. See cppc_acpi.h
  501. *
  502. * Return: 0 for success with perf_caps populated else -ERRNO.
  503. */
  504. int cppc_get_perf_caps(int cpunum, struct cppc_perf_caps *perf_caps)
  505. {
  506. struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);
  507. struct cpc_register_resource *highest_reg, *lowest_reg, *ref_perf,
  508. *nom_perf;
  509. u64 high, low, ref, nom;
  510. int ret = 0;
  511. if (!cpc_desc) {
  512. pr_debug("No CPC descriptor for CPU:%d\n", cpunum);
  513. return -ENODEV;
  514. }
  515. highest_reg = &cpc_desc->cpc_regs[HIGHEST_PERF];
  516. lowest_reg = &cpc_desc->cpc_regs[LOWEST_PERF];
  517. ref_perf = &cpc_desc->cpc_regs[REFERENCE_PERF];
  518. nom_perf = &cpc_desc->cpc_regs[NOMINAL_PERF];
  519. spin_lock(&pcc_lock);
  520. /* Are any of the regs PCC ?*/
  521. if ((highest_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  522. (lowest_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  523. (ref_perf->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  524. (nom_perf->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM)) {
  525. /* Ring doorbell once to update PCC subspace */
  526. if (send_pcc_cmd(CMD_READ)) {
  527. ret = -EIO;
  528. goto out_err;
  529. }
  530. }
  531. cpc_read(&highest_reg->cpc_entry.reg, &high);
  532. perf_caps->highest_perf = high;
  533. cpc_read(&lowest_reg->cpc_entry.reg, &low);
  534. perf_caps->lowest_perf = low;
  535. cpc_read(&ref_perf->cpc_entry.reg, &ref);
  536. perf_caps->reference_perf = ref;
  537. cpc_read(&nom_perf->cpc_entry.reg, &nom);
  538. perf_caps->nominal_perf = nom;
  539. if (!ref)
  540. perf_caps->reference_perf = perf_caps->nominal_perf;
  541. if (!high || !low || !nom)
  542. ret = -EFAULT;
  543. out_err:
  544. spin_unlock(&pcc_lock);
  545. return ret;
  546. }
  547. EXPORT_SYMBOL_GPL(cppc_get_perf_caps);
  548. /**
  549. * cppc_get_perf_ctrs - Read a CPUs performance feedback counters.
  550. * @cpunum: CPU from which to read counters.
  551. * @perf_fb_ctrs: ptr to cppc_perf_fb_ctrs. See cppc_acpi.h
  552. *
  553. * Return: 0 for success with perf_fb_ctrs populated else -ERRNO.
  554. */
  555. int cppc_get_perf_ctrs(int cpunum, struct cppc_perf_fb_ctrs *perf_fb_ctrs)
  556. {
  557. struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpunum);
  558. struct cpc_register_resource *delivered_reg, *reference_reg;
  559. u64 delivered, reference;
  560. int ret = 0;
  561. if (!cpc_desc) {
  562. pr_debug("No CPC descriptor for CPU:%d\n", cpunum);
  563. return -ENODEV;
  564. }
  565. delivered_reg = &cpc_desc->cpc_regs[DELIVERED_CTR];
  566. reference_reg = &cpc_desc->cpc_regs[REFERENCE_CTR];
  567. spin_lock(&pcc_lock);
  568. /* Are any of the regs PCC ?*/
  569. if ((delivered_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) ||
  570. (reference_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM)) {
  571. /* Ring doorbell once to update PCC subspace */
  572. if (send_pcc_cmd(CMD_READ)) {
  573. ret = -EIO;
  574. goto out_err;
  575. }
  576. }
  577. cpc_read(&delivered_reg->cpc_entry.reg, &delivered);
  578. cpc_read(&reference_reg->cpc_entry.reg, &reference);
  579. if (!delivered || !reference) {
  580. ret = -EFAULT;
  581. goto out_err;
  582. }
  583. perf_fb_ctrs->delivered = delivered;
  584. perf_fb_ctrs->reference = reference;
  585. perf_fb_ctrs->delivered -= perf_fb_ctrs->prev_delivered;
  586. perf_fb_ctrs->reference -= perf_fb_ctrs->prev_reference;
  587. perf_fb_ctrs->prev_delivered = delivered;
  588. perf_fb_ctrs->prev_reference = reference;
  589. out_err:
  590. spin_unlock(&pcc_lock);
  591. return ret;
  592. }
  593. EXPORT_SYMBOL_GPL(cppc_get_perf_ctrs);
  594. /**
  595. * cppc_set_perf - Set a CPUs performance controls.
  596. * @cpu: CPU for which to set performance controls.
  597. * @perf_ctrls: ptr to cppc_perf_ctrls. See cppc_acpi.h
  598. *
  599. * Return: 0 for success, -ERRNO otherwise.
  600. */
  601. int cppc_set_perf(int cpu, struct cppc_perf_ctrls *perf_ctrls)
  602. {
  603. struct cpc_desc *cpc_desc = per_cpu(cpc_desc_ptr, cpu);
  604. struct cpc_register_resource *desired_reg;
  605. int ret = 0;
  606. if (!cpc_desc) {
  607. pr_debug("No CPC descriptor for CPU:%d\n", cpu);
  608. return -ENODEV;
  609. }
  610. desired_reg = &cpc_desc->cpc_regs[DESIRED_PERF];
  611. spin_lock(&pcc_lock);
  612. /*
  613. * Skip writing MIN/MAX until Linux knows how to come up with
  614. * useful values.
  615. */
  616. cpc_write(&desired_reg->cpc_entry.reg, perf_ctrls->desired_perf);
  617. /* Is this a PCC reg ?*/
  618. if (desired_reg->cpc_entry.reg.space_id == ACPI_ADR_SPACE_PLATFORM_COMM) {
  619. /* Ring doorbell so Remote can get our perf request. */
  620. if (send_pcc_cmd(CMD_WRITE))
  621. ret = -EIO;
  622. }
  623. spin_unlock(&pcc_lock);
  624. return ret;
  625. }
  626. EXPORT_SYMBOL_GPL(cppc_set_perf);