pci_root.c 23 KB

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  1. /*
  2. * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. *
  7. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or (at
  12. * your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/init.h>
  24. #include <linux/types.h>
  25. #include <linux/mutex.h>
  26. #include <linux/pm.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/pci.h>
  29. #include <linux/pci-acpi.h>
  30. #include <linux/pci-aspm.h>
  31. #include <linux/dmar.h>
  32. #include <linux/acpi.h>
  33. #include <linux/slab.h>
  34. #include <linux/dmi.h>
  35. #include <acpi/apei.h> /* for acpi_hest_init() */
  36. #include "internal.h"
  37. #define _COMPONENT ACPI_PCI_COMPONENT
  38. ACPI_MODULE_NAME("pci_root");
  39. #define ACPI_PCI_ROOT_CLASS "pci_bridge"
  40. #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
  41. static int acpi_pci_root_add(struct acpi_device *device,
  42. const struct acpi_device_id *not_used);
  43. static void acpi_pci_root_remove(struct acpi_device *device);
  44. static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
  45. {
  46. acpiphp_check_host_bridge(adev);
  47. return 0;
  48. }
  49. #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
  50. | OSC_PCI_ASPM_SUPPORT \
  51. | OSC_PCI_CLOCK_PM_SUPPORT \
  52. | OSC_PCI_MSI_SUPPORT)
  53. static const struct acpi_device_id root_device_ids[] = {
  54. {"PNP0A03", 0},
  55. {"", 0},
  56. };
  57. static struct acpi_scan_handler pci_root_handler = {
  58. .ids = root_device_ids,
  59. .attach = acpi_pci_root_add,
  60. .detach = acpi_pci_root_remove,
  61. .hotplug = {
  62. .enabled = true,
  63. .scan_dependent = acpi_pci_root_scan_dependent,
  64. },
  65. };
  66. static DEFINE_MUTEX(osc_lock);
  67. /**
  68. * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
  69. * @handle - the ACPI CA node in question.
  70. *
  71. * Note: we could make this API take a struct acpi_device * instead, but
  72. * for now, it's more convenient to operate on an acpi_handle.
  73. */
  74. int acpi_is_root_bridge(acpi_handle handle)
  75. {
  76. int ret;
  77. struct acpi_device *device;
  78. ret = acpi_bus_get_device(handle, &device);
  79. if (ret)
  80. return 0;
  81. ret = acpi_match_device_ids(device, root_device_ids);
  82. if (ret)
  83. return 0;
  84. else
  85. return 1;
  86. }
  87. EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
  88. static acpi_status
  89. get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
  90. {
  91. struct resource *res = data;
  92. struct acpi_resource_address64 address;
  93. acpi_status status;
  94. status = acpi_resource_to_address64(resource, &address);
  95. if (ACPI_FAILURE(status))
  96. return AE_OK;
  97. if ((address.address.address_length > 0) &&
  98. (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
  99. res->start = address.address.minimum;
  100. res->end = address.address.minimum + address.address.address_length - 1;
  101. }
  102. return AE_OK;
  103. }
  104. static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
  105. struct resource *res)
  106. {
  107. acpi_status status;
  108. res->start = -1;
  109. status =
  110. acpi_walk_resources(handle, METHOD_NAME__CRS,
  111. get_root_bridge_busnr_callback, res);
  112. if (ACPI_FAILURE(status))
  113. return status;
  114. if (res->start == -1)
  115. return AE_ERROR;
  116. return AE_OK;
  117. }
  118. struct pci_osc_bit_struct {
  119. u32 bit;
  120. char *desc;
  121. };
  122. static struct pci_osc_bit_struct pci_osc_support_bit[] = {
  123. { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
  124. { OSC_PCI_ASPM_SUPPORT, "ASPM" },
  125. { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
  126. { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
  127. { OSC_PCI_MSI_SUPPORT, "MSI" },
  128. };
  129. static struct pci_osc_bit_struct pci_osc_control_bit[] = {
  130. { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
  131. { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
  132. { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
  133. { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
  134. { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
  135. };
  136. static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
  137. struct pci_osc_bit_struct *table, int size)
  138. {
  139. char buf[80];
  140. int i, len = 0;
  141. struct pci_osc_bit_struct *entry;
  142. buf[0] = '\0';
  143. for (i = 0, entry = table; i < size; i++, entry++)
  144. if (word & entry->bit)
  145. len += snprintf(buf + len, sizeof(buf) - len, "%s%s",
  146. len ? " " : "", entry->desc);
  147. dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
  148. }
  149. static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
  150. {
  151. decode_osc_bits(root, msg, word, pci_osc_support_bit,
  152. ARRAY_SIZE(pci_osc_support_bit));
  153. }
  154. static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
  155. {
  156. decode_osc_bits(root, msg, word, pci_osc_control_bit,
  157. ARRAY_SIZE(pci_osc_control_bit));
  158. }
  159. static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
  160. static acpi_status acpi_pci_run_osc(acpi_handle handle,
  161. const u32 *capbuf, u32 *retval)
  162. {
  163. struct acpi_osc_context context = {
  164. .uuid_str = pci_osc_uuid_str,
  165. .rev = 1,
  166. .cap.length = 12,
  167. .cap.pointer = (void *)capbuf,
  168. };
  169. acpi_status status;
  170. status = acpi_run_osc(handle, &context);
  171. if (ACPI_SUCCESS(status)) {
  172. *retval = *((u32 *)(context.ret.pointer + 8));
  173. kfree(context.ret.pointer);
  174. }
  175. return status;
  176. }
  177. static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
  178. u32 support,
  179. u32 *control)
  180. {
  181. acpi_status status;
  182. u32 result, capbuf[3];
  183. support &= OSC_PCI_SUPPORT_MASKS;
  184. support |= root->osc_support_set;
  185. capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
  186. capbuf[OSC_SUPPORT_DWORD] = support;
  187. if (control) {
  188. *control &= OSC_PCI_CONTROL_MASKS;
  189. capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
  190. } else {
  191. /* Run _OSC query only with existing controls. */
  192. capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
  193. }
  194. status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
  195. if (ACPI_SUCCESS(status)) {
  196. root->osc_support_set = support;
  197. if (control)
  198. *control = result;
  199. }
  200. return status;
  201. }
  202. static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
  203. {
  204. acpi_status status;
  205. mutex_lock(&osc_lock);
  206. status = acpi_pci_query_osc(root, flags, NULL);
  207. mutex_unlock(&osc_lock);
  208. return status;
  209. }
  210. struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
  211. {
  212. struct acpi_pci_root *root;
  213. struct acpi_device *device;
  214. if (acpi_bus_get_device(handle, &device) ||
  215. acpi_match_device_ids(device, root_device_ids))
  216. return NULL;
  217. root = acpi_driver_data(device);
  218. return root;
  219. }
  220. EXPORT_SYMBOL_GPL(acpi_pci_find_root);
  221. struct acpi_handle_node {
  222. struct list_head node;
  223. acpi_handle handle;
  224. };
  225. /**
  226. * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
  227. * @handle: the handle in question
  228. *
  229. * Given an ACPI CA handle, the desired PCI device is located in the
  230. * list of PCI devices.
  231. *
  232. * If the device is found, its reference count is increased and this
  233. * function returns a pointer to its data structure. The caller must
  234. * decrement the reference count by calling pci_dev_put().
  235. * If no device is found, %NULL is returned.
  236. */
  237. struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
  238. {
  239. int dev, fn;
  240. unsigned long long adr;
  241. acpi_status status;
  242. acpi_handle phandle;
  243. struct pci_bus *pbus;
  244. struct pci_dev *pdev = NULL;
  245. struct acpi_handle_node *node, *tmp;
  246. struct acpi_pci_root *root;
  247. LIST_HEAD(device_list);
  248. /*
  249. * Walk up the ACPI CA namespace until we reach a PCI root bridge.
  250. */
  251. phandle = handle;
  252. while (!acpi_is_root_bridge(phandle)) {
  253. node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
  254. if (!node)
  255. goto out;
  256. INIT_LIST_HEAD(&node->node);
  257. node->handle = phandle;
  258. list_add(&node->node, &device_list);
  259. status = acpi_get_parent(phandle, &phandle);
  260. if (ACPI_FAILURE(status))
  261. goto out;
  262. }
  263. root = acpi_pci_find_root(phandle);
  264. if (!root)
  265. goto out;
  266. pbus = root->bus;
  267. /*
  268. * Now, walk back down the PCI device tree until we return to our
  269. * original handle. Assumes that everything between the PCI root
  270. * bridge and the device we're looking for must be a P2P bridge.
  271. */
  272. list_for_each_entry(node, &device_list, node) {
  273. acpi_handle hnd = node->handle;
  274. status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
  275. if (ACPI_FAILURE(status))
  276. goto out;
  277. dev = (adr >> 16) & 0xffff;
  278. fn = adr & 0xffff;
  279. pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
  280. if (!pdev || hnd == handle)
  281. break;
  282. pbus = pdev->subordinate;
  283. pci_dev_put(pdev);
  284. /*
  285. * This function may be called for a non-PCI device that has a
  286. * PCI parent (eg. a disk under a PCI SATA controller). In that
  287. * case pdev->subordinate will be NULL for the parent.
  288. */
  289. if (!pbus) {
  290. dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
  291. pdev = NULL;
  292. break;
  293. }
  294. }
  295. out:
  296. list_for_each_entry_safe(node, tmp, &device_list, node)
  297. kfree(node);
  298. return pdev;
  299. }
  300. EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
  301. /**
  302. * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
  303. * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
  304. * @mask: Mask of _OSC bits to request control of, place to store control mask.
  305. * @req: Mask of _OSC bits the control of is essential to the caller.
  306. *
  307. * Run _OSC query for @mask and if that is successful, compare the returned
  308. * mask of control bits with @req. If all of the @req bits are set in the
  309. * returned mask, run _OSC request for it.
  310. *
  311. * The variable at the @mask address may be modified regardless of whether or
  312. * not the function returns success. On success it will contain the mask of
  313. * _OSC bits the BIOS has granted control of, but its contents are meaningless
  314. * on failure.
  315. **/
  316. acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
  317. {
  318. struct acpi_pci_root *root;
  319. acpi_status status = AE_OK;
  320. u32 ctrl, capbuf[3];
  321. if (!mask)
  322. return AE_BAD_PARAMETER;
  323. ctrl = *mask & OSC_PCI_CONTROL_MASKS;
  324. if ((ctrl & req) != req)
  325. return AE_TYPE;
  326. root = acpi_pci_find_root(handle);
  327. if (!root)
  328. return AE_NOT_EXIST;
  329. mutex_lock(&osc_lock);
  330. *mask = ctrl | root->osc_control_set;
  331. /* No need to evaluate _OSC if the control was already granted. */
  332. if ((root->osc_control_set & ctrl) == ctrl)
  333. goto out;
  334. /* Need to check the available controls bits before requesting them. */
  335. while (*mask) {
  336. status = acpi_pci_query_osc(root, root->osc_support_set, mask);
  337. if (ACPI_FAILURE(status))
  338. goto out;
  339. if (ctrl == *mask)
  340. break;
  341. decode_osc_control(root, "platform does not support",
  342. ctrl & ~(*mask));
  343. ctrl = *mask;
  344. }
  345. if ((ctrl & req) != req) {
  346. decode_osc_control(root, "not requesting control; platform does not support",
  347. req & ~(ctrl));
  348. status = AE_SUPPORT;
  349. goto out;
  350. }
  351. capbuf[OSC_QUERY_DWORD] = 0;
  352. capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
  353. capbuf[OSC_CONTROL_DWORD] = ctrl;
  354. status = acpi_pci_run_osc(handle, capbuf, mask);
  355. if (ACPI_SUCCESS(status))
  356. root->osc_control_set = *mask;
  357. out:
  358. mutex_unlock(&osc_lock);
  359. return status;
  360. }
  361. EXPORT_SYMBOL(acpi_pci_osc_control_set);
  362. static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
  363. {
  364. u32 support, control, requested;
  365. acpi_status status;
  366. struct acpi_device *device = root->device;
  367. acpi_handle handle = device->handle;
  368. /*
  369. * Apple always return failure on _OSC calls when _OSI("Darwin") has
  370. * been called successfully. We know the feature set supported by the
  371. * platform, so avoid calling _OSC at all
  372. */
  373. if (dmi_match(DMI_SYS_VENDOR, "Apple Inc.")) {
  374. root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
  375. decode_osc_control(root, "OS assumes control of",
  376. root->osc_control_set);
  377. return;
  378. }
  379. /*
  380. * All supported architectures that use ACPI have support for
  381. * PCI domains, so we indicate this in _OSC support capabilities.
  382. */
  383. support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
  384. if (pci_ext_cfg_avail())
  385. support |= OSC_PCI_EXT_CONFIG_SUPPORT;
  386. if (pcie_aspm_support_enabled())
  387. support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
  388. if (pci_msi_enabled())
  389. support |= OSC_PCI_MSI_SUPPORT;
  390. decode_osc_support(root, "OS supports", support);
  391. status = acpi_pci_osc_support(root, support);
  392. if (ACPI_FAILURE(status)) {
  393. dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
  394. acpi_format_exception(status));
  395. *no_aspm = 1;
  396. return;
  397. }
  398. if (pcie_ports_disabled) {
  399. dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
  400. return;
  401. }
  402. if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
  403. decode_osc_support(root, "not requesting OS control; OS requires",
  404. ACPI_PCIE_REQ_SUPPORT);
  405. return;
  406. }
  407. control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
  408. | OSC_PCI_EXPRESS_PME_CONTROL;
  409. if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
  410. control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
  411. if (pci_aer_available()) {
  412. if (aer_acpi_firmware_first())
  413. dev_info(&device->dev,
  414. "PCIe AER handled by firmware\n");
  415. else
  416. control |= OSC_PCI_EXPRESS_AER_CONTROL;
  417. }
  418. requested = control;
  419. status = acpi_pci_osc_control_set(handle, &control,
  420. OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
  421. if (ACPI_SUCCESS(status)) {
  422. decode_osc_control(root, "OS now controls", control);
  423. if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
  424. /*
  425. * We have ASPM control, but the FADT indicates that
  426. * it's unsupported. Leave existing configuration
  427. * intact and prevent the OS from touching it.
  428. */
  429. dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
  430. *no_aspm = 1;
  431. }
  432. } else {
  433. decode_osc_control(root, "OS requested", requested);
  434. decode_osc_control(root, "platform willing to grant", control);
  435. dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
  436. acpi_format_exception(status));
  437. /*
  438. * We want to disable ASPM here, but aspm_disabled
  439. * needs to remain in its state from boot so that we
  440. * properly handle PCIe 1.1 devices. So we set this
  441. * flag here, to defer the action until after the ACPI
  442. * root scan.
  443. */
  444. *no_aspm = 1;
  445. }
  446. }
  447. static int acpi_pci_root_add(struct acpi_device *device,
  448. const struct acpi_device_id *not_used)
  449. {
  450. unsigned long long segment, bus;
  451. acpi_status status;
  452. int result;
  453. struct acpi_pci_root *root;
  454. acpi_handle handle = device->handle;
  455. int no_aspm = 0;
  456. bool hotadd = system_state != SYSTEM_BOOTING;
  457. root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
  458. if (!root)
  459. return -ENOMEM;
  460. segment = 0;
  461. status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
  462. &segment);
  463. if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
  464. dev_err(&device->dev, "can't evaluate _SEG\n");
  465. result = -ENODEV;
  466. goto end;
  467. }
  468. /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
  469. root->secondary.flags = IORESOURCE_BUS;
  470. status = try_get_root_bridge_busnr(handle, &root->secondary);
  471. if (ACPI_FAILURE(status)) {
  472. /*
  473. * We need both the start and end of the downstream bus range
  474. * to interpret _CBA (MMCONFIG base address), so it really is
  475. * supposed to be in _CRS. If we don't find it there, all we
  476. * can do is assume [_BBN-0xFF] or [0-0xFF].
  477. */
  478. root->secondary.end = 0xFF;
  479. dev_warn(&device->dev,
  480. FW_BUG "no secondary bus range in _CRS\n");
  481. status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
  482. NULL, &bus);
  483. if (ACPI_SUCCESS(status))
  484. root->secondary.start = bus;
  485. else if (status == AE_NOT_FOUND)
  486. root->secondary.start = 0;
  487. else {
  488. dev_err(&device->dev, "can't evaluate _BBN\n");
  489. result = -ENODEV;
  490. goto end;
  491. }
  492. }
  493. root->device = device;
  494. root->segment = segment & 0xFFFF;
  495. strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
  496. strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
  497. device->driver_data = root;
  498. if (hotadd && dmar_device_add(handle)) {
  499. result = -ENXIO;
  500. goto end;
  501. }
  502. pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
  503. acpi_device_name(device), acpi_device_bid(device),
  504. root->segment, &root->secondary);
  505. root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
  506. negotiate_os_control(root, &no_aspm);
  507. /*
  508. * TBD: Need PCI interface for enumeration/configuration of roots.
  509. */
  510. /*
  511. * Scan the Root Bridge
  512. * --------------------
  513. * Must do this prior to any attempt to bind the root device, as the
  514. * PCI namespace does not get created until this call is made (and
  515. * thus the root bridge's pci_dev does not exist).
  516. */
  517. root->bus = pci_acpi_scan_root(root);
  518. if (!root->bus) {
  519. dev_err(&device->dev,
  520. "Bus %04x:%02x not present in PCI namespace\n",
  521. root->segment, (unsigned int)root->secondary.start);
  522. device->driver_data = NULL;
  523. result = -ENODEV;
  524. goto remove_dmar;
  525. }
  526. if (no_aspm)
  527. pcie_no_aspm();
  528. pci_acpi_add_bus_pm_notifier(device);
  529. if (device->wakeup.flags.run_wake)
  530. device_set_run_wake(root->bus->bridge, true);
  531. if (hotadd) {
  532. pcibios_resource_survey_bus(root->bus);
  533. pci_assign_unassigned_root_bus_resources(root->bus);
  534. acpi_ioapic_add(root);
  535. }
  536. pci_lock_rescan_remove();
  537. pci_bus_add_devices(root->bus);
  538. pci_unlock_rescan_remove();
  539. return 1;
  540. remove_dmar:
  541. if (hotadd)
  542. dmar_device_remove(handle);
  543. end:
  544. kfree(root);
  545. return result;
  546. }
  547. static void acpi_pci_root_remove(struct acpi_device *device)
  548. {
  549. struct acpi_pci_root *root = acpi_driver_data(device);
  550. pci_lock_rescan_remove();
  551. pci_stop_root_bus(root->bus);
  552. WARN_ON(acpi_ioapic_remove(root));
  553. device_set_run_wake(root->bus->bridge, false);
  554. pci_acpi_remove_bus_pm_notifier(device);
  555. pci_remove_root_bus(root->bus);
  556. dmar_device_remove(device->handle);
  557. pci_unlock_rescan_remove();
  558. kfree(root);
  559. }
  560. /*
  561. * Following code to support acpi_pci_root_create() is copied from
  562. * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
  563. * and ARM64.
  564. */
  565. static void acpi_pci_root_validate_resources(struct device *dev,
  566. struct list_head *resources,
  567. unsigned long type)
  568. {
  569. LIST_HEAD(list);
  570. struct resource *res1, *res2, *root = NULL;
  571. struct resource_entry *tmp, *entry, *entry2;
  572. BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
  573. root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
  574. list_splice_init(resources, &list);
  575. resource_list_for_each_entry_safe(entry, tmp, &list) {
  576. bool free = false;
  577. resource_size_t end;
  578. res1 = entry->res;
  579. if (!(res1->flags & type))
  580. goto next;
  581. /* Exclude non-addressable range or non-addressable portion */
  582. end = min(res1->end, root->end);
  583. if (end <= res1->start) {
  584. dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
  585. res1);
  586. free = true;
  587. goto next;
  588. } else if (res1->end != end) {
  589. dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
  590. res1, (unsigned long long)end + 1,
  591. (unsigned long long)res1->end);
  592. res1->end = end;
  593. }
  594. resource_list_for_each_entry(entry2, resources) {
  595. res2 = entry2->res;
  596. if (!(res2->flags & type))
  597. continue;
  598. /*
  599. * I don't like throwing away windows because then
  600. * our resources no longer match the ACPI _CRS, but
  601. * the kernel resource tree doesn't allow overlaps.
  602. */
  603. if (resource_overlaps(res1, res2)) {
  604. res2->start = min(res1->start, res2->start);
  605. res2->end = max(res1->end, res2->end);
  606. dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
  607. res2, res1);
  608. free = true;
  609. goto next;
  610. }
  611. }
  612. next:
  613. resource_list_del(entry);
  614. if (free)
  615. resource_list_free_entry(entry);
  616. else
  617. resource_list_add_tail(entry, resources);
  618. }
  619. }
  620. int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
  621. {
  622. int ret;
  623. struct list_head *list = &info->resources;
  624. struct acpi_device *device = info->bridge;
  625. struct resource_entry *entry, *tmp;
  626. unsigned long flags;
  627. flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
  628. ret = acpi_dev_get_resources(device, list,
  629. acpi_dev_filter_resource_type_cb,
  630. (void *)flags);
  631. if (ret < 0)
  632. dev_warn(&device->dev,
  633. "failed to parse _CRS method, error code %d\n", ret);
  634. else if (ret == 0)
  635. dev_dbg(&device->dev,
  636. "no IO and memory resources present in _CRS\n");
  637. else {
  638. resource_list_for_each_entry_safe(entry, tmp, list) {
  639. if (entry->res->flags & IORESOURCE_DISABLED)
  640. resource_list_destroy_entry(entry);
  641. else
  642. entry->res->name = info->name;
  643. }
  644. acpi_pci_root_validate_resources(&device->dev, list,
  645. IORESOURCE_MEM);
  646. acpi_pci_root_validate_resources(&device->dev, list,
  647. IORESOURCE_IO);
  648. }
  649. return ret;
  650. }
  651. static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
  652. {
  653. struct resource_entry *entry, *tmp;
  654. struct resource *res, *conflict, *root = NULL;
  655. resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
  656. res = entry->res;
  657. if (res->flags & IORESOURCE_MEM)
  658. root = &iomem_resource;
  659. else if (res->flags & IORESOURCE_IO)
  660. root = &ioport_resource;
  661. else
  662. continue;
  663. /*
  664. * Some legacy x86 host bridge drivers use iomem_resource and
  665. * ioport_resource as default resource pool, skip it.
  666. */
  667. if (res == root)
  668. continue;
  669. conflict = insert_resource_conflict(root, res);
  670. if (conflict) {
  671. dev_info(&info->bridge->dev,
  672. "ignoring host bridge window %pR (conflicts with %s %pR)\n",
  673. res, conflict->name, conflict);
  674. resource_list_destroy_entry(entry);
  675. }
  676. }
  677. }
  678. static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
  679. {
  680. struct resource *res;
  681. struct resource_entry *entry, *tmp;
  682. if (!info)
  683. return;
  684. resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
  685. res = entry->res;
  686. if (res->parent &&
  687. (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
  688. release_resource(res);
  689. resource_list_destroy_entry(entry);
  690. }
  691. info->ops->release_info(info);
  692. }
  693. static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
  694. {
  695. struct resource *res;
  696. struct resource_entry *entry;
  697. resource_list_for_each_entry(entry, &bridge->windows) {
  698. res = entry->res;
  699. if (res->parent &&
  700. (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
  701. release_resource(res);
  702. }
  703. __acpi_pci_root_release_info(bridge->release_data);
  704. }
  705. struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
  706. struct acpi_pci_root_ops *ops,
  707. struct acpi_pci_root_info *info,
  708. void *sysdata)
  709. {
  710. int ret, busnum = root->secondary.start;
  711. struct acpi_device *device = root->device;
  712. int node = acpi_get_node(device->handle);
  713. struct pci_bus *bus;
  714. info->root = root;
  715. info->bridge = device;
  716. info->ops = ops;
  717. INIT_LIST_HEAD(&info->resources);
  718. snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
  719. root->segment, busnum);
  720. if (ops->init_info && ops->init_info(info))
  721. goto out_release_info;
  722. if (ops->prepare_resources)
  723. ret = ops->prepare_resources(info);
  724. else
  725. ret = acpi_pci_probe_root_resources(info);
  726. if (ret < 0)
  727. goto out_release_info;
  728. pci_acpi_root_add_resources(info);
  729. pci_add_resource(&info->resources, &root->secondary);
  730. bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
  731. sysdata, &info->resources);
  732. if (!bus)
  733. goto out_release_info;
  734. pci_scan_child_bus(bus);
  735. pci_set_host_bridge_release(to_pci_host_bridge(bus->bridge),
  736. acpi_pci_root_release_info, info);
  737. if (node != NUMA_NO_NODE)
  738. dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
  739. return bus;
  740. out_release_info:
  741. __acpi_pci_root_release_info(info);
  742. return NULL;
  743. }
  744. void __init acpi_pci_root_init(void)
  745. {
  746. acpi_hest_init();
  747. if (acpi_pci_disabled)
  748. return;
  749. pci_acpi_crs_quirks();
  750. acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
  751. }