hpet.c 24 KB

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  1. /*
  2. * Intel & MS High Precision Event Timer Implementation.
  3. *
  4. * Copyright (C) 2003 Intel Corporation
  5. * Venki Pallipadi
  6. * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
  7. * Bob Picco <robert.picco@hp.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/interrupt.h>
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/miscdevice.h>
  17. #include <linux/major.h>
  18. #include <linux/ioport.h>
  19. #include <linux/fcntl.h>
  20. #include <linux/init.h>
  21. #include <linux/poll.h>
  22. #include <linux/mm.h>
  23. #include <linux/proc_fs.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/sysctl.h>
  26. #include <linux/wait.h>
  27. #include <linux/bcd.h>
  28. #include <linux/seq_file.h>
  29. #include <linux/bitops.h>
  30. #include <linux/compat.h>
  31. #include <linux/clocksource.h>
  32. #include <linux/uaccess.h>
  33. #include <linux/slab.h>
  34. #include <linux/io.h>
  35. #include <linux/acpi.h>
  36. #include <linux/hpet.h>
  37. #include <asm/current.h>
  38. #include <asm/irq.h>
  39. #include <asm/div64.h>
  40. /*
  41. * The High Precision Event Timer driver.
  42. * This driver is closely modelled after the rtc.c driver.
  43. * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
  44. */
  45. #define HPET_USER_FREQ (64)
  46. #define HPET_DRIFT (500)
  47. #define HPET_RANGE_SIZE 1024 /* from HPET spec */
  48. /* WARNING -- don't get confused. These macros are never used
  49. * to write the (single) counter, and rarely to read it.
  50. * They're badly named; to fix, someday.
  51. */
  52. #if BITS_PER_LONG == 64
  53. #define write_counter(V, MC) writeq(V, MC)
  54. #define read_counter(MC) readq(MC)
  55. #else
  56. #define write_counter(V, MC) writel(V, MC)
  57. #define read_counter(MC) readl(MC)
  58. #endif
  59. static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
  60. static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
  61. /* This clocksource driver currently only works on ia64 */
  62. #ifdef CONFIG_IA64
  63. static void __iomem *hpet_mctr;
  64. static cycle_t read_hpet(struct clocksource *cs)
  65. {
  66. return (cycle_t)read_counter((void __iomem *)hpet_mctr);
  67. }
  68. static struct clocksource clocksource_hpet = {
  69. .name = "hpet",
  70. .rating = 250,
  71. .read = read_hpet,
  72. .mask = CLOCKSOURCE_MASK(64),
  73. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  74. };
  75. static struct clocksource *hpet_clocksource;
  76. #endif
  77. /* A lock for concurrent access by app and isr hpet activity. */
  78. static DEFINE_SPINLOCK(hpet_lock);
  79. #define HPET_DEV_NAME (7)
  80. struct hpet_dev {
  81. struct hpets *hd_hpets;
  82. struct hpet __iomem *hd_hpet;
  83. struct hpet_timer __iomem *hd_timer;
  84. unsigned long hd_ireqfreq;
  85. unsigned long hd_irqdata;
  86. wait_queue_head_t hd_waitqueue;
  87. struct fasync_struct *hd_async_queue;
  88. unsigned int hd_flags;
  89. unsigned int hd_irq;
  90. unsigned int hd_hdwirq;
  91. char hd_name[HPET_DEV_NAME];
  92. };
  93. struct hpets {
  94. struct hpets *hp_next;
  95. struct hpet __iomem *hp_hpet;
  96. unsigned long hp_hpet_phys;
  97. struct clocksource *hp_clocksource;
  98. unsigned long long hp_tick_freq;
  99. unsigned long hp_delta;
  100. unsigned int hp_ntimer;
  101. unsigned int hp_which;
  102. struct hpet_dev hp_dev[1];
  103. };
  104. static struct hpets *hpets;
  105. #define HPET_OPEN 0x0001
  106. #define HPET_IE 0x0002 /* interrupt enabled */
  107. #define HPET_PERIODIC 0x0004
  108. #define HPET_SHARED_IRQ 0x0008
  109. #ifndef readq
  110. static inline unsigned long long readq(void __iomem *addr)
  111. {
  112. return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
  113. }
  114. #endif
  115. #ifndef writeq
  116. static inline void writeq(unsigned long long v, void __iomem *addr)
  117. {
  118. writel(v & 0xffffffff, addr);
  119. writel(v >> 32, addr + 4);
  120. }
  121. #endif
  122. static irqreturn_t hpet_interrupt(int irq, void *data)
  123. {
  124. struct hpet_dev *devp;
  125. unsigned long isr;
  126. devp = data;
  127. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  128. if ((devp->hd_flags & HPET_SHARED_IRQ) &&
  129. !(isr & readl(&devp->hd_hpet->hpet_isr)))
  130. return IRQ_NONE;
  131. spin_lock(&hpet_lock);
  132. devp->hd_irqdata++;
  133. /*
  134. * For non-periodic timers, increment the accumulator.
  135. * This has the effect of treating non-periodic like periodic.
  136. */
  137. if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
  138. unsigned long m, t, mc, base, k;
  139. struct hpet __iomem *hpet = devp->hd_hpet;
  140. struct hpets *hpetp = devp->hd_hpets;
  141. t = devp->hd_ireqfreq;
  142. m = read_counter(&devp->hd_timer->hpet_compare);
  143. mc = read_counter(&hpet->hpet_mc);
  144. /* The time for the next interrupt would logically be t + m,
  145. * however, if we are very unlucky and the interrupt is delayed
  146. * for longer than t then we will completely miss the next
  147. * interrupt if we set t + m and an application will hang.
  148. * Therefore we need to make a more complex computation assuming
  149. * that there exists a k for which the following is true:
  150. * k * t + base < mc + delta
  151. * (k + 1) * t + base > mc + delta
  152. * where t is the interval in hpet ticks for the given freq,
  153. * base is the theoretical start value 0 < base < t,
  154. * mc is the main counter value at the time of the interrupt,
  155. * delta is the time it takes to write the a value to the
  156. * comparator.
  157. * k may then be computed as (mc - base + delta) / t .
  158. */
  159. base = mc % t;
  160. k = (mc - base + hpetp->hp_delta) / t;
  161. write_counter(t * (k + 1) + base,
  162. &devp->hd_timer->hpet_compare);
  163. }
  164. if (devp->hd_flags & HPET_SHARED_IRQ)
  165. writel(isr, &devp->hd_hpet->hpet_isr);
  166. spin_unlock(&hpet_lock);
  167. wake_up_interruptible(&devp->hd_waitqueue);
  168. kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
  169. return IRQ_HANDLED;
  170. }
  171. static void hpet_timer_set_irq(struct hpet_dev *devp)
  172. {
  173. unsigned long v;
  174. int irq, gsi;
  175. struct hpet_timer __iomem *timer;
  176. spin_lock_irq(&hpet_lock);
  177. if (devp->hd_hdwirq) {
  178. spin_unlock_irq(&hpet_lock);
  179. return;
  180. }
  181. timer = devp->hd_timer;
  182. /* we prefer level triggered mode */
  183. v = readl(&timer->hpet_config);
  184. if (!(v & Tn_INT_TYPE_CNF_MASK)) {
  185. v |= Tn_INT_TYPE_CNF_MASK;
  186. writel(v, &timer->hpet_config);
  187. }
  188. spin_unlock_irq(&hpet_lock);
  189. v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
  190. Tn_INT_ROUTE_CAP_SHIFT;
  191. /*
  192. * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
  193. * legacy device. In IO APIC mode, we skip all the legacy IRQS.
  194. */
  195. if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
  196. v &= ~0xf3df;
  197. else
  198. v &= ~0xffff;
  199. for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
  200. if (irq >= nr_irqs) {
  201. irq = HPET_MAX_IRQ;
  202. break;
  203. }
  204. gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
  205. ACPI_ACTIVE_LOW);
  206. if (gsi > 0)
  207. break;
  208. /* FIXME: Setup interrupt source table */
  209. }
  210. if (irq < HPET_MAX_IRQ) {
  211. spin_lock_irq(&hpet_lock);
  212. v = readl(&timer->hpet_config);
  213. v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
  214. writel(v, &timer->hpet_config);
  215. devp->hd_hdwirq = gsi;
  216. spin_unlock_irq(&hpet_lock);
  217. }
  218. return;
  219. }
  220. static int hpet_open(struct inode *inode, struct file *file)
  221. {
  222. struct hpet_dev *devp;
  223. struct hpets *hpetp;
  224. int i;
  225. if (file->f_mode & FMODE_WRITE)
  226. return -EINVAL;
  227. mutex_lock(&hpet_mutex);
  228. spin_lock_irq(&hpet_lock);
  229. for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
  230. for (i = 0; i < hpetp->hp_ntimer; i++)
  231. if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
  232. continue;
  233. else {
  234. devp = &hpetp->hp_dev[i];
  235. break;
  236. }
  237. if (!devp) {
  238. spin_unlock_irq(&hpet_lock);
  239. mutex_unlock(&hpet_mutex);
  240. return -EBUSY;
  241. }
  242. file->private_data = devp;
  243. devp->hd_irqdata = 0;
  244. devp->hd_flags |= HPET_OPEN;
  245. spin_unlock_irq(&hpet_lock);
  246. mutex_unlock(&hpet_mutex);
  247. hpet_timer_set_irq(devp);
  248. return 0;
  249. }
  250. static ssize_t
  251. hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
  252. {
  253. DECLARE_WAITQUEUE(wait, current);
  254. unsigned long data;
  255. ssize_t retval;
  256. struct hpet_dev *devp;
  257. devp = file->private_data;
  258. if (!devp->hd_ireqfreq)
  259. return -EIO;
  260. if (count < sizeof(unsigned long))
  261. return -EINVAL;
  262. add_wait_queue(&devp->hd_waitqueue, &wait);
  263. for ( ; ; ) {
  264. set_current_state(TASK_INTERRUPTIBLE);
  265. spin_lock_irq(&hpet_lock);
  266. data = devp->hd_irqdata;
  267. devp->hd_irqdata = 0;
  268. spin_unlock_irq(&hpet_lock);
  269. if (data)
  270. break;
  271. else if (file->f_flags & O_NONBLOCK) {
  272. retval = -EAGAIN;
  273. goto out;
  274. } else if (signal_pending(current)) {
  275. retval = -ERESTARTSYS;
  276. goto out;
  277. }
  278. schedule();
  279. }
  280. retval = put_user(data, (unsigned long __user *)buf);
  281. if (!retval)
  282. retval = sizeof(unsigned long);
  283. out:
  284. __set_current_state(TASK_RUNNING);
  285. remove_wait_queue(&devp->hd_waitqueue, &wait);
  286. return retval;
  287. }
  288. static unsigned int hpet_poll(struct file *file, poll_table * wait)
  289. {
  290. unsigned long v;
  291. struct hpet_dev *devp;
  292. devp = file->private_data;
  293. if (!devp->hd_ireqfreq)
  294. return 0;
  295. poll_wait(file, &devp->hd_waitqueue, wait);
  296. spin_lock_irq(&hpet_lock);
  297. v = devp->hd_irqdata;
  298. spin_unlock_irq(&hpet_lock);
  299. if (v != 0)
  300. return POLLIN | POLLRDNORM;
  301. return 0;
  302. }
  303. #ifdef CONFIG_HPET_MMAP
  304. #ifdef CONFIG_HPET_MMAP_DEFAULT
  305. static int hpet_mmap_enabled = 1;
  306. #else
  307. static int hpet_mmap_enabled = 0;
  308. #endif
  309. static __init int hpet_mmap_enable(char *str)
  310. {
  311. get_option(&str, &hpet_mmap_enabled);
  312. pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
  313. return 1;
  314. }
  315. __setup("hpet_mmap=", hpet_mmap_enable);
  316. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  317. {
  318. struct hpet_dev *devp;
  319. unsigned long addr;
  320. if (!hpet_mmap_enabled)
  321. return -EACCES;
  322. devp = file->private_data;
  323. addr = devp->hd_hpets->hp_hpet_phys;
  324. if (addr & (PAGE_SIZE - 1))
  325. return -ENOSYS;
  326. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  327. return vm_iomap_memory(vma, addr, PAGE_SIZE);
  328. }
  329. #else
  330. static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
  331. {
  332. return -ENOSYS;
  333. }
  334. #endif
  335. static int hpet_fasync(int fd, struct file *file, int on)
  336. {
  337. struct hpet_dev *devp;
  338. devp = file->private_data;
  339. if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
  340. return 0;
  341. else
  342. return -EIO;
  343. }
  344. static int hpet_release(struct inode *inode, struct file *file)
  345. {
  346. struct hpet_dev *devp;
  347. struct hpet_timer __iomem *timer;
  348. int irq = 0;
  349. devp = file->private_data;
  350. timer = devp->hd_timer;
  351. spin_lock_irq(&hpet_lock);
  352. writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
  353. &timer->hpet_config);
  354. irq = devp->hd_irq;
  355. devp->hd_irq = 0;
  356. devp->hd_ireqfreq = 0;
  357. if (devp->hd_flags & HPET_PERIODIC
  358. && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  359. unsigned long v;
  360. v = readq(&timer->hpet_config);
  361. v ^= Tn_TYPE_CNF_MASK;
  362. writeq(v, &timer->hpet_config);
  363. }
  364. devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
  365. spin_unlock_irq(&hpet_lock);
  366. if (irq)
  367. free_irq(irq, devp);
  368. file->private_data = NULL;
  369. return 0;
  370. }
  371. static int hpet_ioctl_ieon(struct hpet_dev *devp)
  372. {
  373. struct hpet_timer __iomem *timer;
  374. struct hpet __iomem *hpet;
  375. struct hpets *hpetp;
  376. int irq;
  377. unsigned long g, v, t, m;
  378. unsigned long flags, isr;
  379. timer = devp->hd_timer;
  380. hpet = devp->hd_hpet;
  381. hpetp = devp->hd_hpets;
  382. if (!devp->hd_ireqfreq)
  383. return -EIO;
  384. spin_lock_irq(&hpet_lock);
  385. if (devp->hd_flags & HPET_IE) {
  386. spin_unlock_irq(&hpet_lock);
  387. return -EBUSY;
  388. }
  389. devp->hd_flags |= HPET_IE;
  390. if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
  391. devp->hd_flags |= HPET_SHARED_IRQ;
  392. spin_unlock_irq(&hpet_lock);
  393. irq = devp->hd_hdwirq;
  394. if (irq) {
  395. unsigned long irq_flags;
  396. if (devp->hd_flags & HPET_SHARED_IRQ) {
  397. /*
  398. * To prevent the interrupt handler from seeing an
  399. * unwanted interrupt status bit, program the timer
  400. * so that it will not fire in the near future ...
  401. */
  402. writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
  403. &timer->hpet_config);
  404. write_counter(read_counter(&hpet->hpet_mc),
  405. &timer->hpet_compare);
  406. /* ... and clear any left-over status. */
  407. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  408. writel(isr, &hpet->hpet_isr);
  409. }
  410. sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
  411. irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
  412. if (request_irq(irq, hpet_interrupt, irq_flags,
  413. devp->hd_name, (void *)devp)) {
  414. printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
  415. irq = 0;
  416. }
  417. }
  418. if (irq == 0) {
  419. spin_lock_irq(&hpet_lock);
  420. devp->hd_flags ^= HPET_IE;
  421. spin_unlock_irq(&hpet_lock);
  422. return -EIO;
  423. }
  424. devp->hd_irq = irq;
  425. t = devp->hd_ireqfreq;
  426. v = readq(&timer->hpet_config);
  427. /* 64-bit comparators are not yet supported through the ioctls,
  428. * so force this into 32-bit mode if it supports both modes
  429. */
  430. g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
  431. if (devp->hd_flags & HPET_PERIODIC) {
  432. g |= Tn_TYPE_CNF_MASK;
  433. v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
  434. writeq(v, &timer->hpet_config);
  435. local_irq_save(flags);
  436. /*
  437. * NOTE: First we modify the hidden accumulator
  438. * register supported by periodic-capable comparators.
  439. * We never want to modify the (single) counter; that
  440. * would affect all the comparators. The value written
  441. * is the counter value when the first interrupt is due.
  442. */
  443. m = read_counter(&hpet->hpet_mc);
  444. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  445. /*
  446. * Then we modify the comparator, indicating the period
  447. * for subsequent interrupt.
  448. */
  449. write_counter(t, &timer->hpet_compare);
  450. } else {
  451. local_irq_save(flags);
  452. m = read_counter(&hpet->hpet_mc);
  453. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  454. }
  455. if (devp->hd_flags & HPET_SHARED_IRQ) {
  456. isr = 1 << (devp - devp->hd_hpets->hp_dev);
  457. writel(isr, &hpet->hpet_isr);
  458. }
  459. writeq(g, &timer->hpet_config);
  460. local_irq_restore(flags);
  461. return 0;
  462. }
  463. /* converts Hz to number of timer ticks */
  464. static inline unsigned long hpet_time_div(struct hpets *hpets,
  465. unsigned long dis)
  466. {
  467. unsigned long long m;
  468. m = hpets->hp_tick_freq + (dis >> 1);
  469. do_div(m, dis);
  470. return (unsigned long)m;
  471. }
  472. static int
  473. hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg,
  474. struct hpet_info *info)
  475. {
  476. struct hpet_timer __iomem *timer;
  477. struct hpet __iomem *hpet;
  478. struct hpets *hpetp;
  479. int err;
  480. unsigned long v;
  481. switch (cmd) {
  482. case HPET_IE_OFF:
  483. case HPET_INFO:
  484. case HPET_EPI:
  485. case HPET_DPI:
  486. case HPET_IRQFREQ:
  487. timer = devp->hd_timer;
  488. hpet = devp->hd_hpet;
  489. hpetp = devp->hd_hpets;
  490. break;
  491. case HPET_IE_ON:
  492. return hpet_ioctl_ieon(devp);
  493. default:
  494. return -EINVAL;
  495. }
  496. err = 0;
  497. switch (cmd) {
  498. case HPET_IE_OFF:
  499. if ((devp->hd_flags & HPET_IE) == 0)
  500. break;
  501. v = readq(&timer->hpet_config);
  502. v &= ~Tn_INT_ENB_CNF_MASK;
  503. writeq(v, &timer->hpet_config);
  504. if (devp->hd_irq) {
  505. free_irq(devp->hd_irq, devp);
  506. devp->hd_irq = 0;
  507. }
  508. devp->hd_flags ^= HPET_IE;
  509. break;
  510. case HPET_INFO:
  511. {
  512. memset(info, 0, sizeof(*info));
  513. if (devp->hd_ireqfreq)
  514. info->hi_ireqfreq =
  515. hpet_time_div(hpetp, devp->hd_ireqfreq);
  516. info->hi_flags =
  517. readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
  518. info->hi_hpet = hpetp->hp_which;
  519. info->hi_timer = devp - hpetp->hp_dev;
  520. break;
  521. }
  522. case HPET_EPI:
  523. v = readq(&timer->hpet_config);
  524. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  525. err = -ENXIO;
  526. break;
  527. }
  528. devp->hd_flags |= HPET_PERIODIC;
  529. break;
  530. case HPET_DPI:
  531. v = readq(&timer->hpet_config);
  532. if ((v & Tn_PER_INT_CAP_MASK) == 0) {
  533. err = -ENXIO;
  534. break;
  535. }
  536. if (devp->hd_flags & HPET_PERIODIC &&
  537. readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
  538. v = readq(&timer->hpet_config);
  539. v ^= Tn_TYPE_CNF_MASK;
  540. writeq(v, &timer->hpet_config);
  541. }
  542. devp->hd_flags &= ~HPET_PERIODIC;
  543. break;
  544. case HPET_IRQFREQ:
  545. if ((arg > hpet_max_freq) &&
  546. !capable(CAP_SYS_RESOURCE)) {
  547. err = -EACCES;
  548. break;
  549. }
  550. if (!arg) {
  551. err = -EINVAL;
  552. break;
  553. }
  554. devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
  555. }
  556. return err;
  557. }
  558. static long
  559. hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  560. {
  561. struct hpet_info info;
  562. int err;
  563. mutex_lock(&hpet_mutex);
  564. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  565. mutex_unlock(&hpet_mutex);
  566. if ((cmd == HPET_INFO) && !err &&
  567. (copy_to_user((void __user *)arg, &info, sizeof(info))))
  568. err = -EFAULT;
  569. return err;
  570. }
  571. #ifdef CONFIG_COMPAT
  572. struct compat_hpet_info {
  573. compat_ulong_t hi_ireqfreq; /* Hz */
  574. compat_ulong_t hi_flags; /* information */
  575. unsigned short hi_hpet;
  576. unsigned short hi_timer;
  577. };
  578. static long
  579. hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  580. {
  581. struct hpet_info info;
  582. int err;
  583. mutex_lock(&hpet_mutex);
  584. err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
  585. mutex_unlock(&hpet_mutex);
  586. if ((cmd == HPET_INFO) && !err) {
  587. struct compat_hpet_info __user *u = compat_ptr(arg);
  588. if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
  589. put_user(info.hi_flags, &u->hi_flags) ||
  590. put_user(info.hi_hpet, &u->hi_hpet) ||
  591. put_user(info.hi_timer, &u->hi_timer))
  592. err = -EFAULT;
  593. }
  594. return err;
  595. }
  596. #endif
  597. static const struct file_operations hpet_fops = {
  598. .owner = THIS_MODULE,
  599. .llseek = no_llseek,
  600. .read = hpet_read,
  601. .poll = hpet_poll,
  602. .unlocked_ioctl = hpet_ioctl,
  603. #ifdef CONFIG_COMPAT
  604. .compat_ioctl = hpet_compat_ioctl,
  605. #endif
  606. .open = hpet_open,
  607. .release = hpet_release,
  608. .fasync = hpet_fasync,
  609. .mmap = hpet_mmap,
  610. };
  611. static int hpet_is_known(struct hpet_data *hdp)
  612. {
  613. struct hpets *hpetp;
  614. for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
  615. if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
  616. return 1;
  617. return 0;
  618. }
  619. static struct ctl_table hpet_table[] = {
  620. {
  621. .procname = "max-user-freq",
  622. .data = &hpet_max_freq,
  623. .maxlen = sizeof(int),
  624. .mode = 0644,
  625. .proc_handler = proc_dointvec,
  626. },
  627. {}
  628. };
  629. static struct ctl_table hpet_root[] = {
  630. {
  631. .procname = "hpet",
  632. .maxlen = 0,
  633. .mode = 0555,
  634. .child = hpet_table,
  635. },
  636. {}
  637. };
  638. static struct ctl_table dev_root[] = {
  639. {
  640. .procname = "dev",
  641. .maxlen = 0,
  642. .mode = 0555,
  643. .child = hpet_root,
  644. },
  645. {}
  646. };
  647. static struct ctl_table_header *sysctl_header;
  648. /*
  649. * Adjustment for when arming the timer with
  650. * initial conditions. That is, main counter
  651. * ticks expired before interrupts are enabled.
  652. */
  653. #define TICK_CALIBRATE (1000UL)
  654. static unsigned long __hpet_calibrate(struct hpets *hpetp)
  655. {
  656. struct hpet_timer __iomem *timer = NULL;
  657. unsigned long t, m, count, i, flags, start;
  658. struct hpet_dev *devp;
  659. int j;
  660. struct hpet __iomem *hpet;
  661. for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
  662. if ((devp->hd_flags & HPET_OPEN) == 0) {
  663. timer = devp->hd_timer;
  664. break;
  665. }
  666. if (!timer)
  667. return 0;
  668. hpet = hpetp->hp_hpet;
  669. t = read_counter(&timer->hpet_compare);
  670. i = 0;
  671. count = hpet_time_div(hpetp, TICK_CALIBRATE);
  672. local_irq_save(flags);
  673. start = read_counter(&hpet->hpet_mc);
  674. do {
  675. m = read_counter(&hpet->hpet_mc);
  676. write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
  677. } while (i++, (m - start) < count);
  678. local_irq_restore(flags);
  679. return (m - start) / i;
  680. }
  681. static unsigned long hpet_calibrate(struct hpets *hpetp)
  682. {
  683. unsigned long ret = ~0UL;
  684. unsigned long tmp;
  685. /*
  686. * Try to calibrate until return value becomes stable small value.
  687. * If SMI interruption occurs in calibration loop, the return value
  688. * will be big. This avoids its impact.
  689. */
  690. for ( ; ; ) {
  691. tmp = __hpet_calibrate(hpetp);
  692. if (ret <= tmp)
  693. break;
  694. ret = tmp;
  695. }
  696. return ret;
  697. }
  698. int hpet_alloc(struct hpet_data *hdp)
  699. {
  700. u64 cap, mcfg;
  701. struct hpet_dev *devp;
  702. u32 i, ntimer;
  703. struct hpets *hpetp;
  704. size_t siz;
  705. struct hpet __iomem *hpet;
  706. static struct hpets *last;
  707. unsigned long period;
  708. unsigned long long temp;
  709. u32 remainder;
  710. /*
  711. * hpet_alloc can be called by platform dependent code.
  712. * If platform dependent code has allocated the hpet that
  713. * ACPI has also reported, then we catch it here.
  714. */
  715. if (hpet_is_known(hdp)) {
  716. printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
  717. __func__);
  718. return 0;
  719. }
  720. siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
  721. sizeof(struct hpet_dev));
  722. hpetp = kzalloc(siz, GFP_KERNEL);
  723. if (!hpetp)
  724. return -ENOMEM;
  725. hpetp->hp_which = hpet_nhpet++;
  726. hpetp->hp_hpet = hdp->hd_address;
  727. hpetp->hp_hpet_phys = hdp->hd_phys_address;
  728. hpetp->hp_ntimer = hdp->hd_nirqs;
  729. for (i = 0; i < hdp->hd_nirqs; i++)
  730. hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
  731. hpet = hpetp->hp_hpet;
  732. cap = readq(&hpet->hpet_cap);
  733. ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
  734. if (hpetp->hp_ntimer != ntimer) {
  735. printk(KERN_WARNING "hpet: number irqs doesn't agree"
  736. " with number of timers\n");
  737. kfree(hpetp);
  738. return -ENODEV;
  739. }
  740. if (last)
  741. last->hp_next = hpetp;
  742. else
  743. hpets = hpetp;
  744. last = hpetp;
  745. period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
  746. HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
  747. temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
  748. temp += period >> 1; /* round */
  749. do_div(temp, period);
  750. hpetp->hp_tick_freq = temp; /* ticks per second */
  751. printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
  752. hpetp->hp_which, hdp->hd_phys_address,
  753. hpetp->hp_ntimer > 1 ? "s" : "");
  754. for (i = 0; i < hpetp->hp_ntimer; i++)
  755. printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
  756. printk(KERN_CONT "\n");
  757. temp = hpetp->hp_tick_freq;
  758. remainder = do_div(temp, 1000000);
  759. printk(KERN_INFO
  760. "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
  761. hpetp->hp_which, hpetp->hp_ntimer,
  762. cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
  763. (unsigned) temp, remainder);
  764. mcfg = readq(&hpet->hpet_config);
  765. if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
  766. write_counter(0L, &hpet->hpet_mc);
  767. mcfg |= HPET_ENABLE_CNF_MASK;
  768. writeq(mcfg, &hpet->hpet_config);
  769. }
  770. for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
  771. struct hpet_timer __iomem *timer;
  772. timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
  773. devp->hd_hpets = hpetp;
  774. devp->hd_hpet = hpet;
  775. devp->hd_timer = timer;
  776. /*
  777. * If the timer was reserved by platform code,
  778. * then make timer unavailable for opens.
  779. */
  780. if (hdp->hd_state & (1 << i)) {
  781. devp->hd_flags = HPET_OPEN;
  782. continue;
  783. }
  784. init_waitqueue_head(&devp->hd_waitqueue);
  785. }
  786. hpetp->hp_delta = hpet_calibrate(hpetp);
  787. /* This clocksource driver currently only works on ia64 */
  788. #ifdef CONFIG_IA64
  789. if (!hpet_clocksource) {
  790. hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
  791. clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
  792. clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
  793. hpetp->hp_clocksource = &clocksource_hpet;
  794. hpet_clocksource = &clocksource_hpet;
  795. }
  796. #endif
  797. return 0;
  798. }
  799. static acpi_status hpet_resources(struct acpi_resource *res, void *data)
  800. {
  801. struct hpet_data *hdp;
  802. acpi_status status;
  803. struct acpi_resource_address64 addr;
  804. hdp = data;
  805. status = acpi_resource_to_address64(res, &addr);
  806. if (ACPI_SUCCESS(status)) {
  807. hdp->hd_phys_address = addr.address.minimum;
  808. hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
  809. if (hpet_is_known(hdp)) {
  810. iounmap(hdp->hd_address);
  811. return AE_ALREADY_EXISTS;
  812. }
  813. } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
  814. struct acpi_resource_fixed_memory32 *fixmem32;
  815. fixmem32 = &res->data.fixed_memory32;
  816. hdp->hd_phys_address = fixmem32->address;
  817. hdp->hd_address = ioremap(fixmem32->address,
  818. HPET_RANGE_SIZE);
  819. if (hpet_is_known(hdp)) {
  820. iounmap(hdp->hd_address);
  821. return AE_ALREADY_EXISTS;
  822. }
  823. } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
  824. struct acpi_resource_extended_irq *irqp;
  825. int i, irq;
  826. irqp = &res->data.extended_irq;
  827. for (i = 0; i < irqp->interrupt_count; i++) {
  828. if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
  829. break;
  830. irq = acpi_register_gsi(NULL, irqp->interrupts[i],
  831. irqp->triggering, irqp->polarity);
  832. if (irq < 0)
  833. return AE_ERROR;
  834. hdp->hd_irq[hdp->hd_nirqs] = irq;
  835. hdp->hd_nirqs++;
  836. }
  837. }
  838. return AE_OK;
  839. }
  840. static int hpet_acpi_add(struct acpi_device *device)
  841. {
  842. acpi_status result;
  843. struct hpet_data data;
  844. memset(&data, 0, sizeof(data));
  845. result =
  846. acpi_walk_resources(device->handle, METHOD_NAME__CRS,
  847. hpet_resources, &data);
  848. if (ACPI_FAILURE(result))
  849. return -ENODEV;
  850. if (!data.hd_address || !data.hd_nirqs) {
  851. if (data.hd_address)
  852. iounmap(data.hd_address);
  853. printk("%s: no address or irqs in _CRS\n", __func__);
  854. return -ENODEV;
  855. }
  856. return hpet_alloc(&data);
  857. }
  858. static const struct acpi_device_id hpet_device_ids[] = {
  859. {"PNP0103", 0},
  860. {"", 0},
  861. };
  862. static struct acpi_driver hpet_acpi_driver = {
  863. .name = "hpet",
  864. .ids = hpet_device_ids,
  865. .ops = {
  866. .add = hpet_acpi_add,
  867. },
  868. };
  869. static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
  870. static int __init hpet_init(void)
  871. {
  872. int result;
  873. result = misc_register(&hpet_misc);
  874. if (result < 0)
  875. return -ENODEV;
  876. sysctl_header = register_sysctl_table(dev_root);
  877. result = acpi_bus_register_driver(&hpet_acpi_driver);
  878. if (result < 0) {
  879. if (sysctl_header)
  880. unregister_sysctl_table(sysctl_header);
  881. misc_deregister(&hpet_misc);
  882. return result;
  883. }
  884. return 0;
  885. }
  886. device_initcall(hpet_init);
  887. /*
  888. MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
  889. MODULE_LICENSE("GPL");
  890. */