tpm_i2c_nuvoton.c 18 KB

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  1. /******************************************************************************
  2. * Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501,
  3. * based on the TCG TPM Interface Spec version 1.2.
  4. * Specifications at www.trustedcomputinggroup.org
  5. *
  6. * Copyright (C) 2011, Nuvoton Technology Corporation.
  7. * Dan Morav <dan.morav@nuvoton.com>
  8. * Copyright (C) 2013, Obsidian Research Corp.
  9. * Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
  10. *
  11. * This program is free software: you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation, either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program. If not, see http://www.gnu.org/licenses/>.
  23. *
  24. * Nuvoton contact information: APC.Support@nuvoton.com
  25. *****************************************************************************/
  26. #include <linux/init.h>
  27. #include <linux/module.h>
  28. #include <linux/moduleparam.h>
  29. #include <linux/slab.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/wait.h>
  32. #include <linux/i2c.h>
  33. #include "tpm.h"
  34. /* I2C interface offsets */
  35. #define TPM_STS 0x00
  36. #define TPM_BURST_COUNT 0x01
  37. #define TPM_DATA_FIFO_W 0x20
  38. #define TPM_DATA_FIFO_R 0x40
  39. #define TPM_VID_DID_RID 0x60
  40. /* TPM command header size */
  41. #define TPM_HEADER_SIZE 10
  42. #define TPM_RETRY 5
  43. /*
  44. * I2C bus device maximum buffer size w/o counting I2C address or command
  45. * i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
  46. */
  47. #define TPM_I2C_MAX_BUF_SIZE 32
  48. #define TPM_I2C_RETRY_COUNT 32
  49. #define TPM_I2C_BUS_DELAY 1 /* msec */
  50. #define TPM_I2C_RETRY_DELAY_SHORT 2 /* msec */
  51. #define TPM_I2C_RETRY_DELAY_LONG 10 /* msec */
  52. #define I2C_DRIVER_NAME "tpm_i2c_nuvoton"
  53. struct priv_data {
  54. unsigned int intrs;
  55. };
  56. static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
  57. u8 *data)
  58. {
  59. s32 status;
  60. status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
  61. dev_dbg(&client->dev,
  62. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  63. offset, size, (int)size, data, status);
  64. return status;
  65. }
  66. static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
  67. u8 *data)
  68. {
  69. s32 status;
  70. status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
  71. dev_dbg(&client->dev,
  72. "%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
  73. offset, size, (int)size, data, status);
  74. return status;
  75. }
  76. #define TPM_STS_VALID 0x80
  77. #define TPM_STS_COMMAND_READY 0x40
  78. #define TPM_STS_GO 0x20
  79. #define TPM_STS_DATA_AVAIL 0x10
  80. #define TPM_STS_EXPECT 0x08
  81. #define TPM_STS_RESPONSE_RETRY 0x02
  82. #define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
  83. #define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
  84. #define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
  85. /* read TPM_STS register */
  86. static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
  87. {
  88. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  89. s32 status;
  90. u8 data;
  91. status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
  92. if (status <= 0) {
  93. dev_err(&chip->dev, "%s() error return %d\n", __func__,
  94. status);
  95. data = TPM_STS_ERR_VAL;
  96. }
  97. return data;
  98. }
  99. /* write byte to TPM_STS register */
  100. static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
  101. {
  102. s32 status;
  103. int i;
  104. /* this causes the current command to be aborted */
  105. for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
  106. status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
  107. msleep(TPM_I2C_BUS_DELAY);
  108. }
  109. return status;
  110. }
  111. /* write commandReady to TPM_STS register */
  112. static void i2c_nuvoton_ready(struct tpm_chip *chip)
  113. {
  114. struct i2c_client *client = to_i2c_client(chip->dev.parent);
  115. s32 status;
  116. /* this causes the current command to be aborted */
  117. status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
  118. if (status < 0)
  119. dev_err(&chip->dev,
  120. "%s() fail to write TPM_STS.commandReady\n", __func__);
  121. }
  122. /* read burstCount field from TPM_STS register
  123. * return -1 on fail to read */
  124. static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
  125. struct tpm_chip *chip)
  126. {
  127. unsigned long stop = jiffies + chip->vendor.timeout_d;
  128. s32 status;
  129. int burst_count = -1;
  130. u8 data;
  131. /* wait for burstcount to be non-zero */
  132. do {
  133. /* in I2C burstCount is 1 byte */
  134. status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
  135. &data);
  136. if (status > 0 && data > 0) {
  137. burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
  138. break;
  139. }
  140. msleep(TPM_I2C_BUS_DELAY);
  141. } while (time_before(jiffies, stop));
  142. return burst_count;
  143. }
  144. /*
  145. * WPCT301/NPCT501 SINT# supports only dataAvail
  146. * any call to this function which is not waiting for dataAvail will
  147. * set queue to NULL to avoid waiting for interrupt
  148. */
  149. static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
  150. {
  151. u8 status = i2c_nuvoton_read_status(chip);
  152. return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
  153. }
  154. static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
  155. u32 timeout, wait_queue_head_t *queue)
  156. {
  157. if (chip->vendor.irq && queue) {
  158. s32 rc;
  159. struct priv_data *priv = chip->vendor.priv;
  160. unsigned int cur_intrs = priv->intrs;
  161. enable_irq(chip->vendor.irq);
  162. rc = wait_event_interruptible_timeout(*queue,
  163. cur_intrs != priv->intrs,
  164. timeout);
  165. if (rc > 0)
  166. return 0;
  167. /* At this point we know that the SINT pin is asserted, so we
  168. * do not need to do i2c_nuvoton_check_status */
  169. } else {
  170. unsigned long ten_msec, stop;
  171. bool status_valid;
  172. /* check current status */
  173. status_valid = i2c_nuvoton_check_status(chip, mask, value);
  174. if (status_valid)
  175. return 0;
  176. /* use polling to wait for the event */
  177. ten_msec = jiffies + msecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
  178. stop = jiffies + timeout;
  179. do {
  180. if (time_before(jiffies, ten_msec))
  181. msleep(TPM_I2C_RETRY_DELAY_SHORT);
  182. else
  183. msleep(TPM_I2C_RETRY_DELAY_LONG);
  184. status_valid = i2c_nuvoton_check_status(chip, mask,
  185. value);
  186. if (status_valid)
  187. return 0;
  188. } while (time_before(jiffies, stop));
  189. }
  190. dev_err(&chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
  191. value);
  192. return -ETIMEDOUT;
  193. }
  194. /* wait for dataAvail field to be set in the TPM_STS register */
  195. static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
  196. wait_queue_head_t *queue)
  197. {
  198. return i2c_nuvoton_wait_for_stat(chip,
  199. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  200. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  201. timeout, queue);
  202. }
  203. /* Read @count bytes into @buf from TPM_RD_FIFO register */
  204. static int i2c_nuvoton_recv_data(struct i2c_client *client,
  205. struct tpm_chip *chip, u8 *buf, size_t count)
  206. {
  207. s32 rc;
  208. int burst_count, bytes2read, size = 0;
  209. while (size < count &&
  210. i2c_nuvoton_wait_for_data_avail(chip,
  211. chip->vendor.timeout_c,
  212. &chip->vendor.read_queue) == 0) {
  213. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  214. if (burst_count < 0) {
  215. dev_err(&chip->dev,
  216. "%s() fail to read burstCount=%d\n", __func__,
  217. burst_count);
  218. return -EIO;
  219. }
  220. bytes2read = min_t(size_t, burst_count, count - size);
  221. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
  222. bytes2read, &buf[size]);
  223. if (rc < 0) {
  224. dev_err(&chip->dev,
  225. "%s() fail on i2c_nuvoton_read_buf()=%d\n",
  226. __func__, rc);
  227. return -EIO;
  228. }
  229. dev_dbg(&chip->dev, "%s(%d):", __func__, bytes2read);
  230. size += bytes2read;
  231. }
  232. return size;
  233. }
  234. /* Read TPM command results */
  235. static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  236. {
  237. struct device *dev = chip->dev.parent;
  238. struct i2c_client *client = to_i2c_client(dev);
  239. s32 rc;
  240. int status;
  241. int burst_count;
  242. int retries;
  243. int size = 0;
  244. u32 expected;
  245. if (count < TPM_HEADER_SIZE) {
  246. i2c_nuvoton_ready(chip); /* return to idle */
  247. dev_err(dev, "%s() count < header size\n", __func__);
  248. return -EIO;
  249. }
  250. for (retries = 0; retries < TPM_RETRY; retries++) {
  251. if (retries > 0) {
  252. /* if this is not the first trial, set responseRetry */
  253. i2c_nuvoton_write_status(client,
  254. TPM_STS_RESPONSE_RETRY);
  255. }
  256. /*
  257. * read first available (> 10 bytes), including:
  258. * tag, paramsize, and result
  259. */
  260. status = i2c_nuvoton_wait_for_data_avail(
  261. chip, chip->vendor.timeout_c, &chip->vendor.read_queue);
  262. if (status != 0) {
  263. dev_err(dev, "%s() timeout on dataAvail\n", __func__);
  264. size = -ETIMEDOUT;
  265. continue;
  266. }
  267. burst_count = i2c_nuvoton_get_burstcount(client, chip);
  268. if (burst_count < 0) {
  269. dev_err(dev, "%s() fail to get burstCount\n", __func__);
  270. size = -EIO;
  271. continue;
  272. }
  273. size = i2c_nuvoton_recv_data(client, chip, buf,
  274. burst_count);
  275. if (size < TPM_HEADER_SIZE) {
  276. dev_err(dev, "%s() fail to read header\n", __func__);
  277. size = -EIO;
  278. continue;
  279. }
  280. /*
  281. * convert number of expected bytes field from big endian 32 bit
  282. * to machine native
  283. */
  284. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  285. if (expected > count || expected < size) {
  286. dev_err(dev, "%s() expected > count\n", __func__);
  287. size = -EIO;
  288. continue;
  289. }
  290. rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
  291. expected - size);
  292. size += rc;
  293. if (rc < 0 || size < expected) {
  294. dev_err(dev, "%s() fail to read remainder of result\n",
  295. __func__);
  296. size = -EIO;
  297. continue;
  298. }
  299. if (i2c_nuvoton_wait_for_stat(
  300. chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
  301. TPM_STS_VALID, chip->vendor.timeout_c,
  302. NULL)) {
  303. dev_err(dev, "%s() error left over data\n", __func__);
  304. size = -ETIMEDOUT;
  305. continue;
  306. }
  307. break;
  308. }
  309. i2c_nuvoton_ready(chip);
  310. dev_dbg(&chip->dev, "%s() -> %d\n", __func__, size);
  311. return size;
  312. }
  313. /*
  314. * Send TPM command.
  315. *
  316. * If interrupts are used (signaled by an irq set in the vendor structure)
  317. * tpm.c can skip polling for the data to be available as the interrupt is
  318. * waited for here
  319. */
  320. static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
  321. {
  322. struct device *dev = chip->dev.parent;
  323. struct i2c_client *client = to_i2c_client(dev);
  324. u32 ordinal;
  325. size_t count = 0;
  326. int burst_count, bytes2write, retries, rc = -EIO;
  327. for (retries = 0; retries < TPM_RETRY; retries++) {
  328. i2c_nuvoton_ready(chip);
  329. if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
  330. TPM_STS_COMMAND_READY,
  331. chip->vendor.timeout_b, NULL)) {
  332. dev_err(dev, "%s() timeout on commandReady\n",
  333. __func__);
  334. rc = -EIO;
  335. continue;
  336. }
  337. rc = 0;
  338. while (count < len - 1) {
  339. burst_count = i2c_nuvoton_get_burstcount(client,
  340. chip);
  341. if (burst_count < 0) {
  342. dev_err(dev, "%s() fail get burstCount\n",
  343. __func__);
  344. rc = -EIO;
  345. break;
  346. }
  347. bytes2write = min_t(size_t, burst_count,
  348. len - 1 - count);
  349. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
  350. bytes2write, &buf[count]);
  351. if (rc < 0) {
  352. dev_err(dev, "%s() fail i2cWriteBuf\n",
  353. __func__);
  354. break;
  355. }
  356. dev_dbg(dev, "%s(%d):", __func__, bytes2write);
  357. count += bytes2write;
  358. rc = i2c_nuvoton_wait_for_stat(chip,
  359. TPM_STS_VALID |
  360. TPM_STS_EXPECT,
  361. TPM_STS_VALID |
  362. TPM_STS_EXPECT,
  363. chip->vendor.timeout_c,
  364. NULL);
  365. if (rc < 0) {
  366. dev_err(dev, "%s() timeout on Expect\n",
  367. __func__);
  368. rc = -ETIMEDOUT;
  369. break;
  370. }
  371. }
  372. if (rc < 0)
  373. continue;
  374. /* write last byte */
  375. rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
  376. &buf[count]);
  377. if (rc < 0) {
  378. dev_err(dev, "%s() fail to write last byte\n",
  379. __func__);
  380. rc = -EIO;
  381. continue;
  382. }
  383. dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
  384. rc = i2c_nuvoton_wait_for_stat(chip,
  385. TPM_STS_VALID | TPM_STS_EXPECT,
  386. TPM_STS_VALID,
  387. chip->vendor.timeout_c, NULL);
  388. if (rc) {
  389. dev_err(dev, "%s() timeout on Expect to clear\n",
  390. __func__);
  391. rc = -ETIMEDOUT;
  392. continue;
  393. }
  394. break;
  395. }
  396. if (rc < 0) {
  397. /* retries == TPM_RETRY */
  398. i2c_nuvoton_ready(chip);
  399. return rc;
  400. }
  401. /* execute the TPM command */
  402. rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
  403. if (rc < 0) {
  404. dev_err(dev, "%s() fail to write Go\n", __func__);
  405. i2c_nuvoton_ready(chip);
  406. return rc;
  407. }
  408. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  409. rc = i2c_nuvoton_wait_for_data_avail(chip,
  410. tpm_calc_ordinal_duration(chip,
  411. ordinal),
  412. &chip->vendor.read_queue);
  413. if (rc) {
  414. dev_err(dev, "%s() timeout command duration\n", __func__);
  415. i2c_nuvoton_ready(chip);
  416. return rc;
  417. }
  418. dev_dbg(dev, "%s() -> %zd\n", __func__, len);
  419. return len;
  420. }
  421. static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
  422. {
  423. return (status == TPM_STS_COMMAND_READY);
  424. }
  425. static const struct tpm_class_ops tpm_i2c = {
  426. .status = i2c_nuvoton_read_status,
  427. .recv = i2c_nuvoton_recv,
  428. .send = i2c_nuvoton_send,
  429. .cancel = i2c_nuvoton_ready,
  430. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  431. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  432. .req_canceled = i2c_nuvoton_req_canceled,
  433. };
  434. /* The only purpose for the handler is to signal to any waiting threads that
  435. * the interrupt is currently being asserted. The driver does not do any
  436. * processing triggered by interrupts, and the chip provides no way to mask at
  437. * the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
  438. * this means it cannot be shared. */
  439. static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
  440. {
  441. struct tpm_chip *chip = dev_id;
  442. struct priv_data *priv = chip->vendor.priv;
  443. priv->intrs++;
  444. wake_up(&chip->vendor.read_queue);
  445. disable_irq_nosync(chip->vendor.irq);
  446. return IRQ_HANDLED;
  447. }
  448. static int get_vid(struct i2c_client *client, u32 *res)
  449. {
  450. static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
  451. u32 temp;
  452. s32 rc;
  453. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
  454. return -ENODEV;
  455. rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
  456. if (rc < 0)
  457. return rc;
  458. /* check WPCT301 values - ignore RID */
  459. if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
  460. /*
  461. * f/w rev 2.81 has an issue where the VID_DID_RID is not
  462. * reporting the right value. so give it another chance at
  463. * offset 0x20 (FIFO_W).
  464. */
  465. rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
  466. (u8 *) (&temp));
  467. if (rc < 0)
  468. return rc;
  469. /* check WPCT301 values - ignore RID */
  470. if (memcmp(&temp, vid_did_rid_value,
  471. sizeof(vid_did_rid_value)))
  472. return -ENODEV;
  473. }
  474. *res = temp;
  475. return 0;
  476. }
  477. static int i2c_nuvoton_probe(struct i2c_client *client,
  478. const struct i2c_device_id *id)
  479. {
  480. int rc;
  481. struct tpm_chip *chip;
  482. struct device *dev = &client->dev;
  483. u32 vid = 0;
  484. rc = get_vid(client, &vid);
  485. if (rc)
  486. return rc;
  487. dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
  488. (u8) (vid >> 16), (u8) (vid >> 24));
  489. chip = tpmm_chip_alloc(dev, &tpm_i2c);
  490. if (IS_ERR(chip))
  491. return PTR_ERR(chip);
  492. chip->vendor.priv = devm_kzalloc(dev, sizeof(struct priv_data),
  493. GFP_KERNEL);
  494. if (!chip->vendor.priv)
  495. return -ENOMEM;
  496. init_waitqueue_head(&chip->vendor.read_queue);
  497. init_waitqueue_head(&chip->vendor.int_queue);
  498. /* Default timeouts */
  499. chip->vendor.timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  500. chip->vendor.timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
  501. chip->vendor.timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  502. chip->vendor.timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
  503. /*
  504. * I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
  505. * TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
  506. * The IRQ should be set in the i2c_board_info (which is done
  507. * automatically in of_i2c_register_devices, for device tree users */
  508. chip->vendor.irq = client->irq;
  509. if (chip->vendor.irq) {
  510. dev_dbg(dev, "%s() chip-vendor.irq\n", __func__);
  511. rc = devm_request_irq(dev, chip->vendor.irq,
  512. i2c_nuvoton_int_handler,
  513. IRQF_TRIGGER_LOW,
  514. chip->devname,
  515. chip);
  516. if (rc) {
  517. dev_err(dev, "%s() Unable to request irq: %d for use\n",
  518. __func__, chip->vendor.irq);
  519. chip->vendor.irq = 0;
  520. } else {
  521. /* Clear any pending interrupt */
  522. i2c_nuvoton_ready(chip);
  523. /* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
  524. rc = i2c_nuvoton_wait_for_stat(chip,
  525. TPM_STS_COMMAND_READY,
  526. TPM_STS_COMMAND_READY,
  527. chip->vendor.timeout_b,
  528. NULL);
  529. if (rc == 0) {
  530. /*
  531. * TIS is in ready state
  532. * write dummy byte to enter reception state
  533. * TPM_DATA_FIFO_W <- rc (0)
  534. */
  535. rc = i2c_nuvoton_write_buf(client,
  536. TPM_DATA_FIFO_W,
  537. 1, (u8 *) (&rc));
  538. if (rc < 0)
  539. return rc;
  540. /* TPM_STS <- 0x40 (commandReady) */
  541. i2c_nuvoton_ready(chip);
  542. } else {
  543. /*
  544. * timeout_b reached - command was
  545. * aborted. TIS should now be in idle state -
  546. * only TPM_STS_VALID should be set
  547. */
  548. if (i2c_nuvoton_read_status(chip) !=
  549. TPM_STS_VALID)
  550. return -EIO;
  551. }
  552. }
  553. }
  554. if (tpm_get_timeouts(chip))
  555. return -ENODEV;
  556. if (tpm_do_selftest(chip))
  557. return -ENODEV;
  558. return tpm_chip_register(chip);
  559. }
  560. static int i2c_nuvoton_remove(struct i2c_client *client)
  561. {
  562. struct device *dev = &(client->dev);
  563. struct tpm_chip *chip = dev_get_drvdata(dev);
  564. tpm_chip_unregister(chip);
  565. return 0;
  566. }
  567. static const struct i2c_device_id i2c_nuvoton_id[] = {
  568. {I2C_DRIVER_NAME, 0},
  569. {}
  570. };
  571. MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
  572. #ifdef CONFIG_OF
  573. static const struct of_device_id i2c_nuvoton_of_match[] = {
  574. {.compatible = "nuvoton,npct501"},
  575. {.compatible = "winbond,wpct301"},
  576. {},
  577. };
  578. MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
  579. #endif
  580. static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
  581. static struct i2c_driver i2c_nuvoton_driver = {
  582. .id_table = i2c_nuvoton_id,
  583. .probe = i2c_nuvoton_probe,
  584. .remove = i2c_nuvoton_remove,
  585. .driver = {
  586. .name = I2C_DRIVER_NAME,
  587. .pm = &i2c_nuvoton_pm_ops,
  588. .of_match_table = of_match_ptr(i2c_nuvoton_of_match),
  589. },
  590. };
  591. module_i2c_driver(i2c_nuvoton_driver);
  592. MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)");
  593. MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
  594. MODULE_LICENSE("GPL");