clk-gpio.c 8.5 KB

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  1. /*
  2. * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - http://www.ti.com
  3. *
  4. * Authors:
  5. * Jyri Sarha <jsarha@ti.com>
  6. * Sergej Sawazki <ce3a@gmx.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * Gpio controlled clock implementation
  13. */
  14. #include <linux/clk-provider.h>
  15. #include <linux/export.h>
  16. #include <linux/slab.h>
  17. #include <linux/gpio.h>
  18. #include <linux/gpio/consumer.h>
  19. #include <linux/of_gpio.h>
  20. #include <linux/err.h>
  21. #include <linux/device.h>
  22. /**
  23. * DOC: basic gpio gated clock which can be enabled and disabled
  24. * with gpio output
  25. * Traits of this clock:
  26. * prepare - clk_(un)prepare only ensures parent is (un)prepared
  27. * enable - clk_enable and clk_disable are functional & control gpio
  28. * rate - inherits rate from parent. No clk_set_rate support
  29. * parent - fixed parent. No clk_set_parent support
  30. */
  31. #define to_clk_gpio(_hw) container_of(_hw, struct clk_gpio, hw)
  32. static int clk_gpio_gate_enable(struct clk_hw *hw)
  33. {
  34. struct clk_gpio *clk = to_clk_gpio(hw);
  35. gpiod_set_value(clk->gpiod, 1);
  36. return 0;
  37. }
  38. static void clk_gpio_gate_disable(struct clk_hw *hw)
  39. {
  40. struct clk_gpio *clk = to_clk_gpio(hw);
  41. gpiod_set_value(clk->gpiod, 0);
  42. }
  43. static int clk_gpio_gate_is_enabled(struct clk_hw *hw)
  44. {
  45. struct clk_gpio *clk = to_clk_gpio(hw);
  46. return gpiod_get_value(clk->gpiod);
  47. }
  48. const struct clk_ops clk_gpio_gate_ops = {
  49. .enable = clk_gpio_gate_enable,
  50. .disable = clk_gpio_gate_disable,
  51. .is_enabled = clk_gpio_gate_is_enabled,
  52. };
  53. EXPORT_SYMBOL_GPL(clk_gpio_gate_ops);
  54. /**
  55. * DOC: basic clock multiplexer which can be controlled with a gpio output
  56. * Traits of this clock:
  57. * prepare - clk_prepare only ensures that parents are prepared
  58. * rate - rate is only affected by parent switching. No clk_set_rate support
  59. * parent - parent is adjustable through clk_set_parent
  60. */
  61. static u8 clk_gpio_mux_get_parent(struct clk_hw *hw)
  62. {
  63. struct clk_gpio *clk = to_clk_gpio(hw);
  64. return gpiod_get_value(clk->gpiod);
  65. }
  66. static int clk_gpio_mux_set_parent(struct clk_hw *hw, u8 index)
  67. {
  68. struct clk_gpio *clk = to_clk_gpio(hw);
  69. gpiod_set_value(clk->gpiod, index);
  70. return 0;
  71. }
  72. const struct clk_ops clk_gpio_mux_ops = {
  73. .get_parent = clk_gpio_mux_get_parent,
  74. .set_parent = clk_gpio_mux_set_parent,
  75. .determine_rate = __clk_mux_determine_rate,
  76. };
  77. EXPORT_SYMBOL_GPL(clk_gpio_mux_ops);
  78. static struct clk *clk_register_gpio(struct device *dev, const char *name,
  79. const char * const *parent_names, u8 num_parents, unsigned gpio,
  80. bool active_low, unsigned long flags,
  81. const struct clk_ops *clk_gpio_ops)
  82. {
  83. struct clk_gpio *clk_gpio;
  84. struct clk *clk;
  85. struct clk_init_data init = {};
  86. unsigned long gpio_flags;
  87. int err;
  88. if (dev)
  89. clk_gpio = devm_kzalloc(dev, sizeof(*clk_gpio), GFP_KERNEL);
  90. else
  91. clk_gpio = kzalloc(sizeof(*clk_gpio), GFP_KERNEL);
  92. if (!clk_gpio)
  93. return ERR_PTR(-ENOMEM);
  94. if (active_low)
  95. gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_HIGH;
  96. else
  97. gpio_flags = GPIOF_OUT_INIT_LOW;
  98. if (dev)
  99. err = devm_gpio_request_one(dev, gpio, gpio_flags, name);
  100. else
  101. err = gpio_request_one(gpio, gpio_flags, name);
  102. if (err) {
  103. if (err != -EPROBE_DEFER)
  104. pr_err("%s: %s: Error requesting clock control gpio %u\n",
  105. __func__, name, gpio);
  106. if (!dev)
  107. kfree(clk_gpio);
  108. return ERR_PTR(err);
  109. }
  110. init.name = name;
  111. init.ops = clk_gpio_ops;
  112. init.flags = flags | CLK_IS_BASIC;
  113. init.parent_names = parent_names;
  114. init.num_parents = num_parents;
  115. clk_gpio->gpiod = gpio_to_desc(gpio);
  116. clk_gpio->hw.init = &init;
  117. if (dev)
  118. clk = devm_clk_register(dev, &clk_gpio->hw);
  119. else
  120. clk = clk_register(NULL, &clk_gpio->hw);
  121. if (!IS_ERR(clk))
  122. return clk;
  123. if (!dev) {
  124. gpiod_put(clk_gpio->gpiod);
  125. kfree(clk_gpio);
  126. }
  127. return clk;
  128. }
  129. /**
  130. * clk_register_gpio_gate - register a gpio clock gate with the clock framework
  131. * @dev: device that is registering this clock
  132. * @name: name of this clock
  133. * @parent_name: name of this clock's parent
  134. * @gpio: gpio number to gate this clock
  135. * @active_low: true if gpio should be set to 0 to enable clock
  136. * @flags: clock flags
  137. */
  138. struct clk *clk_register_gpio_gate(struct device *dev, const char *name,
  139. const char *parent_name, unsigned gpio, bool active_low,
  140. unsigned long flags)
  141. {
  142. return clk_register_gpio(dev, name,
  143. (parent_name ? &parent_name : NULL),
  144. (parent_name ? 1 : 0), gpio, active_low, flags,
  145. &clk_gpio_gate_ops);
  146. }
  147. EXPORT_SYMBOL_GPL(clk_register_gpio_gate);
  148. /**
  149. * clk_register_gpio_mux - register a gpio clock mux with the clock framework
  150. * @dev: device that is registering this clock
  151. * @name: name of this clock
  152. * @parent_names: names of this clock's parents
  153. * @num_parents: number of parents listed in @parent_names
  154. * @gpio: gpio number to gate this clock
  155. * @active_low: true if gpio should be set to 0 to enable clock
  156. * @flags: clock flags
  157. */
  158. struct clk *clk_register_gpio_mux(struct device *dev, const char *name,
  159. const char * const *parent_names, u8 num_parents, unsigned gpio,
  160. bool active_low, unsigned long flags)
  161. {
  162. if (num_parents != 2) {
  163. pr_err("mux-clock %s must have 2 parents\n", name);
  164. return ERR_PTR(-EINVAL);
  165. }
  166. return clk_register_gpio(dev, name, parent_names, num_parents,
  167. gpio, active_low, flags, &clk_gpio_mux_ops);
  168. }
  169. EXPORT_SYMBOL_GPL(clk_register_gpio_mux);
  170. #ifdef CONFIG_OF
  171. /**
  172. * clk_register_get() has to be delayed, because -EPROBE_DEFER
  173. * can not be handled properly at of_clk_init() call time.
  174. */
  175. struct clk_gpio_delayed_register_data {
  176. const char *gpio_name;
  177. int num_parents;
  178. const char **parent_names;
  179. struct device_node *node;
  180. struct mutex lock;
  181. struct clk *clk;
  182. struct clk *(*clk_register_get)(const char *name,
  183. const char * const *parent_names, u8 num_parents,
  184. unsigned gpio, bool active_low);
  185. };
  186. static struct clk *of_clk_gpio_delayed_register_get(
  187. struct of_phandle_args *clkspec, void *_data)
  188. {
  189. struct clk_gpio_delayed_register_data *data = _data;
  190. struct clk *clk;
  191. int gpio;
  192. enum of_gpio_flags of_flags;
  193. mutex_lock(&data->lock);
  194. if (data->clk) {
  195. mutex_unlock(&data->lock);
  196. return data->clk;
  197. }
  198. gpio = of_get_named_gpio_flags(data->node, data->gpio_name, 0,
  199. &of_flags);
  200. if (gpio < 0) {
  201. mutex_unlock(&data->lock);
  202. if (gpio == -EPROBE_DEFER)
  203. pr_debug("%s: %s: GPIOs not yet available, retry later\n",
  204. data->node->name, __func__);
  205. else
  206. pr_err("%s: %s: Can't get '%s' DT property\n",
  207. data->node->name, __func__,
  208. data->gpio_name);
  209. return ERR_PTR(gpio);
  210. }
  211. clk = data->clk_register_get(data->node->name, data->parent_names,
  212. data->num_parents, gpio, of_flags & OF_GPIO_ACTIVE_LOW);
  213. if (IS_ERR(clk))
  214. goto out;
  215. data->clk = clk;
  216. out:
  217. mutex_unlock(&data->lock);
  218. return clk;
  219. }
  220. static struct clk *of_clk_gpio_gate_delayed_register_get(const char *name,
  221. const char * const *parent_names, u8 num_parents,
  222. unsigned gpio, bool active_low)
  223. {
  224. return clk_register_gpio_gate(NULL, name, parent_names[0],
  225. gpio, active_low, 0);
  226. }
  227. static struct clk *of_clk_gpio_mux_delayed_register_get(const char *name,
  228. const char * const *parent_names, u8 num_parents, unsigned gpio,
  229. bool active_low)
  230. {
  231. return clk_register_gpio_mux(NULL, name, parent_names, num_parents,
  232. gpio, active_low, 0);
  233. }
  234. static void __init of_gpio_clk_setup(struct device_node *node,
  235. const char *gpio_name,
  236. struct clk *(*clk_register_get)(const char *name,
  237. const char * const *parent_names,
  238. u8 num_parents,
  239. unsigned gpio, bool active_low))
  240. {
  241. struct clk_gpio_delayed_register_data *data;
  242. const char **parent_names;
  243. int i, num_parents;
  244. data = kzalloc(sizeof(*data), GFP_KERNEL);
  245. if (!data)
  246. return;
  247. num_parents = of_clk_get_parent_count(node);
  248. parent_names = kcalloc(num_parents, sizeof(char *), GFP_KERNEL);
  249. if (!parent_names)
  250. return;
  251. for (i = 0; i < num_parents; i++)
  252. parent_names[i] = of_clk_get_parent_name(node, i);
  253. data->num_parents = num_parents;
  254. data->parent_names = parent_names;
  255. data->node = node;
  256. data->gpio_name = gpio_name;
  257. data->clk_register_get = clk_register_get;
  258. mutex_init(&data->lock);
  259. of_clk_add_provider(node, of_clk_gpio_delayed_register_get, data);
  260. }
  261. static void __init of_gpio_gate_clk_setup(struct device_node *node)
  262. {
  263. of_gpio_clk_setup(node, "enable-gpios",
  264. of_clk_gpio_gate_delayed_register_get);
  265. }
  266. CLK_OF_DECLARE(gpio_gate_clk, "gpio-gate-clock", of_gpio_gate_clk_setup);
  267. void __init of_gpio_mux_clk_setup(struct device_node *node)
  268. {
  269. of_gpio_clk_setup(node, "select-gpios",
  270. of_clk_gpio_mux_delayed_register_get);
  271. }
  272. CLK_OF_DECLARE(gpio_mux_clk, "gpio-mux-clock", of_gpio_mux_clk_setup);
  273. #endif