clk-moxart.c 2.4 KB

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  1. /*
  2. * MOXA ART SoCs clock driver.
  3. *
  4. * Copyright (C) 2013 Jonas Jensen
  5. *
  6. * Jonas Jensen <jonas.jensen@gmail.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/clk-provider.h>
  14. #include <linux/io.h>
  15. #include <linux/of_address.h>
  16. #include <linux/clkdev.h>
  17. static void __init moxart_of_pll_clk_init(struct device_node *node)
  18. {
  19. static void __iomem *base;
  20. struct clk *clk, *ref_clk;
  21. unsigned int mul;
  22. const char *name = node->name;
  23. const char *parent_name;
  24. of_property_read_string(node, "clock-output-names", &name);
  25. parent_name = of_clk_get_parent_name(node, 0);
  26. base = of_iomap(node, 0);
  27. if (!base) {
  28. pr_err("%s: of_iomap failed\n", node->full_name);
  29. return;
  30. }
  31. mul = readl(base + 0x30) >> 3 & 0x3f;
  32. iounmap(base);
  33. ref_clk = of_clk_get(node, 0);
  34. if (IS_ERR(ref_clk)) {
  35. pr_err("%s: of_clk_get failed\n", node->full_name);
  36. return;
  37. }
  38. clk = clk_register_fixed_factor(NULL, name, parent_name, 0, mul, 1);
  39. if (IS_ERR(clk)) {
  40. pr_err("%s: failed to register clock\n", node->full_name);
  41. return;
  42. }
  43. clk_register_clkdev(clk, NULL, name);
  44. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  45. }
  46. CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock",
  47. moxart_of_pll_clk_init);
  48. static void __init moxart_of_apb_clk_init(struct device_node *node)
  49. {
  50. static void __iomem *base;
  51. struct clk *clk, *pll_clk;
  52. unsigned int div, val;
  53. unsigned int div_idx[] = { 2, 3, 4, 6, 8};
  54. const char *name = node->name;
  55. const char *parent_name;
  56. of_property_read_string(node, "clock-output-names", &name);
  57. parent_name = of_clk_get_parent_name(node, 0);
  58. base = of_iomap(node, 0);
  59. if (!base) {
  60. pr_err("%s: of_iomap failed\n", node->full_name);
  61. return;
  62. }
  63. val = readl(base + 0xc) >> 4 & 0x7;
  64. iounmap(base);
  65. if (val > 4)
  66. val = 0;
  67. div = div_idx[val] * 2;
  68. pll_clk = of_clk_get(node, 0);
  69. if (IS_ERR(pll_clk)) {
  70. pr_err("%s: of_clk_get failed\n", node->full_name);
  71. return;
  72. }
  73. clk = clk_register_fixed_factor(NULL, name, parent_name, 0, 1, div);
  74. if (IS_ERR(clk)) {
  75. pr_err("%s: failed to register clock\n", node->full_name);
  76. return;
  77. }
  78. clk_register_clkdev(clk, NULL, name);
  79. of_clk_add_provider(node, of_clk_src_simple_get, clk);
  80. }
  81. CLK_OF_DECLARE(moxart_apb_clock, "moxa,moxart-apb-clock",
  82. moxart_of_apb_clk_init);