clk-prcmu.c 8.2 KB

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  1. /*
  2. * PRCMU clock implementation for ux500 platform.
  3. *
  4. * Copyright (C) 2012 ST-Ericsson SA
  5. * Author: Ulf Hansson <ulf.hansson@linaro.org>
  6. *
  7. * License terms: GNU General Public License (GPL) version 2
  8. */
  9. #include <linux/clk-provider.h>
  10. #include <linux/mfd/dbx500-prcmu.h>
  11. #include <linux/slab.h>
  12. #include <linux/io.h>
  13. #include <linux/err.h>
  14. #include "clk.h"
  15. #define to_clk_prcmu(_hw) container_of(_hw, struct clk_prcmu, hw)
  16. struct clk_prcmu {
  17. struct clk_hw hw;
  18. u8 cg_sel;
  19. int is_prepared;
  20. int is_enabled;
  21. int opp_requested;
  22. };
  23. /* PRCMU clock operations. */
  24. static int clk_prcmu_prepare(struct clk_hw *hw)
  25. {
  26. int ret;
  27. struct clk_prcmu *clk = to_clk_prcmu(hw);
  28. ret = prcmu_request_clock(clk->cg_sel, true);
  29. if (!ret)
  30. clk->is_prepared = 1;
  31. return ret;
  32. }
  33. static void clk_prcmu_unprepare(struct clk_hw *hw)
  34. {
  35. struct clk_prcmu *clk = to_clk_prcmu(hw);
  36. if (prcmu_request_clock(clk->cg_sel, false))
  37. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  38. clk_hw_get_name(hw));
  39. else
  40. clk->is_prepared = 0;
  41. }
  42. static int clk_prcmu_is_prepared(struct clk_hw *hw)
  43. {
  44. struct clk_prcmu *clk = to_clk_prcmu(hw);
  45. return clk->is_prepared;
  46. }
  47. static int clk_prcmu_enable(struct clk_hw *hw)
  48. {
  49. struct clk_prcmu *clk = to_clk_prcmu(hw);
  50. clk->is_enabled = 1;
  51. return 0;
  52. }
  53. static void clk_prcmu_disable(struct clk_hw *hw)
  54. {
  55. struct clk_prcmu *clk = to_clk_prcmu(hw);
  56. clk->is_enabled = 0;
  57. }
  58. static int clk_prcmu_is_enabled(struct clk_hw *hw)
  59. {
  60. struct clk_prcmu *clk = to_clk_prcmu(hw);
  61. return clk->is_enabled;
  62. }
  63. static unsigned long clk_prcmu_recalc_rate(struct clk_hw *hw,
  64. unsigned long parent_rate)
  65. {
  66. struct clk_prcmu *clk = to_clk_prcmu(hw);
  67. return prcmu_clock_rate(clk->cg_sel);
  68. }
  69. static long clk_prcmu_round_rate(struct clk_hw *hw, unsigned long rate,
  70. unsigned long *parent_rate)
  71. {
  72. struct clk_prcmu *clk = to_clk_prcmu(hw);
  73. return prcmu_round_clock_rate(clk->cg_sel, rate);
  74. }
  75. static int clk_prcmu_set_rate(struct clk_hw *hw, unsigned long rate,
  76. unsigned long parent_rate)
  77. {
  78. struct clk_prcmu *clk = to_clk_prcmu(hw);
  79. return prcmu_set_clock_rate(clk->cg_sel, rate);
  80. }
  81. static int clk_prcmu_opp_prepare(struct clk_hw *hw)
  82. {
  83. int err;
  84. struct clk_prcmu *clk = to_clk_prcmu(hw);
  85. if (!clk->opp_requested) {
  86. err = prcmu_qos_add_requirement(PRCMU_QOS_APE_OPP,
  87. (char *)clk_hw_get_name(hw),
  88. 100);
  89. if (err) {
  90. pr_err("clk_prcmu: %s fail req APE OPP for %s.\n",
  91. __func__, clk_hw_get_name(hw));
  92. return err;
  93. }
  94. clk->opp_requested = 1;
  95. }
  96. err = prcmu_request_clock(clk->cg_sel, true);
  97. if (err) {
  98. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  99. (char *)clk_hw_get_name(hw));
  100. clk->opp_requested = 0;
  101. return err;
  102. }
  103. clk->is_prepared = 1;
  104. return 0;
  105. }
  106. static void clk_prcmu_opp_unprepare(struct clk_hw *hw)
  107. {
  108. struct clk_prcmu *clk = to_clk_prcmu(hw);
  109. if (prcmu_request_clock(clk->cg_sel, false)) {
  110. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  111. clk_hw_get_name(hw));
  112. return;
  113. }
  114. if (clk->opp_requested) {
  115. prcmu_qos_remove_requirement(PRCMU_QOS_APE_OPP,
  116. (char *)clk_hw_get_name(hw));
  117. clk->opp_requested = 0;
  118. }
  119. clk->is_prepared = 0;
  120. }
  121. static int clk_prcmu_opp_volt_prepare(struct clk_hw *hw)
  122. {
  123. int err;
  124. struct clk_prcmu *clk = to_clk_prcmu(hw);
  125. if (!clk->opp_requested) {
  126. err = prcmu_request_ape_opp_100_voltage(true);
  127. if (err) {
  128. pr_err("clk_prcmu: %s fail req APE OPP VOLT for %s.\n",
  129. __func__, clk_hw_get_name(hw));
  130. return err;
  131. }
  132. clk->opp_requested = 1;
  133. }
  134. err = prcmu_request_clock(clk->cg_sel, true);
  135. if (err) {
  136. prcmu_request_ape_opp_100_voltage(false);
  137. clk->opp_requested = 0;
  138. return err;
  139. }
  140. clk->is_prepared = 1;
  141. return 0;
  142. }
  143. static void clk_prcmu_opp_volt_unprepare(struct clk_hw *hw)
  144. {
  145. struct clk_prcmu *clk = to_clk_prcmu(hw);
  146. if (prcmu_request_clock(clk->cg_sel, false)) {
  147. pr_err("clk_prcmu: %s failed to disable %s.\n", __func__,
  148. clk_hw_get_name(hw));
  149. return;
  150. }
  151. if (clk->opp_requested) {
  152. prcmu_request_ape_opp_100_voltage(false);
  153. clk->opp_requested = 0;
  154. }
  155. clk->is_prepared = 0;
  156. }
  157. static struct clk_ops clk_prcmu_scalable_ops = {
  158. .prepare = clk_prcmu_prepare,
  159. .unprepare = clk_prcmu_unprepare,
  160. .is_prepared = clk_prcmu_is_prepared,
  161. .enable = clk_prcmu_enable,
  162. .disable = clk_prcmu_disable,
  163. .is_enabled = clk_prcmu_is_enabled,
  164. .recalc_rate = clk_prcmu_recalc_rate,
  165. .round_rate = clk_prcmu_round_rate,
  166. .set_rate = clk_prcmu_set_rate,
  167. };
  168. static struct clk_ops clk_prcmu_gate_ops = {
  169. .prepare = clk_prcmu_prepare,
  170. .unprepare = clk_prcmu_unprepare,
  171. .is_prepared = clk_prcmu_is_prepared,
  172. .enable = clk_prcmu_enable,
  173. .disable = clk_prcmu_disable,
  174. .is_enabled = clk_prcmu_is_enabled,
  175. .recalc_rate = clk_prcmu_recalc_rate,
  176. };
  177. static struct clk_ops clk_prcmu_scalable_rate_ops = {
  178. .is_enabled = clk_prcmu_is_enabled,
  179. .recalc_rate = clk_prcmu_recalc_rate,
  180. .round_rate = clk_prcmu_round_rate,
  181. .set_rate = clk_prcmu_set_rate,
  182. };
  183. static struct clk_ops clk_prcmu_rate_ops = {
  184. .is_enabled = clk_prcmu_is_enabled,
  185. .recalc_rate = clk_prcmu_recalc_rate,
  186. };
  187. static struct clk_ops clk_prcmu_opp_gate_ops = {
  188. .prepare = clk_prcmu_opp_prepare,
  189. .unprepare = clk_prcmu_opp_unprepare,
  190. .is_prepared = clk_prcmu_is_prepared,
  191. .enable = clk_prcmu_enable,
  192. .disable = clk_prcmu_disable,
  193. .is_enabled = clk_prcmu_is_enabled,
  194. .recalc_rate = clk_prcmu_recalc_rate,
  195. };
  196. static struct clk_ops clk_prcmu_opp_volt_scalable_ops = {
  197. .prepare = clk_prcmu_opp_volt_prepare,
  198. .unprepare = clk_prcmu_opp_volt_unprepare,
  199. .is_prepared = clk_prcmu_is_prepared,
  200. .enable = clk_prcmu_enable,
  201. .disable = clk_prcmu_disable,
  202. .is_enabled = clk_prcmu_is_enabled,
  203. .recalc_rate = clk_prcmu_recalc_rate,
  204. .round_rate = clk_prcmu_round_rate,
  205. .set_rate = clk_prcmu_set_rate,
  206. };
  207. static struct clk *clk_reg_prcmu(const char *name,
  208. const char *parent_name,
  209. u8 cg_sel,
  210. unsigned long rate,
  211. unsigned long flags,
  212. struct clk_ops *clk_prcmu_ops)
  213. {
  214. struct clk_prcmu *clk;
  215. struct clk_init_data clk_prcmu_init;
  216. struct clk *clk_reg;
  217. if (!name) {
  218. pr_err("clk_prcmu: %s invalid arguments passed\n", __func__);
  219. return ERR_PTR(-EINVAL);
  220. }
  221. clk = kzalloc(sizeof(struct clk_prcmu), GFP_KERNEL);
  222. if (!clk) {
  223. pr_err("clk_prcmu: %s could not allocate clk\n", __func__);
  224. return ERR_PTR(-ENOMEM);
  225. }
  226. clk->cg_sel = cg_sel;
  227. clk->is_prepared = 1;
  228. clk->is_enabled = 1;
  229. clk->opp_requested = 0;
  230. /* "rate" can be used for changing the initial frequency */
  231. if (rate)
  232. prcmu_set_clock_rate(cg_sel, rate);
  233. clk_prcmu_init.name = name;
  234. clk_prcmu_init.ops = clk_prcmu_ops;
  235. clk_prcmu_init.flags = flags;
  236. clk_prcmu_init.parent_names = (parent_name ? &parent_name : NULL);
  237. clk_prcmu_init.num_parents = (parent_name ? 1 : 0);
  238. clk->hw.init = &clk_prcmu_init;
  239. clk_reg = clk_register(NULL, &clk->hw);
  240. if (IS_ERR_OR_NULL(clk_reg))
  241. goto free_clk;
  242. return clk_reg;
  243. free_clk:
  244. kfree(clk);
  245. pr_err("clk_prcmu: %s failed to register clk\n", __func__);
  246. return ERR_PTR(-ENOMEM);
  247. }
  248. struct clk *clk_reg_prcmu_scalable(const char *name,
  249. const char *parent_name,
  250. u8 cg_sel,
  251. unsigned long rate,
  252. unsigned long flags)
  253. {
  254. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  255. &clk_prcmu_scalable_ops);
  256. }
  257. struct clk *clk_reg_prcmu_gate(const char *name,
  258. const char *parent_name,
  259. u8 cg_sel,
  260. unsigned long flags)
  261. {
  262. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  263. &clk_prcmu_gate_ops);
  264. }
  265. struct clk *clk_reg_prcmu_scalable_rate(const char *name,
  266. const char *parent_name,
  267. u8 cg_sel,
  268. unsigned long rate,
  269. unsigned long flags)
  270. {
  271. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  272. &clk_prcmu_scalable_rate_ops);
  273. }
  274. struct clk *clk_reg_prcmu_rate(const char *name,
  275. const char *parent_name,
  276. u8 cg_sel,
  277. unsigned long flags)
  278. {
  279. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  280. &clk_prcmu_rate_ops);
  281. }
  282. struct clk *clk_reg_prcmu_opp_gate(const char *name,
  283. const char *parent_name,
  284. u8 cg_sel,
  285. unsigned long flags)
  286. {
  287. return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags,
  288. &clk_prcmu_opp_gate_ops);
  289. }
  290. struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
  291. const char *parent_name,
  292. u8 cg_sel,
  293. unsigned long rate,
  294. unsigned long flags)
  295. {
  296. return clk_reg_prcmu(name, parent_name, cg_sel, rate, flags,
  297. &clk_prcmu_opp_volt_scalable_ops);
  298. }