clk.h 2.3 KB

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  1. /*
  2. * Clocks for ux500 platforms
  3. *
  4. * Copyright (C) 2012 ST-Ericsson SA
  5. * Author: Ulf Hansson <ulf.hansson@linaro.org>
  6. *
  7. * License terms: GNU General Public License (GPL) version 2
  8. */
  9. #ifndef __UX500_CLK_H
  10. #define __UX500_CLK_H
  11. #include <linux/device.h>
  12. #include <linux/types.h>
  13. struct clk;
  14. struct clk *clk_reg_prcc_pclk(const char *name,
  15. const char *parent_name,
  16. resource_size_t phy_base,
  17. u32 cg_sel,
  18. unsigned long flags);
  19. struct clk *clk_reg_prcc_kclk(const char *name,
  20. const char *parent_name,
  21. resource_size_t phy_base,
  22. u32 cg_sel,
  23. unsigned long flags);
  24. struct clk *clk_reg_prcmu_scalable(const char *name,
  25. const char *parent_name,
  26. u8 cg_sel,
  27. unsigned long rate,
  28. unsigned long flags);
  29. struct clk *clk_reg_prcmu_gate(const char *name,
  30. const char *parent_name,
  31. u8 cg_sel,
  32. unsigned long flags);
  33. struct clk *clk_reg_prcmu_scalable_rate(const char *name,
  34. const char *parent_name,
  35. u8 cg_sel,
  36. unsigned long rate,
  37. unsigned long flags);
  38. struct clk *clk_reg_prcmu_rate(const char *name,
  39. const char *parent_name,
  40. u8 cg_sel,
  41. unsigned long flags);
  42. struct clk *clk_reg_prcmu_opp_gate(const char *name,
  43. const char *parent_name,
  44. u8 cg_sel,
  45. unsigned long flags);
  46. struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name,
  47. const char *parent_name,
  48. u8 cg_sel,
  49. unsigned long rate,
  50. unsigned long flags);
  51. struct clk *clk_reg_sysctrl_gate(struct device *dev,
  52. const char *name,
  53. const char *parent_name,
  54. u16 reg_sel,
  55. u8 reg_mask,
  56. u8 reg_bits,
  57. unsigned long enable_delay_us,
  58. unsigned long flags);
  59. struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev,
  60. const char *name,
  61. const char *parent_name,
  62. u16 reg_sel,
  63. u8 reg_mask,
  64. u8 reg_bits,
  65. unsigned long rate,
  66. unsigned long enable_delay_us,
  67. unsigned long flags);
  68. struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
  69. const char *name,
  70. const char **parent_names,
  71. u8 num_parents,
  72. u16 *reg_sel,
  73. u8 *reg_mask,
  74. u8 *reg_bits,
  75. unsigned long flags);
  76. #endif /* __UX500_CLK_H */