acpi-cpufreq.c 24 KB

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  1. /*
  2. * acpi-cpufreq.c - ACPI Processor P-States Driver
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
  8. *
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. *
  25. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpufreq.h>
  33. #include <linux/compiler.h>
  34. #include <linux/dmi.h>
  35. #include <linux/slab.h>
  36. #include <linux/acpi.h>
  37. #include <linux/io.h>
  38. #include <linux/delay.h>
  39. #include <linux/uaccess.h>
  40. #include <acpi/processor.h>
  41. #include <asm/msr.h>
  42. #include <asm/processor.h>
  43. #include <asm/cpufeature.h>
  44. MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  45. MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  46. MODULE_LICENSE("GPL");
  47. #define PFX "acpi-cpufreq: "
  48. enum {
  49. UNDEFINED_CAPABLE = 0,
  50. SYSTEM_INTEL_MSR_CAPABLE,
  51. SYSTEM_AMD_MSR_CAPABLE,
  52. SYSTEM_IO_CAPABLE,
  53. };
  54. #define INTEL_MSR_RANGE (0xffff)
  55. #define AMD_MSR_RANGE (0x7)
  56. #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
  57. struct acpi_cpufreq_data {
  58. struct cpufreq_frequency_table *freq_table;
  59. unsigned int resume;
  60. unsigned int cpu_feature;
  61. unsigned int acpi_perf_cpu;
  62. cpumask_var_t freqdomain_cpus;
  63. };
  64. /* acpi_perf_data is a pointer to percpu data. */
  65. static struct acpi_processor_performance __percpu *acpi_perf_data;
  66. static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
  67. {
  68. return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
  69. }
  70. static struct cpufreq_driver acpi_cpufreq_driver;
  71. static unsigned int acpi_pstate_strict;
  72. static struct msr __percpu *msrs;
  73. static bool boost_state(unsigned int cpu)
  74. {
  75. u32 lo, hi;
  76. u64 msr;
  77. switch (boot_cpu_data.x86_vendor) {
  78. case X86_VENDOR_INTEL:
  79. rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
  80. msr = lo | ((u64)hi << 32);
  81. return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
  82. case X86_VENDOR_AMD:
  83. rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
  84. msr = lo | ((u64)hi << 32);
  85. return !(msr & MSR_K7_HWCR_CPB_DIS);
  86. }
  87. return false;
  88. }
  89. static void boost_set_msrs(bool enable, const struct cpumask *cpumask)
  90. {
  91. u32 cpu;
  92. u32 msr_addr;
  93. u64 msr_mask;
  94. switch (boot_cpu_data.x86_vendor) {
  95. case X86_VENDOR_INTEL:
  96. msr_addr = MSR_IA32_MISC_ENABLE;
  97. msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
  98. break;
  99. case X86_VENDOR_AMD:
  100. msr_addr = MSR_K7_HWCR;
  101. msr_mask = MSR_K7_HWCR_CPB_DIS;
  102. break;
  103. default:
  104. return;
  105. }
  106. rdmsr_on_cpus(cpumask, msr_addr, msrs);
  107. for_each_cpu(cpu, cpumask) {
  108. struct msr *reg = per_cpu_ptr(msrs, cpu);
  109. if (enable)
  110. reg->q &= ~msr_mask;
  111. else
  112. reg->q |= msr_mask;
  113. }
  114. wrmsr_on_cpus(cpumask, msr_addr, msrs);
  115. }
  116. static int _store_boost(int val)
  117. {
  118. get_online_cpus();
  119. boost_set_msrs(val, cpu_online_mask);
  120. put_online_cpus();
  121. pr_debug("Core Boosting %sabled.\n", val ? "en" : "dis");
  122. return 0;
  123. }
  124. static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
  125. {
  126. struct acpi_cpufreq_data *data = policy->driver_data;
  127. if (unlikely(!data))
  128. return -ENODEV;
  129. return cpufreq_show_cpus(data->freqdomain_cpus, buf);
  130. }
  131. cpufreq_freq_attr_ro(freqdomain_cpus);
  132. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  133. static ssize_t store_boost(const char *buf, size_t count)
  134. {
  135. int ret;
  136. unsigned long val = 0;
  137. if (!acpi_cpufreq_driver.boost_supported)
  138. return -EINVAL;
  139. ret = kstrtoul(buf, 10, &val);
  140. if (ret || (val > 1))
  141. return -EINVAL;
  142. _store_boost((int) val);
  143. return count;
  144. }
  145. static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
  146. size_t count)
  147. {
  148. return store_boost(buf, count);
  149. }
  150. static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
  151. {
  152. return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
  153. }
  154. cpufreq_freq_attr_rw(cpb);
  155. #endif
  156. static int check_est_cpu(unsigned int cpuid)
  157. {
  158. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  159. return cpu_has(cpu, X86_FEATURE_EST);
  160. }
  161. static int check_amd_hwpstate_cpu(unsigned int cpuid)
  162. {
  163. struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
  164. return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
  165. }
  166. static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
  167. {
  168. struct acpi_processor_performance *perf;
  169. int i;
  170. perf = to_perf_data(data);
  171. for (i = 0; i < perf->state_count; i++) {
  172. if (value == perf->states[i].status)
  173. return data->freq_table[i].frequency;
  174. }
  175. return 0;
  176. }
  177. static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
  178. {
  179. struct cpufreq_frequency_table *pos;
  180. struct acpi_processor_performance *perf;
  181. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
  182. msr &= AMD_MSR_RANGE;
  183. else
  184. msr &= INTEL_MSR_RANGE;
  185. perf = to_perf_data(data);
  186. cpufreq_for_each_entry(pos, data->freq_table)
  187. if (msr == perf->states[pos->driver_data].status)
  188. return pos->frequency;
  189. return data->freq_table[0].frequency;
  190. }
  191. static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
  192. {
  193. switch (data->cpu_feature) {
  194. case SYSTEM_INTEL_MSR_CAPABLE:
  195. case SYSTEM_AMD_MSR_CAPABLE:
  196. return extract_msr(val, data);
  197. case SYSTEM_IO_CAPABLE:
  198. return extract_io(val, data);
  199. default:
  200. return 0;
  201. }
  202. }
  203. struct msr_addr {
  204. u32 reg;
  205. };
  206. struct io_addr {
  207. u16 port;
  208. u8 bit_width;
  209. };
  210. struct drv_cmd {
  211. unsigned int type;
  212. const struct cpumask *mask;
  213. union {
  214. struct msr_addr msr;
  215. struct io_addr io;
  216. } addr;
  217. u32 val;
  218. };
  219. /* Called via smp_call_function_single(), on the target CPU */
  220. static void do_drv_read(void *_cmd)
  221. {
  222. struct drv_cmd *cmd = _cmd;
  223. u32 h;
  224. switch (cmd->type) {
  225. case SYSTEM_INTEL_MSR_CAPABLE:
  226. case SYSTEM_AMD_MSR_CAPABLE:
  227. rdmsr(cmd->addr.msr.reg, cmd->val, h);
  228. break;
  229. case SYSTEM_IO_CAPABLE:
  230. acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
  231. &cmd->val,
  232. (u32)cmd->addr.io.bit_width);
  233. break;
  234. default:
  235. break;
  236. }
  237. }
  238. /* Called via smp_call_function_many(), on the target CPUs */
  239. static void do_drv_write(void *_cmd)
  240. {
  241. struct drv_cmd *cmd = _cmd;
  242. u32 lo, hi;
  243. switch (cmd->type) {
  244. case SYSTEM_INTEL_MSR_CAPABLE:
  245. rdmsr(cmd->addr.msr.reg, lo, hi);
  246. lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
  247. wrmsr(cmd->addr.msr.reg, lo, hi);
  248. break;
  249. case SYSTEM_AMD_MSR_CAPABLE:
  250. wrmsr(cmd->addr.msr.reg, cmd->val, 0);
  251. break;
  252. case SYSTEM_IO_CAPABLE:
  253. acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
  254. cmd->val,
  255. (u32)cmd->addr.io.bit_width);
  256. break;
  257. default:
  258. break;
  259. }
  260. }
  261. static void drv_read(struct drv_cmd *cmd)
  262. {
  263. int err;
  264. cmd->val = 0;
  265. err = smp_call_function_any(cmd->mask, do_drv_read, cmd, 1);
  266. WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
  267. }
  268. static void drv_write(struct drv_cmd *cmd)
  269. {
  270. int this_cpu;
  271. this_cpu = get_cpu();
  272. if (cpumask_test_cpu(this_cpu, cmd->mask))
  273. do_drv_write(cmd);
  274. smp_call_function_many(cmd->mask, do_drv_write, cmd, 1);
  275. put_cpu();
  276. }
  277. static u32
  278. get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
  279. {
  280. struct acpi_processor_performance *perf;
  281. struct drv_cmd cmd;
  282. if (unlikely(cpumask_empty(mask)))
  283. return 0;
  284. switch (data->cpu_feature) {
  285. case SYSTEM_INTEL_MSR_CAPABLE:
  286. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  287. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  288. break;
  289. case SYSTEM_AMD_MSR_CAPABLE:
  290. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  291. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  292. break;
  293. case SYSTEM_IO_CAPABLE:
  294. cmd.type = SYSTEM_IO_CAPABLE;
  295. perf = to_perf_data(data);
  296. cmd.addr.io.port = perf->control_register.address;
  297. cmd.addr.io.bit_width = perf->control_register.bit_width;
  298. break;
  299. default:
  300. return 0;
  301. }
  302. cmd.mask = mask;
  303. drv_read(&cmd);
  304. pr_debug("get_cur_val = %u\n", cmd.val);
  305. return cmd.val;
  306. }
  307. static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
  308. {
  309. struct acpi_cpufreq_data *data;
  310. struct cpufreq_policy *policy;
  311. unsigned int freq;
  312. unsigned int cached_freq;
  313. pr_debug("get_cur_freq_on_cpu (%d)\n", cpu);
  314. policy = cpufreq_cpu_get_raw(cpu);
  315. if (unlikely(!policy))
  316. return 0;
  317. data = policy->driver_data;
  318. if (unlikely(!data || !data->freq_table))
  319. return 0;
  320. cached_freq = data->freq_table[to_perf_data(data)->state].frequency;
  321. freq = extract_freq(get_cur_val(cpumask_of(cpu), data), data);
  322. if (freq != cached_freq) {
  323. /*
  324. * The dreaded BIOS frequency change behind our back.
  325. * Force set the frequency on next target call.
  326. */
  327. data->resume = 1;
  328. }
  329. pr_debug("cur freq = %u\n", freq);
  330. return freq;
  331. }
  332. static unsigned int check_freqs(const struct cpumask *mask, unsigned int freq,
  333. struct acpi_cpufreq_data *data)
  334. {
  335. unsigned int cur_freq;
  336. unsigned int i;
  337. for (i = 0; i < 100; i++) {
  338. cur_freq = extract_freq(get_cur_val(mask, data), data);
  339. if (cur_freq == freq)
  340. return 1;
  341. udelay(10);
  342. }
  343. return 0;
  344. }
  345. static int acpi_cpufreq_target(struct cpufreq_policy *policy,
  346. unsigned int index)
  347. {
  348. struct acpi_cpufreq_data *data = policy->driver_data;
  349. struct acpi_processor_performance *perf;
  350. struct drv_cmd cmd;
  351. unsigned int next_perf_state = 0; /* Index into perf table */
  352. int result = 0;
  353. if (unlikely(data == NULL || data->freq_table == NULL)) {
  354. return -ENODEV;
  355. }
  356. perf = to_perf_data(data);
  357. next_perf_state = data->freq_table[index].driver_data;
  358. if (perf->state == next_perf_state) {
  359. if (unlikely(data->resume)) {
  360. pr_debug("Called after resume, resetting to P%d\n",
  361. next_perf_state);
  362. data->resume = 0;
  363. } else {
  364. pr_debug("Already at target state (P%d)\n",
  365. next_perf_state);
  366. goto out;
  367. }
  368. }
  369. switch (data->cpu_feature) {
  370. case SYSTEM_INTEL_MSR_CAPABLE:
  371. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  372. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  373. cmd.val = (u32) perf->states[next_perf_state].control;
  374. break;
  375. case SYSTEM_AMD_MSR_CAPABLE:
  376. cmd.type = SYSTEM_AMD_MSR_CAPABLE;
  377. cmd.addr.msr.reg = MSR_AMD_PERF_CTL;
  378. cmd.val = (u32) perf->states[next_perf_state].control;
  379. break;
  380. case SYSTEM_IO_CAPABLE:
  381. cmd.type = SYSTEM_IO_CAPABLE;
  382. cmd.addr.io.port = perf->control_register.address;
  383. cmd.addr.io.bit_width = perf->control_register.bit_width;
  384. cmd.val = (u32) perf->states[next_perf_state].control;
  385. break;
  386. default:
  387. result = -ENODEV;
  388. goto out;
  389. }
  390. /* cpufreq holds the hotplug lock, so we are safe from here on */
  391. if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
  392. cmd.mask = policy->cpus;
  393. else
  394. cmd.mask = cpumask_of(policy->cpu);
  395. drv_write(&cmd);
  396. if (acpi_pstate_strict) {
  397. if (!check_freqs(cmd.mask, data->freq_table[index].frequency,
  398. data)) {
  399. pr_debug("acpi_cpufreq_target failed (%d)\n",
  400. policy->cpu);
  401. result = -EAGAIN;
  402. }
  403. }
  404. if (!result)
  405. perf->state = next_perf_state;
  406. out:
  407. return result;
  408. }
  409. static unsigned long
  410. acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  411. {
  412. struct acpi_processor_performance *perf;
  413. perf = to_perf_data(data);
  414. if (cpu_khz) {
  415. /* search the closest match to cpu_khz */
  416. unsigned int i;
  417. unsigned long freq;
  418. unsigned long freqn = perf->states[0].core_frequency * 1000;
  419. for (i = 0; i < (perf->state_count-1); i++) {
  420. freq = freqn;
  421. freqn = perf->states[i+1].core_frequency * 1000;
  422. if ((2 * cpu_khz) > (freqn + freq)) {
  423. perf->state = i;
  424. return freq;
  425. }
  426. }
  427. perf->state = perf->state_count-1;
  428. return freqn;
  429. } else {
  430. /* assume CPU is at P0... */
  431. perf->state = 0;
  432. return perf->states[0].core_frequency * 1000;
  433. }
  434. }
  435. static void free_acpi_perf_data(void)
  436. {
  437. unsigned int i;
  438. /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
  439. for_each_possible_cpu(i)
  440. free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
  441. ->shared_cpu_map);
  442. free_percpu(acpi_perf_data);
  443. }
  444. static int boost_notify(struct notifier_block *nb, unsigned long action,
  445. void *hcpu)
  446. {
  447. unsigned cpu = (long)hcpu;
  448. const struct cpumask *cpumask;
  449. cpumask = get_cpu_mask(cpu);
  450. /*
  451. * Clear the boost-disable bit on the CPU_DOWN path so that
  452. * this cpu cannot block the remaining ones from boosting. On
  453. * the CPU_UP path we simply keep the boost-disable flag in
  454. * sync with the current global state.
  455. */
  456. switch (action) {
  457. case CPU_UP_PREPARE:
  458. case CPU_UP_PREPARE_FROZEN:
  459. boost_set_msrs(acpi_cpufreq_driver.boost_enabled, cpumask);
  460. break;
  461. case CPU_DOWN_PREPARE:
  462. case CPU_DOWN_PREPARE_FROZEN:
  463. boost_set_msrs(1, cpumask);
  464. break;
  465. default:
  466. break;
  467. }
  468. return NOTIFY_OK;
  469. }
  470. static struct notifier_block boost_nb = {
  471. .notifier_call = boost_notify,
  472. };
  473. /*
  474. * acpi_cpufreq_early_init - initialize ACPI P-States library
  475. *
  476. * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
  477. * in order to determine correct frequency and voltage pairings. We can
  478. * do _PDC and _PSD and find out the processor dependency for the
  479. * actual init that will happen later...
  480. */
  481. static int __init acpi_cpufreq_early_init(void)
  482. {
  483. unsigned int i;
  484. pr_debug("acpi_cpufreq_early_init\n");
  485. acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
  486. if (!acpi_perf_data) {
  487. pr_debug("Memory allocation error for acpi_perf_data.\n");
  488. return -ENOMEM;
  489. }
  490. for_each_possible_cpu(i) {
  491. if (!zalloc_cpumask_var_node(
  492. &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
  493. GFP_KERNEL, cpu_to_node(i))) {
  494. /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
  495. free_acpi_perf_data();
  496. return -ENOMEM;
  497. }
  498. }
  499. /* Do initialization in ACPI core */
  500. acpi_processor_preregister_performance(acpi_perf_data);
  501. return 0;
  502. }
  503. #ifdef CONFIG_SMP
  504. /*
  505. * Some BIOSes do SW_ANY coordination internally, either set it up in hw
  506. * or do it in BIOS firmware and won't inform about it to OS. If not
  507. * detected, this has a side effect of making CPU run at a different speed
  508. * than OS intended it to run at. Detect it and handle it cleanly.
  509. */
  510. static int bios_with_sw_any_bug;
  511. static int sw_any_bug_found(const struct dmi_system_id *d)
  512. {
  513. bios_with_sw_any_bug = 1;
  514. return 0;
  515. }
  516. static const struct dmi_system_id sw_any_bug_dmi_table[] = {
  517. {
  518. .callback = sw_any_bug_found,
  519. .ident = "Supermicro Server X6DLP",
  520. .matches = {
  521. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  522. DMI_MATCH(DMI_BIOS_VERSION, "080010"),
  523. DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
  524. },
  525. },
  526. { }
  527. };
  528. static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
  529. {
  530. /* Intel Xeon Processor 7100 Series Specification Update
  531. * http://www.intel.com/Assets/PDF/specupdate/314554.pdf
  532. * AL30: A Machine Check Exception (MCE) Occurring during an
  533. * Enhanced Intel SpeedStep Technology Ratio Change May Cause
  534. * Both Processor Cores to Lock Up. */
  535. if (c->x86_vendor == X86_VENDOR_INTEL) {
  536. if ((c->x86 == 15) &&
  537. (c->x86_model == 6) &&
  538. (c->x86_mask == 8)) {
  539. printk(KERN_INFO "acpi-cpufreq: Intel(R) "
  540. "Xeon(R) 7100 Errata AL30, processors may "
  541. "lock up on frequency changes: disabling "
  542. "acpi-cpufreq.\n");
  543. return -ENODEV;
  544. }
  545. }
  546. return 0;
  547. }
  548. #endif
  549. static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
  550. {
  551. unsigned int i;
  552. unsigned int valid_states = 0;
  553. unsigned int cpu = policy->cpu;
  554. struct acpi_cpufreq_data *data;
  555. unsigned int result = 0;
  556. struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
  557. struct acpi_processor_performance *perf;
  558. #ifdef CONFIG_SMP
  559. static int blacklisted;
  560. #endif
  561. pr_debug("acpi_cpufreq_cpu_init\n");
  562. #ifdef CONFIG_SMP
  563. if (blacklisted)
  564. return blacklisted;
  565. blacklisted = acpi_cpufreq_blacklist(c);
  566. if (blacklisted)
  567. return blacklisted;
  568. #endif
  569. data = kzalloc(sizeof(*data), GFP_KERNEL);
  570. if (!data)
  571. return -ENOMEM;
  572. if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
  573. result = -ENOMEM;
  574. goto err_free;
  575. }
  576. perf = per_cpu_ptr(acpi_perf_data, cpu);
  577. data->acpi_perf_cpu = cpu;
  578. policy->driver_data = data;
  579. if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
  580. acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
  581. result = acpi_processor_register_performance(perf, cpu);
  582. if (result)
  583. goto err_free_mask;
  584. policy->shared_type = perf->shared_type;
  585. /*
  586. * Will let policy->cpus know about dependency only when software
  587. * coordination is required.
  588. */
  589. if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
  590. policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
  591. cpumask_copy(policy->cpus, perf->shared_cpu_map);
  592. }
  593. cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
  594. #ifdef CONFIG_SMP
  595. dmi_check_system(sw_any_bug_dmi_table);
  596. if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
  597. policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  598. cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
  599. }
  600. if (check_amd_hwpstate_cpu(cpu) && !acpi_pstate_strict) {
  601. cpumask_clear(policy->cpus);
  602. cpumask_set_cpu(cpu, policy->cpus);
  603. cpumask_copy(data->freqdomain_cpus,
  604. topology_sibling_cpumask(cpu));
  605. policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
  606. pr_info_once(PFX "overriding BIOS provided _PSD data\n");
  607. }
  608. #endif
  609. /* capability check */
  610. if (perf->state_count <= 1) {
  611. pr_debug("No P-States\n");
  612. result = -ENODEV;
  613. goto err_unreg;
  614. }
  615. if (perf->control_register.space_id != perf->status_register.space_id) {
  616. result = -ENODEV;
  617. goto err_unreg;
  618. }
  619. switch (perf->control_register.space_id) {
  620. case ACPI_ADR_SPACE_SYSTEM_IO:
  621. if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
  622. boot_cpu_data.x86 == 0xf) {
  623. pr_debug("AMD K8 systems must use native drivers.\n");
  624. result = -ENODEV;
  625. goto err_unreg;
  626. }
  627. pr_debug("SYSTEM IO addr space\n");
  628. data->cpu_feature = SYSTEM_IO_CAPABLE;
  629. break;
  630. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  631. pr_debug("HARDWARE addr space\n");
  632. if (check_est_cpu(cpu)) {
  633. data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
  634. break;
  635. }
  636. if (check_amd_hwpstate_cpu(cpu)) {
  637. data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
  638. break;
  639. }
  640. result = -ENODEV;
  641. goto err_unreg;
  642. default:
  643. pr_debug("Unknown addr space %d\n",
  644. (u32) (perf->control_register.space_id));
  645. result = -ENODEV;
  646. goto err_unreg;
  647. }
  648. data->freq_table = kzalloc(sizeof(*data->freq_table) *
  649. (perf->state_count+1), GFP_KERNEL);
  650. if (!data->freq_table) {
  651. result = -ENOMEM;
  652. goto err_unreg;
  653. }
  654. /* detect transition latency */
  655. policy->cpuinfo.transition_latency = 0;
  656. for (i = 0; i < perf->state_count; i++) {
  657. if ((perf->states[i].transition_latency * 1000) >
  658. policy->cpuinfo.transition_latency)
  659. policy->cpuinfo.transition_latency =
  660. perf->states[i].transition_latency * 1000;
  661. }
  662. /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
  663. if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
  664. policy->cpuinfo.transition_latency > 20 * 1000) {
  665. policy->cpuinfo.transition_latency = 20 * 1000;
  666. printk_once(KERN_INFO
  667. "P-state transition latency capped at 20 uS\n");
  668. }
  669. /* table init */
  670. for (i = 0; i < perf->state_count; i++) {
  671. if (i > 0 && perf->states[i].core_frequency >=
  672. data->freq_table[valid_states-1].frequency / 1000)
  673. continue;
  674. data->freq_table[valid_states].driver_data = i;
  675. data->freq_table[valid_states].frequency =
  676. perf->states[i].core_frequency * 1000;
  677. valid_states++;
  678. }
  679. data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
  680. perf->state = 0;
  681. result = cpufreq_table_validate_and_show(policy, data->freq_table);
  682. if (result)
  683. goto err_freqfree;
  684. if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
  685. printk(KERN_WARNING FW_WARN "P-state 0 is not max freq\n");
  686. switch (perf->control_register.space_id) {
  687. case ACPI_ADR_SPACE_SYSTEM_IO:
  688. /*
  689. * The core will not set policy->cur, because
  690. * cpufreq_driver->get is NULL, so we need to set it here.
  691. * However, we have to guess it, because the current speed is
  692. * unknown and not detectable via IO ports.
  693. */
  694. policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
  695. break;
  696. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  697. acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
  698. break;
  699. default:
  700. break;
  701. }
  702. /* notify BIOS that we exist */
  703. acpi_processor_notify_smm(THIS_MODULE);
  704. pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
  705. for (i = 0; i < perf->state_count; i++)
  706. pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
  707. (i == perf->state ? '*' : ' '), i,
  708. (u32) perf->states[i].core_frequency,
  709. (u32) perf->states[i].power,
  710. (u32) perf->states[i].transition_latency);
  711. /*
  712. * the first call to ->target() should result in us actually
  713. * writing something to the appropriate registers.
  714. */
  715. data->resume = 1;
  716. return result;
  717. err_freqfree:
  718. kfree(data->freq_table);
  719. err_unreg:
  720. acpi_processor_unregister_performance(cpu);
  721. err_free_mask:
  722. free_cpumask_var(data->freqdomain_cpus);
  723. err_free:
  724. kfree(data);
  725. policy->driver_data = NULL;
  726. return result;
  727. }
  728. static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  729. {
  730. struct acpi_cpufreq_data *data = policy->driver_data;
  731. pr_debug("acpi_cpufreq_cpu_exit\n");
  732. if (data) {
  733. policy->driver_data = NULL;
  734. acpi_processor_unregister_performance(data->acpi_perf_cpu);
  735. free_cpumask_var(data->freqdomain_cpus);
  736. kfree(data->freq_table);
  737. kfree(data);
  738. }
  739. return 0;
  740. }
  741. static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
  742. {
  743. struct acpi_cpufreq_data *data = policy->driver_data;
  744. pr_debug("acpi_cpufreq_resume\n");
  745. data->resume = 1;
  746. return 0;
  747. }
  748. static struct freq_attr *acpi_cpufreq_attr[] = {
  749. &cpufreq_freq_attr_scaling_available_freqs,
  750. &freqdomain_cpus,
  751. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  752. &cpb,
  753. #endif
  754. NULL,
  755. };
  756. static struct cpufreq_driver acpi_cpufreq_driver = {
  757. .verify = cpufreq_generic_frequency_table_verify,
  758. .target_index = acpi_cpufreq_target,
  759. .bios_limit = acpi_processor_get_bios_limit,
  760. .init = acpi_cpufreq_cpu_init,
  761. .exit = acpi_cpufreq_cpu_exit,
  762. .resume = acpi_cpufreq_resume,
  763. .name = "acpi-cpufreq",
  764. .attr = acpi_cpufreq_attr,
  765. .set_boost = _store_boost,
  766. };
  767. static void __init acpi_cpufreq_boost_init(void)
  768. {
  769. if (boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA)) {
  770. msrs = msrs_alloc();
  771. if (!msrs)
  772. return;
  773. acpi_cpufreq_driver.boost_supported = true;
  774. acpi_cpufreq_driver.boost_enabled = boost_state(0);
  775. cpu_notifier_register_begin();
  776. /* Force all MSRs to the same value */
  777. boost_set_msrs(acpi_cpufreq_driver.boost_enabled,
  778. cpu_online_mask);
  779. __register_cpu_notifier(&boost_nb);
  780. cpu_notifier_register_done();
  781. }
  782. }
  783. static void acpi_cpufreq_boost_exit(void)
  784. {
  785. if (msrs) {
  786. unregister_cpu_notifier(&boost_nb);
  787. msrs_free(msrs);
  788. msrs = NULL;
  789. }
  790. }
  791. static int __init acpi_cpufreq_init(void)
  792. {
  793. int ret;
  794. if (acpi_disabled)
  795. return -ENODEV;
  796. /* don't keep reloading if cpufreq_driver exists */
  797. if (cpufreq_get_current_driver())
  798. return -EEXIST;
  799. pr_debug("acpi_cpufreq_init\n");
  800. ret = acpi_cpufreq_early_init();
  801. if (ret)
  802. return ret;
  803. #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
  804. /* this is a sysfs file with a strange name and an even stranger
  805. * semantic - per CPU instantiation, but system global effect.
  806. * Lets enable it only on AMD CPUs for compatibility reasons and
  807. * only if configured. This is considered legacy code, which
  808. * will probably be removed at some point in the future.
  809. */
  810. if (!check_amd_hwpstate_cpu(0)) {
  811. struct freq_attr **attr;
  812. pr_debug("CPB unsupported, do not expose it\n");
  813. for (attr = acpi_cpufreq_attr; *attr; attr++)
  814. if (*attr == &cpb) {
  815. *attr = NULL;
  816. break;
  817. }
  818. }
  819. #endif
  820. acpi_cpufreq_boost_init();
  821. ret = cpufreq_register_driver(&acpi_cpufreq_driver);
  822. if (ret) {
  823. free_acpi_perf_data();
  824. acpi_cpufreq_boost_exit();
  825. }
  826. return ret;
  827. }
  828. static void __exit acpi_cpufreq_exit(void)
  829. {
  830. pr_debug("acpi_cpufreq_exit\n");
  831. acpi_cpufreq_boost_exit();
  832. cpufreq_unregister_driver(&acpi_cpufreq_driver);
  833. free_acpi_perf_data();
  834. }
  835. module_param(acpi_pstate_strict, uint, 0644);
  836. MODULE_PARM_DESC(acpi_pstate_strict,
  837. "value 0 or non-zero. non-zero -> strict ACPI checks are "
  838. "performed during frequency changes.");
  839. late_initcall(acpi_cpufreq_init);
  840. module_exit(acpi_cpufreq_exit);
  841. static const struct x86_cpu_id acpi_cpufreq_ids[] = {
  842. X86_FEATURE_MATCH(X86_FEATURE_ACPI),
  843. X86_FEATURE_MATCH(X86_FEATURE_HW_PSTATE),
  844. {}
  845. };
  846. MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
  847. static const struct acpi_device_id processor_device_ids[] = {
  848. {ACPI_PROCESSOR_OBJECT_HID, },
  849. {ACPI_PROCESSOR_DEVICE_HID, },
  850. {},
  851. };
  852. MODULE_DEVICE_TABLE(acpi, processor_device_ids);
  853. MODULE_ALIAS("acpi");