ti-dma-crossbar.c 10 KB

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  1. /*
  2. * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
  3. * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. */
  10. #include <linux/slab.h>
  11. #include <linux/err.h>
  12. #include <linux/init.h>
  13. #include <linux/list.h>
  14. #include <linux/io.h>
  15. #include <linux/idr.h>
  16. #include <linux/of_address.h>
  17. #include <linux/of_device.h>
  18. #include <linux/of_dma.h>
  19. #define TI_XBAR_DRA7 0
  20. #define TI_XBAR_AM335X 1
  21. static const struct of_device_id ti_dma_xbar_match[] = {
  22. {
  23. .compatible = "ti,dra7-dma-crossbar",
  24. .data = (void *)TI_XBAR_DRA7,
  25. },
  26. {
  27. .compatible = "ti,am335x-edma-crossbar",
  28. .data = (void *)TI_XBAR_AM335X,
  29. },
  30. {},
  31. };
  32. /* Crossbar on AM335x/AM437x family */
  33. #define TI_AM335X_XBAR_LINES 64
  34. struct ti_am335x_xbar_data {
  35. void __iomem *iomem;
  36. struct dma_router dmarouter;
  37. u32 xbar_events; /* maximum number of events to select in xbar */
  38. u32 dma_requests; /* number of DMA requests on eDMA */
  39. };
  40. struct ti_am335x_xbar_map {
  41. u16 dma_line;
  42. u8 mux_val;
  43. };
  44. static inline void ti_am335x_xbar_write(void __iomem *iomem, int event, u8 val)
  45. {
  46. /*
  47. * TPCC_EVT_MUX_60_63 register layout is different than the
  48. * rest, in the sense, that event 63 is mapped to lowest byte
  49. * and event 60 is mapped to highest, handle it separately.
  50. */
  51. if (event >= 60 && event <= 63)
  52. writeb_relaxed(val, iomem + (63 - event % 4));
  53. else
  54. writeb_relaxed(val, iomem + event);
  55. }
  56. static void ti_am335x_xbar_free(struct device *dev, void *route_data)
  57. {
  58. struct ti_am335x_xbar_data *xbar = dev_get_drvdata(dev);
  59. struct ti_am335x_xbar_map *map = route_data;
  60. dev_dbg(dev, "Unmapping XBAR event %u on channel %u\n",
  61. map->mux_val, map->dma_line);
  62. ti_am335x_xbar_write(xbar->iomem, map->dma_line, 0);
  63. kfree(map);
  64. }
  65. static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec,
  66. struct of_dma *ofdma)
  67. {
  68. struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
  69. struct ti_am335x_xbar_data *xbar = platform_get_drvdata(pdev);
  70. struct ti_am335x_xbar_map *map;
  71. if (dma_spec->args_count != 3)
  72. return ERR_PTR(-EINVAL);
  73. if (dma_spec->args[2] >= xbar->xbar_events) {
  74. dev_err(&pdev->dev, "Invalid XBAR event number: %d\n",
  75. dma_spec->args[2]);
  76. return ERR_PTR(-EINVAL);
  77. }
  78. if (dma_spec->args[0] >= xbar->dma_requests) {
  79. dev_err(&pdev->dev, "Invalid DMA request line number: %d\n",
  80. dma_spec->args[0]);
  81. return ERR_PTR(-EINVAL);
  82. }
  83. /* The of_node_put() will be done in the core for the node */
  84. dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
  85. if (!dma_spec->np) {
  86. dev_err(&pdev->dev, "Can't get DMA master\n");
  87. return ERR_PTR(-EINVAL);
  88. }
  89. map = kzalloc(sizeof(*map), GFP_KERNEL);
  90. if (!map) {
  91. of_node_put(dma_spec->np);
  92. return ERR_PTR(-ENOMEM);
  93. }
  94. map->dma_line = (u16)dma_spec->args[0];
  95. map->mux_val = (u8)dma_spec->args[2];
  96. dma_spec->args[2] = 0;
  97. dma_spec->args_count = 2;
  98. dev_dbg(&pdev->dev, "Mapping XBAR event%u to DMA%u\n",
  99. map->mux_val, map->dma_line);
  100. ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val);
  101. return map;
  102. }
  103. static const struct of_device_id ti_am335x_master_match[] = {
  104. { .compatible = "ti,edma3-tpcc", },
  105. {},
  106. };
  107. static int ti_am335x_xbar_probe(struct platform_device *pdev)
  108. {
  109. struct device_node *node = pdev->dev.of_node;
  110. const struct of_device_id *match;
  111. struct device_node *dma_node;
  112. struct ti_am335x_xbar_data *xbar;
  113. struct resource *res;
  114. void __iomem *iomem;
  115. int i, ret;
  116. if (!node)
  117. return -ENODEV;
  118. xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
  119. if (!xbar)
  120. return -ENOMEM;
  121. dma_node = of_parse_phandle(node, "dma-masters", 0);
  122. if (!dma_node) {
  123. dev_err(&pdev->dev, "Can't get DMA master node\n");
  124. return -ENODEV;
  125. }
  126. match = of_match_node(ti_am335x_master_match, dma_node);
  127. if (!match) {
  128. dev_err(&pdev->dev, "DMA master is not supported\n");
  129. of_node_put(dma_node);
  130. return -EINVAL;
  131. }
  132. if (of_property_read_u32(dma_node, "dma-requests",
  133. &xbar->dma_requests)) {
  134. dev_info(&pdev->dev,
  135. "Missing XBAR output information, using %u.\n",
  136. TI_AM335X_XBAR_LINES);
  137. xbar->dma_requests = TI_AM335X_XBAR_LINES;
  138. }
  139. of_node_put(dma_node);
  140. if (of_property_read_u32(node, "dma-requests", &xbar->xbar_events)) {
  141. dev_info(&pdev->dev,
  142. "Missing XBAR input information, using %u.\n",
  143. TI_AM335X_XBAR_LINES);
  144. xbar->xbar_events = TI_AM335X_XBAR_LINES;
  145. }
  146. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  147. iomem = devm_ioremap_resource(&pdev->dev, res);
  148. if (IS_ERR(iomem))
  149. return PTR_ERR(iomem);
  150. xbar->iomem = iomem;
  151. xbar->dmarouter.dev = &pdev->dev;
  152. xbar->dmarouter.route_free = ti_am335x_xbar_free;
  153. platform_set_drvdata(pdev, xbar);
  154. /* Reset the crossbar */
  155. for (i = 0; i < xbar->dma_requests; i++)
  156. ti_am335x_xbar_write(xbar->iomem, i, 0);
  157. ret = of_dma_router_register(node, ti_am335x_xbar_route_allocate,
  158. &xbar->dmarouter);
  159. return ret;
  160. }
  161. /* Crossbar on DRA7xx family */
  162. #define TI_DRA7_XBAR_OUTPUTS 127
  163. #define TI_DRA7_XBAR_INPUTS 256
  164. #define TI_XBAR_EDMA_OFFSET 0
  165. #define TI_XBAR_SDMA_OFFSET 1
  166. struct ti_dra7_xbar_data {
  167. void __iomem *iomem;
  168. struct dma_router dmarouter;
  169. struct idr map_idr;
  170. u16 safe_val; /* Value to rest the crossbar lines */
  171. u32 xbar_requests; /* number of DMA requests connected to XBAR */
  172. u32 dma_requests; /* number of DMA requests forwarded to DMA */
  173. u32 dma_offset;
  174. };
  175. struct ti_dra7_xbar_map {
  176. u16 xbar_in;
  177. int xbar_out;
  178. };
  179. static inline void ti_dra7_xbar_write(void __iomem *iomem, int xbar, u16 val)
  180. {
  181. writew_relaxed(val, iomem + (xbar * 2));
  182. }
  183. static void ti_dra7_xbar_free(struct device *dev, void *route_data)
  184. {
  185. struct ti_dra7_xbar_data *xbar = dev_get_drvdata(dev);
  186. struct ti_dra7_xbar_map *map = route_data;
  187. dev_dbg(dev, "Unmapping XBAR%u (was routed to %d)\n",
  188. map->xbar_in, map->xbar_out);
  189. ti_dra7_xbar_write(xbar->iomem, map->xbar_out, xbar->safe_val);
  190. idr_remove(&xbar->map_idr, map->xbar_out);
  191. kfree(map);
  192. }
  193. static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec,
  194. struct of_dma *ofdma)
  195. {
  196. struct platform_device *pdev = of_find_device_by_node(ofdma->of_node);
  197. struct ti_dra7_xbar_data *xbar = platform_get_drvdata(pdev);
  198. struct ti_dra7_xbar_map *map;
  199. if (dma_spec->args[0] >= xbar->xbar_requests) {
  200. dev_err(&pdev->dev, "Invalid XBAR request number: %d\n",
  201. dma_spec->args[0]);
  202. return ERR_PTR(-EINVAL);
  203. }
  204. /* The of_node_put() will be done in the core for the node */
  205. dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0);
  206. if (!dma_spec->np) {
  207. dev_err(&pdev->dev, "Can't get DMA master\n");
  208. return ERR_PTR(-EINVAL);
  209. }
  210. map = kzalloc(sizeof(*map), GFP_KERNEL);
  211. if (!map) {
  212. of_node_put(dma_spec->np);
  213. return ERR_PTR(-ENOMEM);
  214. }
  215. map->xbar_out = idr_alloc(&xbar->map_idr, NULL, 0, xbar->dma_requests,
  216. GFP_KERNEL);
  217. map->xbar_in = (u16)dma_spec->args[0];
  218. dma_spec->args[0] = map->xbar_out + xbar->dma_offset;
  219. dev_dbg(&pdev->dev, "Mapping XBAR%u to DMA%d\n",
  220. map->xbar_in, map->xbar_out);
  221. ti_dra7_xbar_write(xbar->iomem, map->xbar_out, map->xbar_in);
  222. return map;
  223. }
  224. static const struct of_device_id ti_dra7_master_match[] = {
  225. {
  226. .compatible = "ti,omap4430-sdma",
  227. .data = (void *)TI_XBAR_SDMA_OFFSET,
  228. },
  229. {
  230. .compatible = "ti,edma3",
  231. .data = (void *)TI_XBAR_EDMA_OFFSET,
  232. },
  233. {},
  234. };
  235. static int ti_dra7_xbar_probe(struct platform_device *pdev)
  236. {
  237. struct device_node *node = pdev->dev.of_node;
  238. const struct of_device_id *match;
  239. struct device_node *dma_node;
  240. struct ti_dra7_xbar_data *xbar;
  241. struct resource *res;
  242. u32 safe_val;
  243. void __iomem *iomem;
  244. int i, ret;
  245. if (!node)
  246. return -ENODEV;
  247. xbar = devm_kzalloc(&pdev->dev, sizeof(*xbar), GFP_KERNEL);
  248. if (!xbar)
  249. return -ENOMEM;
  250. idr_init(&xbar->map_idr);
  251. dma_node = of_parse_phandle(node, "dma-masters", 0);
  252. if (!dma_node) {
  253. dev_err(&pdev->dev, "Can't get DMA master node\n");
  254. return -ENODEV;
  255. }
  256. match = of_match_node(ti_dra7_master_match, dma_node);
  257. if (!match) {
  258. dev_err(&pdev->dev, "DMA master is not supported\n");
  259. of_node_put(dma_node);
  260. return -EINVAL;
  261. }
  262. if (of_property_read_u32(dma_node, "dma-requests",
  263. &xbar->dma_requests)) {
  264. dev_info(&pdev->dev,
  265. "Missing XBAR output information, using %u.\n",
  266. TI_DRA7_XBAR_OUTPUTS);
  267. xbar->dma_requests = TI_DRA7_XBAR_OUTPUTS;
  268. }
  269. of_node_put(dma_node);
  270. if (of_property_read_u32(node, "dma-requests", &xbar->xbar_requests)) {
  271. dev_info(&pdev->dev,
  272. "Missing XBAR input information, using %u.\n",
  273. TI_DRA7_XBAR_INPUTS);
  274. xbar->xbar_requests = TI_DRA7_XBAR_INPUTS;
  275. }
  276. if (!of_property_read_u32(node, "ti,dma-safe-map", &safe_val))
  277. xbar->safe_val = (u16)safe_val;
  278. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  279. iomem = devm_ioremap_resource(&pdev->dev, res);
  280. if (IS_ERR(iomem))
  281. return PTR_ERR(iomem);
  282. xbar->iomem = iomem;
  283. xbar->dmarouter.dev = &pdev->dev;
  284. xbar->dmarouter.route_free = ti_dra7_xbar_free;
  285. xbar->dma_offset = (u32)match->data;
  286. platform_set_drvdata(pdev, xbar);
  287. /* Reset the crossbar */
  288. for (i = 0; i < xbar->dma_requests; i++)
  289. ti_dra7_xbar_write(xbar->iomem, i, xbar->safe_val);
  290. ret = of_dma_router_register(node, ti_dra7_xbar_route_allocate,
  291. &xbar->dmarouter);
  292. if (ret) {
  293. /* Restore the defaults for the crossbar */
  294. for (i = 0; i < xbar->dma_requests; i++)
  295. ti_dra7_xbar_write(xbar->iomem, i, i);
  296. }
  297. return ret;
  298. }
  299. static int ti_dma_xbar_probe(struct platform_device *pdev)
  300. {
  301. const struct of_device_id *match;
  302. int ret;
  303. match = of_match_node(ti_dma_xbar_match, pdev->dev.of_node);
  304. if (unlikely(!match))
  305. return -EINVAL;
  306. switch ((u32)match->data) {
  307. case TI_XBAR_DRA7:
  308. ret = ti_dra7_xbar_probe(pdev);
  309. break;
  310. case TI_XBAR_AM335X:
  311. ret = ti_am335x_xbar_probe(pdev);
  312. break;
  313. default:
  314. dev_err(&pdev->dev, "Unsupported crossbar\n");
  315. ret = -ENODEV;
  316. break;
  317. }
  318. return ret;
  319. }
  320. static struct platform_driver ti_dma_xbar_driver = {
  321. .driver = {
  322. .name = "ti-dma-crossbar",
  323. .of_match_table = of_match_ptr(ti_dma_xbar_match),
  324. },
  325. .probe = ti_dma_xbar_probe,
  326. };
  327. int omap_dmaxbar_init(void)
  328. {
  329. return platform_driver_register(&ti_dma_xbar_driver);
  330. }
  331. arch_initcall(omap_dmaxbar_init);