gpio-f7188x.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494
  1. /*
  2. * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882 and F71889
  3. *
  4. * Copyright (C) 2010-2013 LaCie
  5. *
  6. * Author: Simon Guinot <simon.guinot@sequanux.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/io.h>
  17. #include <linux/gpio.h>
  18. #define DRVNAME "gpio-f7188x"
  19. /*
  20. * Super-I/O registers
  21. */
  22. #define SIO_LDSEL 0x07 /* Logical device select */
  23. #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
  24. #define SIO_DEVREV 0x22 /* Device revision */
  25. #define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
  26. #define SIO_LD_GPIO 0x06 /* GPIO logical device */
  27. #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
  28. #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
  29. #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
  30. #define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
  31. #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
  32. #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
  33. #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
  34. enum chips { f71869, f71869a, f71882fg, f71889f };
  35. static const char * const f7188x_names[] = {
  36. "f71869",
  37. "f71869a",
  38. "f71882fg",
  39. "f71889f",
  40. };
  41. struct f7188x_sio {
  42. int addr;
  43. enum chips type;
  44. };
  45. struct f7188x_gpio_bank {
  46. struct gpio_chip chip;
  47. unsigned int regbase;
  48. struct f7188x_gpio_data *data;
  49. };
  50. struct f7188x_gpio_data {
  51. struct f7188x_sio *sio;
  52. int nr_bank;
  53. struct f7188x_gpio_bank *bank;
  54. };
  55. /*
  56. * Super-I/O functions.
  57. */
  58. static inline int superio_inb(int base, int reg)
  59. {
  60. outb(reg, base);
  61. return inb(base + 1);
  62. }
  63. static int superio_inw(int base, int reg)
  64. {
  65. int val;
  66. outb(reg++, base);
  67. val = inb(base + 1) << 8;
  68. outb(reg, base);
  69. val |= inb(base + 1);
  70. return val;
  71. }
  72. static inline void superio_outb(int base, int reg, int val)
  73. {
  74. outb(reg, base);
  75. outb(val, base + 1);
  76. }
  77. static inline int superio_enter(int base)
  78. {
  79. /* Don't step on other drivers' I/O space by accident. */
  80. if (!request_muxed_region(base, 2, DRVNAME)) {
  81. pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
  82. return -EBUSY;
  83. }
  84. /* According to the datasheet the key must be send twice. */
  85. outb(SIO_UNLOCK_KEY, base);
  86. outb(SIO_UNLOCK_KEY, base);
  87. return 0;
  88. }
  89. static inline void superio_select(int base, int ld)
  90. {
  91. outb(SIO_LDSEL, base);
  92. outb(ld, base + 1);
  93. }
  94. static inline void superio_exit(int base)
  95. {
  96. outb(SIO_LOCK_KEY, base);
  97. release_region(base, 2);
  98. }
  99. /*
  100. * GPIO chip.
  101. */
  102. static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
  103. static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
  104. static int f7188x_gpio_direction_out(struct gpio_chip *chip,
  105. unsigned offset, int value);
  106. static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
  107. #define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
  108. { \
  109. .chip = { \
  110. .label = DRVNAME, \
  111. .owner = THIS_MODULE, \
  112. .direction_input = f7188x_gpio_direction_in, \
  113. .get = f7188x_gpio_get, \
  114. .direction_output = f7188x_gpio_direction_out, \
  115. .set = f7188x_gpio_set, \
  116. .base = _base, \
  117. .ngpio = _ngpio, \
  118. .can_sleep = true, \
  119. }, \
  120. .regbase = _regbase, \
  121. }
  122. #define gpio_dir(base) (base + 0)
  123. #define gpio_data_out(base) (base + 1)
  124. #define gpio_data_in(base) (base + 2)
  125. /* Output mode register (0:open drain 1:push-pull). */
  126. #define gpio_out_mode(base) (base + 3)
  127. static struct f7188x_gpio_bank f71869_gpio_bank[] = {
  128. F7188X_GPIO_BANK(0, 6, 0xF0),
  129. F7188X_GPIO_BANK(10, 8, 0xE0),
  130. F7188X_GPIO_BANK(20, 8, 0xD0),
  131. F7188X_GPIO_BANK(30, 8, 0xC0),
  132. F7188X_GPIO_BANK(40, 8, 0xB0),
  133. F7188X_GPIO_BANK(50, 5, 0xA0),
  134. F7188X_GPIO_BANK(60, 6, 0x90),
  135. };
  136. static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
  137. F7188X_GPIO_BANK(0, 6, 0xF0),
  138. F7188X_GPIO_BANK(10, 8, 0xE0),
  139. F7188X_GPIO_BANK(20, 8, 0xD0),
  140. F7188X_GPIO_BANK(30, 8, 0xC0),
  141. F7188X_GPIO_BANK(40, 8, 0xB0),
  142. F7188X_GPIO_BANK(50, 5, 0xA0),
  143. F7188X_GPIO_BANK(60, 8, 0x90),
  144. F7188X_GPIO_BANK(70, 8, 0x80),
  145. };
  146. static struct f7188x_gpio_bank f71882_gpio_bank[] = {
  147. F7188X_GPIO_BANK(0, 8, 0xF0),
  148. F7188X_GPIO_BANK(10, 8, 0xE0),
  149. F7188X_GPIO_BANK(20, 8, 0xD0),
  150. F7188X_GPIO_BANK(30, 4, 0xC0),
  151. F7188X_GPIO_BANK(40, 4, 0xB0),
  152. };
  153. static struct f7188x_gpio_bank f71889_gpio_bank[] = {
  154. F7188X_GPIO_BANK(0, 7, 0xF0),
  155. F7188X_GPIO_BANK(10, 7, 0xE0),
  156. F7188X_GPIO_BANK(20, 8, 0xD0),
  157. F7188X_GPIO_BANK(30, 8, 0xC0),
  158. F7188X_GPIO_BANK(40, 8, 0xB0),
  159. F7188X_GPIO_BANK(50, 5, 0xA0),
  160. F7188X_GPIO_BANK(60, 8, 0x90),
  161. F7188X_GPIO_BANK(70, 8, 0x80),
  162. };
  163. static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
  164. {
  165. int err;
  166. struct f7188x_gpio_bank *bank =
  167. container_of(chip, struct f7188x_gpio_bank, chip);
  168. struct f7188x_sio *sio = bank->data->sio;
  169. u8 dir;
  170. err = superio_enter(sio->addr);
  171. if (err)
  172. return err;
  173. superio_select(sio->addr, SIO_LD_GPIO);
  174. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  175. dir &= ~(1 << offset);
  176. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  177. superio_exit(sio->addr);
  178. return 0;
  179. }
  180. static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
  181. {
  182. int err;
  183. struct f7188x_gpio_bank *bank =
  184. container_of(chip, struct f7188x_gpio_bank, chip);
  185. struct f7188x_sio *sio = bank->data->sio;
  186. u8 dir, data;
  187. err = superio_enter(sio->addr);
  188. if (err)
  189. return err;
  190. superio_select(sio->addr, SIO_LD_GPIO);
  191. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  192. dir = !!(dir & (1 << offset));
  193. if (dir)
  194. data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  195. else
  196. data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
  197. superio_exit(sio->addr);
  198. return !!(data & 1 << offset);
  199. }
  200. static int f7188x_gpio_direction_out(struct gpio_chip *chip,
  201. unsigned offset, int value)
  202. {
  203. int err;
  204. struct f7188x_gpio_bank *bank =
  205. container_of(chip, struct f7188x_gpio_bank, chip);
  206. struct f7188x_sio *sio = bank->data->sio;
  207. u8 dir, data_out;
  208. err = superio_enter(sio->addr);
  209. if (err)
  210. return err;
  211. superio_select(sio->addr, SIO_LD_GPIO);
  212. data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  213. if (value)
  214. data_out |= (1 << offset);
  215. else
  216. data_out &= ~(1 << offset);
  217. superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
  218. dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
  219. dir |= (1 << offset);
  220. superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
  221. superio_exit(sio->addr);
  222. return 0;
  223. }
  224. static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
  225. {
  226. int err;
  227. struct f7188x_gpio_bank *bank =
  228. container_of(chip, struct f7188x_gpio_bank, chip);
  229. struct f7188x_sio *sio = bank->data->sio;
  230. u8 data_out;
  231. err = superio_enter(sio->addr);
  232. if (err)
  233. return;
  234. superio_select(sio->addr, SIO_LD_GPIO);
  235. data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
  236. if (value)
  237. data_out |= (1 << offset);
  238. else
  239. data_out &= ~(1 << offset);
  240. superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
  241. superio_exit(sio->addr);
  242. }
  243. /*
  244. * Platform device and driver.
  245. */
  246. static int f7188x_gpio_probe(struct platform_device *pdev)
  247. {
  248. int err;
  249. int i;
  250. struct f7188x_sio *sio = pdev->dev.platform_data;
  251. struct f7188x_gpio_data *data;
  252. data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
  253. if (!data)
  254. return -ENOMEM;
  255. switch (sio->type) {
  256. case f71869:
  257. data->nr_bank = ARRAY_SIZE(f71869_gpio_bank);
  258. data->bank = f71869_gpio_bank;
  259. break;
  260. case f71869a:
  261. data->nr_bank = ARRAY_SIZE(f71869a_gpio_bank);
  262. data->bank = f71869a_gpio_bank;
  263. break;
  264. case f71882fg:
  265. data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
  266. data->bank = f71882_gpio_bank;
  267. break;
  268. case f71889f:
  269. data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
  270. data->bank = f71889_gpio_bank;
  271. break;
  272. default:
  273. return -ENODEV;
  274. }
  275. data->sio = sio;
  276. platform_set_drvdata(pdev, data);
  277. /* For each GPIO bank, register a GPIO chip. */
  278. for (i = 0; i < data->nr_bank; i++) {
  279. struct f7188x_gpio_bank *bank = &data->bank[i];
  280. bank->chip.dev = &pdev->dev;
  281. bank->data = data;
  282. err = gpiochip_add(&bank->chip);
  283. if (err) {
  284. dev_err(&pdev->dev,
  285. "Failed to register gpiochip %d: %d\n",
  286. i, err);
  287. goto err_gpiochip;
  288. }
  289. }
  290. return 0;
  291. err_gpiochip:
  292. for (i = i - 1; i >= 0; i--) {
  293. struct f7188x_gpio_bank *bank = &data->bank[i];
  294. gpiochip_remove(&bank->chip);
  295. }
  296. return err;
  297. }
  298. static int f7188x_gpio_remove(struct platform_device *pdev)
  299. {
  300. int i;
  301. struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
  302. for (i = 0; i < data->nr_bank; i++) {
  303. struct f7188x_gpio_bank *bank = &data->bank[i];
  304. gpiochip_remove(&bank->chip);
  305. }
  306. return 0;
  307. }
  308. static int __init f7188x_find(int addr, struct f7188x_sio *sio)
  309. {
  310. int err;
  311. u16 devid;
  312. err = superio_enter(addr);
  313. if (err)
  314. return err;
  315. err = -ENODEV;
  316. devid = superio_inw(addr, SIO_MANID);
  317. if (devid != SIO_FINTEK_ID) {
  318. pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
  319. goto err;
  320. }
  321. devid = superio_inw(addr, SIO_DEVID);
  322. switch (devid) {
  323. case SIO_F71869_ID:
  324. sio->type = f71869;
  325. break;
  326. case SIO_F71869A_ID:
  327. sio->type = f71869a;
  328. break;
  329. case SIO_F71882_ID:
  330. sio->type = f71882fg;
  331. break;
  332. case SIO_F71889_ID:
  333. sio->type = f71889f;
  334. break;
  335. default:
  336. pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
  337. goto err;
  338. }
  339. sio->addr = addr;
  340. err = 0;
  341. pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
  342. f7188x_names[sio->type],
  343. (unsigned int) addr,
  344. (int) superio_inb(addr, SIO_DEVREV));
  345. err:
  346. superio_exit(addr);
  347. return err;
  348. }
  349. static struct platform_device *f7188x_gpio_pdev;
  350. static int __init
  351. f7188x_gpio_device_add(const struct f7188x_sio *sio)
  352. {
  353. int err;
  354. f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
  355. if (!f7188x_gpio_pdev)
  356. return -ENOMEM;
  357. err = platform_device_add_data(f7188x_gpio_pdev,
  358. sio, sizeof(*sio));
  359. if (err) {
  360. pr_err(DRVNAME "Platform data allocation failed\n");
  361. goto err;
  362. }
  363. err = platform_device_add(f7188x_gpio_pdev);
  364. if (err) {
  365. pr_err(DRVNAME "Device addition failed\n");
  366. goto err;
  367. }
  368. return 0;
  369. err:
  370. platform_device_put(f7188x_gpio_pdev);
  371. return err;
  372. }
  373. /*
  374. * Try to match a supported Fintek device by reading the (hard-wired)
  375. * configuration I/O ports. If available, then register both the platform
  376. * device and driver to support the GPIOs.
  377. */
  378. static struct platform_driver f7188x_gpio_driver = {
  379. .driver = {
  380. .name = DRVNAME,
  381. },
  382. .probe = f7188x_gpio_probe,
  383. .remove = f7188x_gpio_remove,
  384. };
  385. static int __init f7188x_gpio_init(void)
  386. {
  387. int err;
  388. struct f7188x_sio sio;
  389. if (f7188x_find(0x2e, &sio) &&
  390. f7188x_find(0x4e, &sio))
  391. return -ENODEV;
  392. err = platform_driver_register(&f7188x_gpio_driver);
  393. if (!err) {
  394. err = f7188x_gpio_device_add(&sio);
  395. if (err)
  396. platform_driver_unregister(&f7188x_gpio_driver);
  397. }
  398. return err;
  399. }
  400. subsys_initcall(f7188x_gpio_init);
  401. static void __exit f7188x_gpio_exit(void)
  402. {
  403. platform_device_unregister(f7188x_gpio_pdev);
  404. platform_driver_unregister(&f7188x_gpio_driver);
  405. }
  406. module_exit(f7188x_gpio_exit);
  407. MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG and F71889F");
  408. MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
  409. MODULE_LICENSE("GPL");