gpio-mpc5200.c 9.9 KB

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  1. /*
  2. * MPC52xx gpio driver
  3. *
  4. * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/of.h>
  20. #include <linux/kernel.h>
  21. #include <linux/slab.h>
  22. #include <linux/of_gpio.h>
  23. #include <linux/io.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/module.h>
  26. #include <asm/gpio.h>
  27. #include <asm/mpc52xx.h>
  28. #include <sysdev/fsl_soc.h>
  29. static DEFINE_SPINLOCK(gpio_lock);
  30. struct mpc52xx_gpiochip {
  31. struct of_mm_gpio_chip mmchip;
  32. unsigned int shadow_dvo;
  33. unsigned int shadow_gpioe;
  34. unsigned int shadow_ddr;
  35. };
  36. /*
  37. * GPIO LIB API implementation for wakeup GPIOs.
  38. *
  39. * There's a maximum of 8 wakeup GPIOs. Which of these are available
  40. * for use depends on your board setup.
  41. *
  42. * 0 -> GPIO_WKUP_7
  43. * 1 -> GPIO_WKUP_6
  44. * 2 -> PSC6_1
  45. * 3 -> PSC6_0
  46. * 4 -> ETH_17
  47. * 5 -> PSC3_9
  48. * 6 -> PSC2_4
  49. * 7 -> PSC1_4
  50. *
  51. */
  52. static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  53. {
  54. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  55. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  56. unsigned int ret;
  57. ret = (in_8(&regs->wkup_ival) >> (7 - gpio)) & 1;
  58. pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
  59. return ret;
  60. }
  61. static inline void
  62. __mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  63. {
  64. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  65. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  66. struct mpc52xx_gpiochip, mmchip);
  67. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  68. if (val)
  69. chip->shadow_dvo |= 1 << (7 - gpio);
  70. else
  71. chip->shadow_dvo &= ~(1 << (7 - gpio));
  72. out_8(&regs->wkup_dvo, chip->shadow_dvo);
  73. }
  74. static void
  75. mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  76. {
  77. unsigned long flags;
  78. spin_lock_irqsave(&gpio_lock, flags);
  79. __mpc52xx_wkup_gpio_set(gc, gpio, val);
  80. spin_unlock_irqrestore(&gpio_lock, flags);
  81. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  82. }
  83. static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  84. {
  85. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  86. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  87. struct mpc52xx_gpiochip, mmchip);
  88. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  89. unsigned long flags;
  90. spin_lock_irqsave(&gpio_lock, flags);
  91. /* set the direction */
  92. chip->shadow_ddr &= ~(1 << (7 - gpio));
  93. out_8(&regs->wkup_ddr, chip->shadow_ddr);
  94. /* and enable the pin */
  95. chip->shadow_gpioe |= 1 << (7 - gpio);
  96. out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
  97. spin_unlock_irqrestore(&gpio_lock, flags);
  98. return 0;
  99. }
  100. static int
  101. mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  102. {
  103. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  104. struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
  105. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  106. struct mpc52xx_gpiochip, mmchip);
  107. unsigned long flags;
  108. spin_lock_irqsave(&gpio_lock, flags);
  109. __mpc52xx_wkup_gpio_set(gc, gpio, val);
  110. /* Then set direction */
  111. chip->shadow_ddr |= 1 << (7 - gpio);
  112. out_8(&regs->wkup_ddr, chip->shadow_ddr);
  113. /* Finally enable the pin */
  114. chip->shadow_gpioe |= 1 << (7 - gpio);
  115. out_8(&regs->wkup_gpioe, chip->shadow_gpioe);
  116. spin_unlock_irqrestore(&gpio_lock, flags);
  117. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  118. return 0;
  119. }
  120. static int mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
  121. {
  122. struct mpc52xx_gpiochip *chip;
  123. struct mpc52xx_gpio_wkup __iomem *regs;
  124. struct gpio_chip *gc;
  125. int ret;
  126. chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
  127. if (!chip)
  128. return -ENOMEM;
  129. platform_set_drvdata(ofdev, chip);
  130. gc = &chip->mmchip.gc;
  131. gc->ngpio = 8;
  132. gc->direction_input = mpc52xx_wkup_gpio_dir_in;
  133. gc->direction_output = mpc52xx_wkup_gpio_dir_out;
  134. gc->get = mpc52xx_wkup_gpio_get;
  135. gc->set = mpc52xx_wkup_gpio_set;
  136. ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip);
  137. if (ret)
  138. return ret;
  139. regs = chip->mmchip.regs;
  140. chip->shadow_gpioe = in_8(&regs->wkup_gpioe);
  141. chip->shadow_ddr = in_8(&regs->wkup_ddr);
  142. chip->shadow_dvo = in_8(&regs->wkup_dvo);
  143. return 0;
  144. }
  145. static int mpc52xx_gpiochip_remove(struct platform_device *ofdev)
  146. {
  147. struct mpc52xx_gpiochip *chip = platform_get_drvdata(ofdev);
  148. of_mm_gpiochip_remove(&chip->mmchip);
  149. return 0;
  150. }
  151. static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
  152. { .compatible = "fsl,mpc5200-gpio-wkup", },
  153. {}
  154. };
  155. static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
  156. .driver = {
  157. .name = "mpc5200-gpio-wkup",
  158. .of_match_table = mpc52xx_wkup_gpiochip_match,
  159. },
  160. .probe = mpc52xx_wkup_gpiochip_probe,
  161. .remove = mpc52xx_gpiochip_remove,
  162. };
  163. /*
  164. * GPIO LIB API implementation for simple GPIOs
  165. *
  166. * There's a maximum of 32 simple GPIOs. Which of these are available
  167. * for use depends on your board setup.
  168. * The numbering reflects the bit numbering in the port registers:
  169. *
  170. * 0..1 > reserved
  171. * 2..3 > IRDA
  172. * 4..7 > ETHR
  173. * 8..11 > reserved
  174. * 12..15 > USB
  175. * 16..17 > reserved
  176. * 18..23 > PSC3
  177. * 24..27 > PSC2
  178. * 28..31 > PSC1
  179. */
  180. static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
  181. {
  182. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  183. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  184. unsigned int ret;
  185. ret = (in_be32(&regs->simple_ival) >> (31 - gpio)) & 1;
  186. return ret;
  187. }
  188. static inline void
  189. __mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  190. {
  191. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  192. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  193. struct mpc52xx_gpiochip, mmchip);
  194. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  195. if (val)
  196. chip->shadow_dvo |= 1 << (31 - gpio);
  197. else
  198. chip->shadow_dvo &= ~(1 << (31 - gpio));
  199. out_be32(&regs->simple_dvo, chip->shadow_dvo);
  200. }
  201. static void
  202. mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
  203. {
  204. unsigned long flags;
  205. spin_lock_irqsave(&gpio_lock, flags);
  206. __mpc52xx_simple_gpio_set(gc, gpio, val);
  207. spin_unlock_irqrestore(&gpio_lock, flags);
  208. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  209. }
  210. static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
  211. {
  212. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  213. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  214. struct mpc52xx_gpiochip, mmchip);
  215. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  216. unsigned long flags;
  217. spin_lock_irqsave(&gpio_lock, flags);
  218. /* set the direction */
  219. chip->shadow_ddr &= ~(1 << (31 - gpio));
  220. out_be32(&regs->simple_ddr, chip->shadow_ddr);
  221. /* and enable the pin */
  222. chip->shadow_gpioe |= 1 << (31 - gpio);
  223. out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
  224. spin_unlock_irqrestore(&gpio_lock, flags);
  225. return 0;
  226. }
  227. static int
  228. mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
  229. {
  230. struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
  231. struct mpc52xx_gpiochip *chip = container_of(mm_gc,
  232. struct mpc52xx_gpiochip, mmchip);
  233. struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
  234. unsigned long flags;
  235. spin_lock_irqsave(&gpio_lock, flags);
  236. /* First set initial value */
  237. __mpc52xx_simple_gpio_set(gc, gpio, val);
  238. /* Then set direction */
  239. chip->shadow_ddr |= 1 << (31 - gpio);
  240. out_be32(&regs->simple_ddr, chip->shadow_ddr);
  241. /* Finally enable the pin */
  242. chip->shadow_gpioe |= 1 << (31 - gpio);
  243. out_be32(&regs->simple_gpioe, chip->shadow_gpioe);
  244. spin_unlock_irqrestore(&gpio_lock, flags);
  245. pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
  246. return 0;
  247. }
  248. static int mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
  249. {
  250. struct mpc52xx_gpiochip *chip;
  251. struct gpio_chip *gc;
  252. struct mpc52xx_gpio __iomem *regs;
  253. int ret;
  254. chip = devm_kzalloc(&ofdev->dev, sizeof(*chip), GFP_KERNEL);
  255. if (!chip)
  256. return -ENOMEM;
  257. platform_set_drvdata(ofdev, chip);
  258. gc = &chip->mmchip.gc;
  259. gc->ngpio = 32;
  260. gc->direction_input = mpc52xx_simple_gpio_dir_in;
  261. gc->direction_output = mpc52xx_simple_gpio_dir_out;
  262. gc->get = mpc52xx_simple_gpio_get;
  263. gc->set = mpc52xx_simple_gpio_set;
  264. ret = of_mm_gpiochip_add(ofdev->dev.of_node, &chip->mmchip);
  265. if (ret)
  266. return ret;
  267. regs = chip->mmchip.regs;
  268. chip->shadow_gpioe = in_be32(&regs->simple_gpioe);
  269. chip->shadow_ddr = in_be32(&regs->simple_ddr);
  270. chip->shadow_dvo = in_be32(&regs->simple_dvo);
  271. return 0;
  272. }
  273. static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
  274. { .compatible = "fsl,mpc5200-gpio", },
  275. {}
  276. };
  277. static struct platform_driver mpc52xx_simple_gpiochip_driver = {
  278. .driver = {
  279. .name = "mpc5200-gpio",
  280. .of_match_table = mpc52xx_simple_gpiochip_match,
  281. },
  282. .probe = mpc52xx_simple_gpiochip_probe,
  283. .remove = mpc52xx_gpiochip_remove,
  284. };
  285. static int __init mpc52xx_gpio_init(void)
  286. {
  287. if (platform_driver_register(&mpc52xx_wkup_gpiochip_driver))
  288. printk(KERN_ERR "Unable to register wakeup GPIO driver\n");
  289. if (platform_driver_register(&mpc52xx_simple_gpiochip_driver))
  290. printk(KERN_ERR "Unable to register simple GPIO driver\n");
  291. return 0;
  292. }
  293. /* Make sure we get initialised before anyone else tries to use us */
  294. subsys_initcall(mpc52xx_gpio_init);
  295. static void __exit mpc52xx_gpio_exit(void)
  296. {
  297. platform_driver_unregister(&mpc52xx_wkup_gpiochip_driver);
  298. platform_driver_unregister(&mpc52xx_simple_gpiochip_driver);
  299. }
  300. module_exit(mpc52xx_gpio_exit);
  301. MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
  302. MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
  303. MODULE_LICENSE("GPL v2");