gpio-xgene-sb.c 4.7 KB

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  1. /*
  2. * AppliedMicro X-Gene SoC GPIO-Standby Driver
  3. *
  4. * Copyright (c) 2014, Applied Micro Circuits Corporation
  5. * Author: Tin Huynh <tnhuynh@apm.com>.
  6. * Y Vo <yvo@apm.com>.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/io.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_gpio.h>
  25. #include <linux/gpio.h>
  26. #include <linux/gpio/driver.h>
  27. #include <linux/acpi.h>
  28. #include <linux/basic_mmio_gpio.h>
  29. #include "gpiolib.h"
  30. #define XGENE_MAX_GPIO_DS 22
  31. #define XGENE_MAX_GPIO_DS_IRQ 6
  32. #define GPIO_MASK(x) (1U << ((x) % 32))
  33. #define MPA_GPIO_INT_LVL 0x0290
  34. #define MPA_GPIO_OE_ADDR 0x029c
  35. #define MPA_GPIO_OUT_ADDR 0x02a0
  36. #define MPA_GPIO_IN_ADDR 0x02a4
  37. #define MPA_GPIO_SEL_LO 0x0294
  38. /**
  39. * struct xgene_gpio_sb - GPIO-Standby private data structure.
  40. * @bgc: memory-mapped GPIO controllers.
  41. * @irq: Mapping GPIO pins and interrupt number
  42. * nirq: Number of GPIO pins that supports interrupt
  43. */
  44. struct xgene_gpio_sb {
  45. struct bgpio_chip bgc;
  46. u32 *irq;
  47. u32 nirq;
  48. };
  49. static inline struct xgene_gpio_sb *to_xgene_gpio_sb(struct gpio_chip *gc)
  50. {
  51. struct bgpio_chip *bgc = to_bgpio_chip(gc);
  52. return container_of(bgc, struct xgene_gpio_sb, bgc);
  53. }
  54. static void xgene_gpio_set_bit(struct bgpio_chip *bgc, void __iomem *reg, u32 gpio, int val)
  55. {
  56. u32 data;
  57. data = bgc->read_reg(reg);
  58. if (val)
  59. data |= GPIO_MASK(gpio);
  60. else
  61. data &= ~GPIO_MASK(gpio);
  62. bgc->write_reg(reg, data);
  63. }
  64. static int apm_gpio_sb_to_irq(struct gpio_chip *gc, u32 gpio)
  65. {
  66. struct xgene_gpio_sb *priv = to_xgene_gpio_sb(gc);
  67. if (priv->irq[gpio])
  68. return priv->irq[gpio];
  69. return -ENXIO;
  70. }
  71. static int xgene_gpio_sb_probe(struct platform_device *pdev)
  72. {
  73. struct xgene_gpio_sb *priv;
  74. u32 ret, i;
  75. u32 default_lines[] = {0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D};
  76. struct resource *res;
  77. void __iomem *regs;
  78. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  79. if (!priv)
  80. return -ENOMEM;
  81. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  82. regs = devm_ioremap_resource(&pdev->dev, res);
  83. if (IS_ERR(regs))
  84. return PTR_ERR(regs);
  85. ret = bgpio_init(&priv->bgc, &pdev->dev, 4,
  86. regs + MPA_GPIO_IN_ADDR,
  87. regs + MPA_GPIO_OUT_ADDR, NULL,
  88. regs + MPA_GPIO_OE_ADDR, NULL, 0);
  89. if (ret)
  90. return ret;
  91. priv->bgc.gc.to_irq = apm_gpio_sb_to_irq;
  92. priv->bgc.gc.ngpio = XGENE_MAX_GPIO_DS;
  93. priv->nirq = XGENE_MAX_GPIO_DS_IRQ;
  94. priv->irq = devm_kzalloc(&pdev->dev, sizeof(u32) * XGENE_MAX_GPIO_DS,
  95. GFP_KERNEL);
  96. if (!priv->irq)
  97. return -ENOMEM;
  98. for (i = 0; i < priv->nirq; i++) {
  99. priv->irq[default_lines[i]] = platform_get_irq(pdev, i);
  100. xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_SEL_LO,
  101. default_lines[i] * 2, 1);
  102. xgene_gpio_set_bit(&priv->bgc, regs + MPA_GPIO_INT_LVL, i, 1);
  103. }
  104. platform_set_drvdata(pdev, priv);
  105. ret = gpiochip_add(&priv->bgc.gc);
  106. if (ret)
  107. dev_err(&pdev->dev, "failed to register X-Gene GPIO Standby driver\n");
  108. else
  109. dev_info(&pdev->dev, "X-Gene GPIO Standby driver registered\n");
  110. if (priv->nirq > 0) {
  111. /* Register interrupt handlers for gpio signaled acpi events */
  112. acpi_gpiochip_request_interrupts(&priv->bgc.gc);
  113. }
  114. return ret;
  115. }
  116. static int xgene_gpio_sb_remove(struct platform_device *pdev)
  117. {
  118. struct xgene_gpio_sb *priv = platform_get_drvdata(pdev);
  119. if (priv->nirq > 0) {
  120. acpi_gpiochip_free_interrupts(&priv->bgc.gc);
  121. }
  122. return bgpio_remove(&priv->bgc);
  123. }
  124. static const struct of_device_id xgene_gpio_sb_of_match[] = {
  125. {.compatible = "apm,xgene-gpio-sb", },
  126. {},
  127. };
  128. MODULE_DEVICE_TABLE(of, xgene_gpio_sb_of_match);
  129. #ifdef CONFIG_ACPI
  130. static const struct acpi_device_id xgene_gpio_sb_acpi_match[] = {
  131. {"APMC0D15", 0},
  132. {},
  133. };
  134. MODULE_DEVICE_TABLE(acpi, xgene_gpio_sb_acpi_match);
  135. #endif
  136. static struct platform_driver xgene_gpio_sb_driver = {
  137. .driver = {
  138. .name = "xgene-gpio-sb",
  139. .of_match_table = xgene_gpio_sb_of_match,
  140. .acpi_match_table = ACPI_PTR(xgene_gpio_sb_acpi_match),
  141. },
  142. .probe = xgene_gpio_sb_probe,
  143. .remove = xgene_gpio_sb_remove,
  144. };
  145. module_platform_driver(xgene_gpio_sb_driver);
  146. MODULE_AUTHOR("AppliedMicro");
  147. MODULE_DESCRIPTION("APM X-Gene GPIO Standby driver");
  148. MODULE_LICENSE("GPL");