amdgpu_gds.h 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172
  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #ifndef __AMDGPU_GDS_H__
  24. #define __AMDGPU_GDS_H__
  25. /* Because TTM request that alloacted buffer should be PAGE_SIZE aligned,
  26. * we should report GDS/GWS/OA size as PAGE_SIZE aligned
  27. * */
  28. #define AMDGPU_GDS_SHIFT 2
  29. #define AMDGPU_GWS_SHIFT PAGE_SHIFT
  30. #define AMDGPU_OA_SHIFT PAGE_SHIFT
  31. #define AMDGPU_PL_GDS TTM_PL_PRIV0
  32. #define AMDGPU_PL_GWS TTM_PL_PRIV1
  33. #define AMDGPU_PL_OA TTM_PL_PRIV2
  34. #define AMDGPU_PL_FLAG_GDS TTM_PL_FLAG_PRIV0
  35. #define AMDGPU_PL_FLAG_GWS TTM_PL_FLAG_PRIV1
  36. #define AMDGPU_PL_FLAG_OA TTM_PL_FLAG_PRIV2
  37. struct amdgpu_ring;
  38. struct amdgpu_bo;
  39. struct amdgpu_gds_asic_info {
  40. uint32_t total_size;
  41. uint32_t gfx_partition_size;
  42. uint32_t cs_partition_size;
  43. };
  44. struct amdgpu_gds {
  45. struct amdgpu_gds_asic_info mem;
  46. struct amdgpu_gds_asic_info gws;
  47. struct amdgpu_gds_asic_info oa;
  48. /* At present, GDS, GWS and OA resources for gfx (graphics)
  49. * is always pre-allocated and available for graphics operation.
  50. * Such resource is shared between all gfx clients.
  51. * TODO: move this operation to user space
  52. * */
  53. struct amdgpu_bo* gds_gfx_bo;
  54. struct amdgpu_bo* gws_gfx_bo;
  55. struct amdgpu_bo* oa_gfx_bo;
  56. };
  57. struct amdgpu_gds_reg_offset {
  58. uint32_t mem_base;
  59. uint32_t mem_size;
  60. uint32_t gws;
  61. uint32_t oa;
  62. };
  63. #endif /* __AMDGPU_GDS_H__ */