amdgpu_mn.c 7.9 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <linux/firmware.h>
  31. #include <linux/module.h>
  32. #include <linux/mmu_notifier.h>
  33. #include <drm/drmP.h>
  34. #include <drm/drm.h>
  35. #include "amdgpu.h"
  36. struct amdgpu_mn {
  37. /* constant after initialisation */
  38. struct amdgpu_device *adev;
  39. struct mm_struct *mm;
  40. struct mmu_notifier mn;
  41. /* only used on destruction */
  42. struct work_struct work;
  43. /* protected by adev->mn_lock */
  44. struct hlist_node node;
  45. /* objects protected by lock */
  46. struct mutex lock;
  47. struct rb_root objects;
  48. };
  49. struct amdgpu_mn_node {
  50. struct interval_tree_node it;
  51. struct list_head bos;
  52. };
  53. /**
  54. * amdgpu_mn_destroy - destroy the rmn
  55. *
  56. * @work: previously sheduled work item
  57. *
  58. * Lazy destroys the notifier from a work item
  59. */
  60. static void amdgpu_mn_destroy(struct work_struct *work)
  61. {
  62. struct amdgpu_mn *rmn = container_of(work, struct amdgpu_mn, work);
  63. struct amdgpu_device *adev = rmn->adev;
  64. struct amdgpu_mn_node *node, *next_node;
  65. struct amdgpu_bo *bo, *next_bo;
  66. mutex_lock(&adev->mn_lock);
  67. mutex_lock(&rmn->lock);
  68. hash_del(&rmn->node);
  69. rbtree_postorder_for_each_entry_safe(node, next_node, &rmn->objects,
  70. it.rb) {
  71. interval_tree_remove(&node->it, &rmn->objects);
  72. list_for_each_entry_safe(bo, next_bo, &node->bos, mn_list) {
  73. bo->mn = NULL;
  74. list_del_init(&bo->mn_list);
  75. }
  76. kfree(node);
  77. }
  78. mutex_unlock(&rmn->lock);
  79. mutex_unlock(&adev->mn_lock);
  80. mmu_notifier_unregister(&rmn->mn, rmn->mm);
  81. kfree(rmn);
  82. }
  83. /**
  84. * amdgpu_mn_release - callback to notify about mm destruction
  85. *
  86. * @mn: our notifier
  87. * @mn: the mm this callback is about
  88. *
  89. * Shedule a work item to lazy destroy our notifier.
  90. */
  91. static void amdgpu_mn_release(struct mmu_notifier *mn,
  92. struct mm_struct *mm)
  93. {
  94. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  95. INIT_WORK(&rmn->work, amdgpu_mn_destroy);
  96. schedule_work(&rmn->work);
  97. }
  98. /**
  99. * amdgpu_mn_invalidate_range_start - callback to notify about mm change
  100. *
  101. * @mn: our notifier
  102. * @mn: the mm this callback is about
  103. * @start: start of updated range
  104. * @end: end of updated range
  105. *
  106. * We block for all BOs between start and end to be idle and
  107. * unmap them by move them into system domain again.
  108. */
  109. static void amdgpu_mn_invalidate_range_start(struct mmu_notifier *mn,
  110. struct mm_struct *mm,
  111. unsigned long start,
  112. unsigned long end)
  113. {
  114. struct amdgpu_mn *rmn = container_of(mn, struct amdgpu_mn, mn);
  115. struct interval_tree_node *it;
  116. /* notification is exclusive, but interval is inclusive */
  117. end -= 1;
  118. mutex_lock(&rmn->lock);
  119. it = interval_tree_iter_first(&rmn->objects, start, end);
  120. while (it) {
  121. struct amdgpu_mn_node *node;
  122. struct amdgpu_bo *bo;
  123. long r;
  124. node = container_of(it, struct amdgpu_mn_node, it);
  125. it = interval_tree_iter_next(it, start, end);
  126. list_for_each_entry(bo, &node->bos, mn_list) {
  127. if (!amdgpu_ttm_tt_affect_userptr(bo->tbo.ttm, start,
  128. end))
  129. continue;
  130. r = amdgpu_bo_reserve(bo, true);
  131. if (r) {
  132. DRM_ERROR("(%ld) failed to reserve user bo\n", r);
  133. continue;
  134. }
  135. r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
  136. true, false, MAX_SCHEDULE_TIMEOUT);
  137. if (r <= 0)
  138. DRM_ERROR("(%ld) failed to wait for user bo\n", r);
  139. amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
  140. r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false);
  141. if (r)
  142. DRM_ERROR("(%ld) failed to validate user bo\n", r);
  143. amdgpu_bo_unreserve(bo);
  144. }
  145. }
  146. mutex_unlock(&rmn->lock);
  147. }
  148. static const struct mmu_notifier_ops amdgpu_mn_ops = {
  149. .release = amdgpu_mn_release,
  150. .invalidate_range_start = amdgpu_mn_invalidate_range_start,
  151. };
  152. /**
  153. * amdgpu_mn_get - create notifier context
  154. *
  155. * @adev: amdgpu device pointer
  156. *
  157. * Creates a notifier context for current->mm.
  158. */
  159. static struct amdgpu_mn *amdgpu_mn_get(struct amdgpu_device *adev)
  160. {
  161. struct mm_struct *mm = current->mm;
  162. struct amdgpu_mn *rmn;
  163. int r;
  164. down_write(&mm->mmap_sem);
  165. mutex_lock(&adev->mn_lock);
  166. hash_for_each_possible(adev->mn_hash, rmn, node, (unsigned long)mm)
  167. if (rmn->mm == mm)
  168. goto release_locks;
  169. rmn = kzalloc(sizeof(*rmn), GFP_KERNEL);
  170. if (!rmn) {
  171. rmn = ERR_PTR(-ENOMEM);
  172. goto release_locks;
  173. }
  174. rmn->adev = adev;
  175. rmn->mm = mm;
  176. rmn->mn.ops = &amdgpu_mn_ops;
  177. mutex_init(&rmn->lock);
  178. rmn->objects = RB_ROOT;
  179. r = __mmu_notifier_register(&rmn->mn, mm);
  180. if (r)
  181. goto free_rmn;
  182. hash_add(adev->mn_hash, &rmn->node, (unsigned long)mm);
  183. release_locks:
  184. mutex_unlock(&adev->mn_lock);
  185. up_write(&mm->mmap_sem);
  186. return rmn;
  187. free_rmn:
  188. mutex_unlock(&adev->mn_lock);
  189. up_write(&mm->mmap_sem);
  190. kfree(rmn);
  191. return ERR_PTR(r);
  192. }
  193. /**
  194. * amdgpu_mn_register - register a BO for notifier updates
  195. *
  196. * @bo: amdgpu buffer object
  197. * @addr: userptr addr we should monitor
  198. *
  199. * Registers an MMU notifier for the given BO at the specified address.
  200. * Returns 0 on success, -ERRNO if anything goes wrong.
  201. */
  202. int amdgpu_mn_register(struct amdgpu_bo *bo, unsigned long addr)
  203. {
  204. unsigned long end = addr + amdgpu_bo_size(bo) - 1;
  205. struct amdgpu_device *adev = bo->adev;
  206. struct amdgpu_mn *rmn;
  207. struct amdgpu_mn_node *node = NULL;
  208. struct list_head bos;
  209. struct interval_tree_node *it;
  210. rmn = amdgpu_mn_get(adev);
  211. if (IS_ERR(rmn))
  212. return PTR_ERR(rmn);
  213. INIT_LIST_HEAD(&bos);
  214. mutex_lock(&rmn->lock);
  215. while ((it = interval_tree_iter_first(&rmn->objects, addr, end))) {
  216. kfree(node);
  217. node = container_of(it, struct amdgpu_mn_node, it);
  218. interval_tree_remove(&node->it, &rmn->objects);
  219. addr = min(it->start, addr);
  220. end = max(it->last, end);
  221. list_splice(&node->bos, &bos);
  222. }
  223. if (!node) {
  224. node = kmalloc(sizeof(struct amdgpu_mn_node), GFP_KERNEL);
  225. if (!node) {
  226. mutex_unlock(&rmn->lock);
  227. return -ENOMEM;
  228. }
  229. }
  230. bo->mn = rmn;
  231. node->it.start = addr;
  232. node->it.last = end;
  233. INIT_LIST_HEAD(&node->bos);
  234. list_splice(&bos, &node->bos);
  235. list_add(&bo->mn_list, &node->bos);
  236. interval_tree_insert(&node->it, &rmn->objects);
  237. mutex_unlock(&rmn->lock);
  238. return 0;
  239. }
  240. /**
  241. * amdgpu_mn_unregister - unregister a BO for notifier updates
  242. *
  243. * @bo: amdgpu buffer object
  244. *
  245. * Remove any registration of MMU notifier updates from the buffer object.
  246. */
  247. void amdgpu_mn_unregister(struct amdgpu_bo *bo)
  248. {
  249. struct amdgpu_device *adev = bo->adev;
  250. struct amdgpu_mn *rmn;
  251. struct list_head *head;
  252. mutex_lock(&adev->mn_lock);
  253. rmn = bo->mn;
  254. if (rmn == NULL) {
  255. mutex_unlock(&adev->mn_lock);
  256. return;
  257. }
  258. mutex_lock(&rmn->lock);
  259. /* save the next list entry for later */
  260. head = bo->mn_list.next;
  261. bo->mn = NULL;
  262. list_del(&bo->mn_list);
  263. if (list_empty(head)) {
  264. struct amdgpu_mn_node *node;
  265. node = container_of(head, struct amdgpu_mn_node, bos);
  266. interval_tree_remove(&node->it, &rmn->objects);
  267. kfree(node);
  268. }
  269. mutex_unlock(&rmn->lock);
  270. mutex_unlock(&adev->mn_lock);
  271. }