amdgpu_sync.c 9.0 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <drm/drmP.h>
  31. #include "amdgpu.h"
  32. #include "amdgpu_trace.h"
  33. struct amdgpu_sync_entry {
  34. struct hlist_node node;
  35. struct fence *fence;
  36. };
  37. /**
  38. * amdgpu_sync_create - zero init sync object
  39. *
  40. * @sync: sync object to initialize
  41. *
  42. * Just clear the sync object for now.
  43. */
  44. void amdgpu_sync_create(struct amdgpu_sync *sync)
  45. {
  46. unsigned i;
  47. for (i = 0; i < AMDGPU_NUM_SYNCS; ++i)
  48. sync->semaphores[i] = NULL;
  49. for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
  50. sync->sync_to[i] = NULL;
  51. hash_init(sync->fences);
  52. sync->last_vm_update = NULL;
  53. }
  54. static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f)
  55. {
  56. struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
  57. struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
  58. if (a_fence)
  59. return a_fence->ring->adev == adev;
  60. if (s_fence) {
  61. struct amdgpu_ring *ring;
  62. ring = container_of(s_fence->sched, struct amdgpu_ring, sched);
  63. return ring->adev == adev;
  64. }
  65. return false;
  66. }
  67. static bool amdgpu_sync_test_owner(struct fence *f, void *owner)
  68. {
  69. struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
  70. struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
  71. if (s_fence)
  72. return s_fence->owner == owner;
  73. if (a_fence)
  74. return a_fence->owner == owner;
  75. return false;
  76. }
  77. static void amdgpu_sync_keep_later(struct fence **keep, struct fence *fence)
  78. {
  79. if (*keep && fence_is_later(*keep, fence))
  80. return;
  81. fence_put(*keep);
  82. *keep = fence_get(fence);
  83. }
  84. /**
  85. * amdgpu_sync_fence - remember to sync to this fence
  86. *
  87. * @sync: sync object to add fence to
  88. * @fence: fence to sync to
  89. *
  90. */
  91. int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
  92. struct fence *f)
  93. {
  94. struct amdgpu_sync_entry *e;
  95. struct amdgpu_fence *fence;
  96. if (!f)
  97. return 0;
  98. if (amdgpu_sync_same_dev(adev, f) &&
  99. amdgpu_sync_test_owner(f, AMDGPU_FENCE_OWNER_VM))
  100. amdgpu_sync_keep_later(&sync->last_vm_update, f);
  101. fence = to_amdgpu_fence(f);
  102. if (!fence || fence->ring->adev != adev) {
  103. hash_for_each_possible(sync->fences, e, node, f->context) {
  104. if (unlikely(e->fence->context != f->context))
  105. continue;
  106. amdgpu_sync_keep_later(&e->fence, f);
  107. return 0;
  108. }
  109. e = kmalloc(sizeof(struct amdgpu_sync_entry), GFP_KERNEL);
  110. if (!e)
  111. return -ENOMEM;
  112. hash_add(sync->fences, &e->node, f->context);
  113. e->fence = fence_get(f);
  114. return 0;
  115. }
  116. amdgpu_sync_keep_later(&sync->sync_to[fence->ring->idx], f);
  117. return 0;
  118. }
  119. static void *amdgpu_sync_get_owner(struct fence *f)
  120. {
  121. struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
  122. struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
  123. if (s_fence)
  124. return s_fence->owner;
  125. else if (a_fence)
  126. return a_fence->owner;
  127. return AMDGPU_FENCE_OWNER_UNDEFINED;
  128. }
  129. /**
  130. * amdgpu_sync_resv - use the semaphores to sync to a reservation object
  131. *
  132. * @sync: sync object to add fences from reservation object to
  133. * @resv: reservation object with embedded fence
  134. * @shared: true if we should only sync to the exclusive fence
  135. *
  136. * Sync to the fence using the semaphore objects
  137. */
  138. int amdgpu_sync_resv(struct amdgpu_device *adev,
  139. struct amdgpu_sync *sync,
  140. struct reservation_object *resv,
  141. void *owner)
  142. {
  143. struct reservation_object_list *flist;
  144. struct fence *f;
  145. void *fence_owner;
  146. unsigned i;
  147. int r = 0;
  148. if (resv == NULL)
  149. return -EINVAL;
  150. /* always sync to the exclusive fence */
  151. f = reservation_object_get_excl(resv);
  152. r = amdgpu_sync_fence(adev, sync, f);
  153. flist = reservation_object_get_list(resv);
  154. if (!flist || r)
  155. return r;
  156. for (i = 0; i < flist->shared_count; ++i) {
  157. f = rcu_dereference_protected(flist->shared[i],
  158. reservation_object_held(resv));
  159. if (amdgpu_sync_same_dev(adev, f)) {
  160. /* VM updates are only interesting
  161. * for other VM updates and moves.
  162. */
  163. fence_owner = amdgpu_sync_get_owner(f);
  164. if ((owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
  165. (fence_owner != AMDGPU_FENCE_OWNER_UNDEFINED) &&
  166. ((owner == AMDGPU_FENCE_OWNER_VM) !=
  167. (fence_owner == AMDGPU_FENCE_OWNER_VM)))
  168. continue;
  169. /* Ignore fence from the same owner as
  170. * long as it isn't undefined.
  171. */
  172. if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
  173. fence_owner == owner)
  174. continue;
  175. }
  176. r = amdgpu_sync_fence(adev, sync, f);
  177. if (r)
  178. break;
  179. }
  180. return r;
  181. }
  182. struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
  183. {
  184. struct amdgpu_sync_entry *e;
  185. struct hlist_node *tmp;
  186. struct fence *f;
  187. int i;
  188. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  189. f = e->fence;
  190. hash_del(&e->node);
  191. kfree(e);
  192. if (!fence_is_signaled(f))
  193. return f;
  194. fence_put(f);
  195. }
  196. return NULL;
  197. }
  198. int amdgpu_sync_wait(struct amdgpu_sync *sync)
  199. {
  200. struct amdgpu_sync_entry *e;
  201. struct hlist_node *tmp;
  202. int i, r;
  203. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  204. r = fence_wait(e->fence, false);
  205. if (r)
  206. return r;
  207. hash_del(&e->node);
  208. fence_put(e->fence);
  209. kfree(e);
  210. }
  211. if (amdgpu_enable_semaphores)
  212. return 0;
  213. for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  214. struct fence *fence = sync->sync_to[i];
  215. if (!fence)
  216. continue;
  217. r = fence_wait(fence, false);
  218. if (r)
  219. return r;
  220. }
  221. return 0;
  222. }
  223. /**
  224. * amdgpu_sync_rings - sync ring to all registered fences
  225. *
  226. * @sync: sync object to use
  227. * @ring: ring that needs sync
  228. *
  229. * Ensure that all registered fences are signaled before letting
  230. * the ring continue. The caller must hold the ring lock.
  231. */
  232. int amdgpu_sync_rings(struct amdgpu_sync *sync,
  233. struct amdgpu_ring *ring)
  234. {
  235. struct amdgpu_device *adev = ring->adev;
  236. unsigned count = 0;
  237. int i, r;
  238. for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  239. struct amdgpu_ring *other = adev->rings[i];
  240. struct amdgpu_semaphore *semaphore;
  241. struct amdgpu_fence *fence;
  242. if (!sync->sync_to[i])
  243. continue;
  244. fence = to_amdgpu_fence(sync->sync_to[i]);
  245. /* check if we really need to sync */
  246. if (!amdgpu_enable_scheduler &&
  247. !amdgpu_fence_need_sync(fence, ring))
  248. continue;
  249. /* prevent GPU deadlocks */
  250. if (!other->ready) {
  251. dev_err(adev->dev, "Syncing to a disabled ring!");
  252. return -EINVAL;
  253. }
  254. if (amdgpu_enable_scheduler || !amdgpu_enable_semaphores) {
  255. r = fence_wait(sync->sync_to[i], true);
  256. if (r)
  257. return r;
  258. continue;
  259. }
  260. if (count >= AMDGPU_NUM_SYNCS) {
  261. /* not enough room, wait manually */
  262. r = fence_wait(&fence->base, false);
  263. if (r)
  264. return r;
  265. continue;
  266. }
  267. r = amdgpu_semaphore_create(adev, &semaphore);
  268. if (r)
  269. return r;
  270. sync->semaphores[count++] = semaphore;
  271. /* allocate enough space for sync command */
  272. r = amdgpu_ring_alloc(other, 16);
  273. if (r)
  274. return r;
  275. /* emit the signal semaphore */
  276. if (!amdgpu_semaphore_emit_signal(other, semaphore)) {
  277. /* signaling wasn't successful wait manually */
  278. amdgpu_ring_undo(other);
  279. r = fence_wait(&fence->base, false);
  280. if (r)
  281. return r;
  282. continue;
  283. }
  284. /* we assume caller has already allocated space on waiters ring */
  285. if (!amdgpu_semaphore_emit_wait(ring, semaphore)) {
  286. /* waiting wasn't successful wait manually */
  287. amdgpu_ring_undo(other);
  288. r = fence_wait(&fence->base, false);
  289. if (r)
  290. return r;
  291. continue;
  292. }
  293. amdgpu_ring_commit(other);
  294. amdgpu_fence_note_sync(fence, ring);
  295. }
  296. return 0;
  297. }
  298. /**
  299. * amdgpu_sync_free - free the sync object
  300. *
  301. * @adev: amdgpu_device pointer
  302. * @sync: sync object to use
  303. * @fence: fence to use for the free
  304. *
  305. * Free the sync object by freeing all semaphores in it.
  306. */
  307. void amdgpu_sync_free(struct amdgpu_device *adev,
  308. struct amdgpu_sync *sync,
  309. struct fence *fence)
  310. {
  311. struct amdgpu_sync_entry *e;
  312. struct hlist_node *tmp;
  313. unsigned i;
  314. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  315. hash_del(&e->node);
  316. fence_put(e->fence);
  317. kfree(e);
  318. }
  319. for (i = 0; i < AMDGPU_NUM_SYNCS; ++i)
  320. amdgpu_semaphore_free(adev, &sync->semaphores[i], fence);
  321. for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
  322. fence_put(sync->sync_to[i]);
  323. fence_put(sync->last_vm_update);
  324. }