exynos_drm_ipp.h 7.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252
  1. /*
  2. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  3. *
  4. * Authors:
  5. * Eunchul Kim <chulspro.kim@samsung.com>
  6. * Jinyoung Jeon <jy0.jeon@samsung.com>
  7. * Sangmin Lee <lsmin.lee@samsung.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #ifndef _EXYNOS_DRM_IPP_H_
  15. #define _EXYNOS_DRM_IPP_H_
  16. #define for_each_ipp_ops(pos) \
  17. for (pos = 0; pos < EXYNOS_DRM_OPS_MAX; pos++)
  18. #define for_each_ipp_planar(pos) \
  19. for (pos = 0; pos < EXYNOS_DRM_PLANAR_MAX; pos++)
  20. #define IPP_GET_LCD_WIDTH _IOR('F', 302, int)
  21. #define IPP_GET_LCD_HEIGHT _IOR('F', 303, int)
  22. #define IPP_SET_WRITEBACK _IOW('F', 304, u32)
  23. /* definition of state */
  24. enum drm_exynos_ipp_state {
  25. IPP_STATE_IDLE,
  26. IPP_STATE_START,
  27. IPP_STATE_STOP,
  28. };
  29. /*
  30. * A structure of command work information.
  31. * @work: work structure.
  32. * @ippdrv: current work ippdrv.
  33. * @c_node: command node information.
  34. * @ctrl: command control.
  35. */
  36. struct drm_exynos_ipp_cmd_work {
  37. struct work_struct work;
  38. struct exynos_drm_ippdrv *ippdrv;
  39. struct drm_exynos_ipp_cmd_node *c_node;
  40. enum drm_exynos_ipp_ctrl ctrl;
  41. };
  42. /*
  43. * A structure of command node.
  44. *
  45. * @list: list head to command queue information.
  46. * @event_list: list head of event.
  47. * @mem_list: list head to source,destination memory queue information.
  48. * @lock: lock for synchronization of access to ioctl.
  49. * @mem_lock: lock for synchronization of access to memory nodes.
  50. * @event_lock: lock for synchronization of access to scheduled event.
  51. * @start_complete: completion of start of command.
  52. * @stop_complete: completion of stop of command.
  53. * @property: property information.
  54. * @start_work: start command work structure.
  55. * @stop_work: stop command work structure.
  56. * @event_work: event work structure.
  57. * @state: state of command node.
  58. * @filp: associated file pointer.
  59. */
  60. struct drm_exynos_ipp_cmd_node {
  61. struct list_head list;
  62. struct list_head event_list;
  63. struct list_head mem_list[EXYNOS_DRM_OPS_MAX];
  64. struct mutex lock;
  65. struct mutex mem_lock;
  66. struct mutex event_lock;
  67. struct completion start_complete;
  68. struct completion stop_complete;
  69. struct drm_exynos_ipp_property property;
  70. struct drm_exynos_ipp_cmd_work *start_work;
  71. struct drm_exynos_ipp_cmd_work *stop_work;
  72. struct drm_exynos_ipp_event_work *event_work;
  73. enum drm_exynos_ipp_state state;
  74. struct drm_file *filp;
  75. };
  76. /*
  77. * A structure of buffer information.
  78. *
  79. * @handles: Y, Cb, Cr each gem object handle.
  80. * @base: Y, Cb, Cr each planar address.
  81. */
  82. struct drm_exynos_ipp_buf_info {
  83. unsigned long handles[EXYNOS_DRM_PLANAR_MAX];
  84. dma_addr_t base[EXYNOS_DRM_PLANAR_MAX];
  85. };
  86. /*
  87. * A structure of wb setting information.
  88. *
  89. * @enable: enable flag for wb.
  90. * @refresh: HZ of the refresh rate.
  91. */
  92. struct drm_exynos_ipp_set_wb {
  93. __u32 enable;
  94. __u32 refresh;
  95. };
  96. /*
  97. * A structure of event work information.
  98. *
  99. * @work: work structure.
  100. * @ippdrv: current work ippdrv.
  101. * @buf_id: id of src, dst buffer.
  102. */
  103. struct drm_exynos_ipp_event_work {
  104. struct work_struct work;
  105. struct exynos_drm_ippdrv *ippdrv;
  106. u32 buf_id[EXYNOS_DRM_OPS_MAX];
  107. };
  108. /*
  109. * A structure of source,destination operations.
  110. *
  111. * @set_fmt: set format of image.
  112. * @set_transf: set transform(rotations, flip).
  113. * @set_size: set size of region.
  114. * @set_addr: set address for dma.
  115. */
  116. struct exynos_drm_ipp_ops {
  117. int (*set_fmt)(struct device *dev, u32 fmt);
  118. int (*set_transf)(struct device *dev,
  119. enum drm_exynos_degree degree,
  120. enum drm_exynos_flip flip, bool *swap);
  121. int (*set_size)(struct device *dev, int swap,
  122. struct drm_exynos_pos *pos, struct drm_exynos_sz *sz);
  123. int (*set_addr)(struct device *dev,
  124. struct drm_exynos_ipp_buf_info *buf_info, u32 buf_id,
  125. enum drm_exynos_ipp_buf_type buf_type);
  126. };
  127. /*
  128. * A structure of ipp driver.
  129. *
  130. * @drv_list: list head for registed sub driver information.
  131. * @parent_dev: parent device information.
  132. * @dev: platform device.
  133. * @drm_dev: drm device.
  134. * @dedicated: dedicated ipp device.
  135. * @ops: source, destination operations.
  136. * @event_workq: event work queue.
  137. * @c_node: current command information.
  138. * @cmd_list: list head for command information.
  139. * @cmd_lock: lock for synchronization of access to cmd_list.
  140. * @prop_list: property informations of current ipp driver.
  141. * @check_property: check property about format, size, buffer.
  142. * @reset: reset ipp block.
  143. * @start: ipp each device start.
  144. * @stop: ipp each device stop.
  145. * @sched_event: work schedule handler.
  146. */
  147. struct exynos_drm_ippdrv {
  148. struct list_head drv_list;
  149. struct device *parent_dev;
  150. struct device *dev;
  151. struct drm_device *drm_dev;
  152. bool dedicated;
  153. struct exynos_drm_ipp_ops *ops[EXYNOS_DRM_OPS_MAX];
  154. struct workqueue_struct *event_workq;
  155. struct drm_exynos_ipp_cmd_node *c_node;
  156. struct list_head cmd_list;
  157. struct mutex cmd_lock;
  158. struct drm_exynos_ipp_prop_list prop_list;
  159. int (*check_property)(struct device *dev,
  160. struct drm_exynos_ipp_property *property);
  161. int (*reset)(struct device *dev);
  162. int (*start)(struct device *dev, enum drm_exynos_ipp_cmd cmd);
  163. void (*stop)(struct device *dev, enum drm_exynos_ipp_cmd cmd);
  164. void (*sched_event)(struct work_struct *work);
  165. };
  166. #ifdef CONFIG_DRM_EXYNOS_IPP
  167. extern int exynos_drm_ippdrv_register(struct exynos_drm_ippdrv *ippdrv);
  168. extern int exynos_drm_ippdrv_unregister(struct exynos_drm_ippdrv *ippdrv);
  169. extern int exynos_drm_ipp_get_property(struct drm_device *drm_dev, void *data,
  170. struct drm_file *file);
  171. extern int exynos_drm_ipp_set_property(struct drm_device *drm_dev, void *data,
  172. struct drm_file *file);
  173. extern int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev, void *data,
  174. struct drm_file *file);
  175. extern int exynos_drm_ipp_cmd_ctrl(struct drm_device *drm_dev, void *data,
  176. struct drm_file *file);
  177. extern int exynos_drm_ippnb_register(struct notifier_block *nb);
  178. extern int exynos_drm_ippnb_unregister(struct notifier_block *nb);
  179. extern int exynos_drm_ippnb_send_event(unsigned long val, void *v);
  180. extern void ipp_sched_cmd(struct work_struct *work);
  181. extern void ipp_sched_event(struct work_struct *work);
  182. #else
  183. static inline int exynos_drm_ippdrv_register(struct exynos_drm_ippdrv *ippdrv)
  184. {
  185. return -ENODEV;
  186. }
  187. static inline int exynos_drm_ippdrv_unregister(struct exynos_drm_ippdrv *ippdrv)
  188. {
  189. return -ENODEV;
  190. }
  191. static inline int exynos_drm_ipp_get_property(struct drm_device *drm_dev,
  192. void *data,
  193. struct drm_file *file_priv)
  194. {
  195. return -ENOTTY;
  196. }
  197. static inline int exynos_drm_ipp_set_property(struct drm_device *drm_dev,
  198. void *data,
  199. struct drm_file *file_priv)
  200. {
  201. return -ENOTTY;
  202. }
  203. static inline int exynos_drm_ipp_queue_buf(struct drm_device *drm_dev,
  204. void *data,
  205. struct drm_file *file)
  206. {
  207. return -ENOTTY;
  208. }
  209. static inline int exynos_drm_ipp_cmd_ctrl(struct drm_device *drm_dev,
  210. void *data,
  211. struct drm_file *file)
  212. {
  213. return -ENOTTY;
  214. }
  215. static inline int exynos_drm_ippnb_register(struct notifier_block *nb)
  216. {
  217. return -ENODEV;
  218. }
  219. static inline int exynos_drm_ippnb_unregister(struct notifier_block *nb)
  220. {
  221. return -ENODEV;
  222. }
  223. static inline int exynos_drm_ippnb_send_event(unsigned long val, void *v)
  224. {
  225. return -ENOTTY;
  226. }
  227. #endif
  228. #endif /* _EXYNOS_DRM_IPP_H_ */