intel_lrc.h 4.1 KB

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  1. /*
  2. * Copyright © 2014 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. */
  23. #ifndef _INTEL_LRC_H_
  24. #define _INTEL_LRC_H_
  25. #define GEN8_LR_CONTEXT_ALIGN 4096
  26. #define GEN8_CSB_ENTRIES 6
  27. #define GEN8_CSB_PTR_MASK 0x07
  28. /* Execlists regs */
  29. #define RING_ELSP(ring) ((ring)->mmio_base+0x230)
  30. #define RING_EXECLIST_STATUS_LO(ring) ((ring)->mmio_base+0x234)
  31. #define RING_EXECLIST_STATUS_HI(ring) ((ring)->mmio_base+0x234 + 4)
  32. #define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244)
  33. #define CTX_CTRL_INHIBIT_SYN_CTX_SWITCH (1 << 3)
  34. #define CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT (1 << 0)
  35. #define CTX_CTRL_RS_CTX_ENABLE (1 << 1)
  36. #define RING_CONTEXT_STATUS_BUF_LO(ring, i) ((ring)->mmio_base+0x370 + (i) * 8)
  37. #define RING_CONTEXT_STATUS_BUF_HI(ring, i) ((ring)->mmio_base+0x370 + (i) * 8 + 4)
  38. #define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0)
  39. /* Logical Rings */
  40. int intel_logical_ring_alloc_request_extras(struct drm_i915_gem_request *request);
  41. int intel_logical_ring_reserve_space(struct drm_i915_gem_request *request);
  42. void intel_logical_ring_stop(struct intel_engine_cs *ring);
  43. void intel_logical_ring_cleanup(struct intel_engine_cs *ring);
  44. int intel_logical_rings_init(struct drm_device *dev);
  45. int intel_logical_ring_begin(struct drm_i915_gem_request *req, int num_dwords);
  46. int logical_ring_flush_all_caches(struct drm_i915_gem_request *req);
  47. /**
  48. * intel_logical_ring_advance() - advance the ringbuffer tail
  49. * @ringbuf: Ringbuffer to advance.
  50. *
  51. * The tail is only updated in our logical ringbuffer struct.
  52. */
  53. static inline void intel_logical_ring_advance(struct intel_ringbuffer *ringbuf)
  54. {
  55. ringbuf->tail &= ringbuf->size - 1;
  56. }
  57. /**
  58. * intel_logical_ring_emit() - write a DWORD to the ringbuffer.
  59. * @ringbuf: Ringbuffer to write to.
  60. * @data: DWORD to write.
  61. */
  62. static inline void intel_logical_ring_emit(struct intel_ringbuffer *ringbuf,
  63. u32 data)
  64. {
  65. iowrite32(data, ringbuf->virtual_start + ringbuf->tail);
  66. ringbuf->tail += 4;
  67. }
  68. /* Logical Ring Contexts */
  69. /* One extra page is added before LRC for GuC as shared data */
  70. #define LRC_GUCSHR_PN (0)
  71. #define LRC_PPHWSP_PN (LRC_GUCSHR_PN + 1)
  72. #define LRC_STATE_PN (LRC_PPHWSP_PN + 1)
  73. void intel_lr_context_free(struct intel_context *ctx);
  74. int intel_lr_context_deferred_alloc(struct intel_context *ctx,
  75. struct intel_engine_cs *ring);
  76. void intel_lr_context_unpin(struct drm_i915_gem_request *req);
  77. void intel_lr_context_reset(struct drm_device *dev,
  78. struct intel_context *ctx);
  79. uint64_t intel_lr_context_descriptor(struct intel_context *ctx,
  80. struct intel_engine_cs *ring);
  81. /* Execlists */
  82. int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists);
  83. struct i915_execbuffer_params;
  84. int intel_execlists_submission(struct i915_execbuffer_params *params,
  85. struct drm_i915_gem_execbuffer2 *args,
  86. struct list_head *vmas);
  87. u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
  88. void intel_lrc_irq_handler(struct intel_engine_cs *ring);
  89. void intel_execlists_retire_requests(struct intel_engine_cs *ring);
  90. #endif /* _INTEL_LRC_H_ */