hdmi_bridge.c 6.1 KB

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  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include "hdmi.h"
  18. struct hdmi_bridge {
  19. struct drm_bridge base;
  20. struct hdmi *hdmi;
  21. };
  22. #define to_hdmi_bridge(x) container_of(x, struct hdmi_bridge, base)
  23. void hdmi_bridge_destroy(struct drm_bridge *bridge)
  24. {
  25. }
  26. static void power_on(struct drm_bridge *bridge)
  27. {
  28. struct drm_device *dev = bridge->dev;
  29. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  30. struct hdmi *hdmi = hdmi_bridge->hdmi;
  31. const struct hdmi_platform_config *config = hdmi->config;
  32. int i, ret;
  33. for (i = 0; i < config->pwr_reg_cnt; i++) {
  34. ret = regulator_enable(hdmi->pwr_regs[i]);
  35. if (ret) {
  36. dev_err(dev->dev, "failed to enable pwr regulator: %s (%d)\n",
  37. config->pwr_reg_names[i], ret);
  38. }
  39. }
  40. if (config->pwr_clk_cnt > 0) {
  41. DBG("pixclock: %lu", hdmi->pixclock);
  42. ret = clk_set_rate(hdmi->pwr_clks[0], hdmi->pixclock);
  43. if (ret) {
  44. dev_err(dev->dev, "failed to set pixel clk: %s (%d)\n",
  45. config->pwr_clk_names[0], ret);
  46. }
  47. }
  48. for (i = 0; i < config->pwr_clk_cnt; i++) {
  49. ret = clk_prepare_enable(hdmi->pwr_clks[i]);
  50. if (ret) {
  51. dev_err(dev->dev, "failed to enable pwr clk: %s (%d)\n",
  52. config->pwr_clk_names[i], ret);
  53. }
  54. }
  55. }
  56. static void power_off(struct drm_bridge *bridge)
  57. {
  58. struct drm_device *dev = bridge->dev;
  59. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  60. struct hdmi *hdmi = hdmi_bridge->hdmi;
  61. const struct hdmi_platform_config *config = hdmi->config;
  62. int i, ret;
  63. /* TODO do we need to wait for final vblank somewhere before
  64. * cutting the clocks?
  65. */
  66. mdelay(16 + 4);
  67. for (i = 0; i < config->pwr_clk_cnt; i++)
  68. clk_disable_unprepare(hdmi->pwr_clks[i]);
  69. for (i = 0; i < config->pwr_reg_cnt; i++) {
  70. ret = regulator_disable(hdmi->pwr_regs[i]);
  71. if (ret) {
  72. dev_err(dev->dev, "failed to disable pwr regulator: %s (%d)\n",
  73. config->pwr_reg_names[i], ret);
  74. }
  75. }
  76. }
  77. static void hdmi_bridge_pre_enable(struct drm_bridge *bridge)
  78. {
  79. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  80. struct hdmi *hdmi = hdmi_bridge->hdmi;
  81. struct hdmi_phy *phy = hdmi->phy;
  82. DBG("power up");
  83. if (!hdmi->power_on) {
  84. power_on(bridge);
  85. hdmi->power_on = true;
  86. hdmi_audio_update(hdmi);
  87. }
  88. if (phy)
  89. phy->funcs->powerup(phy, hdmi->pixclock);
  90. hdmi_set_mode(hdmi, true);
  91. if (hdmi->hdcp_ctrl)
  92. hdmi_hdcp_on(hdmi->hdcp_ctrl);
  93. }
  94. static void hdmi_bridge_enable(struct drm_bridge *bridge)
  95. {
  96. }
  97. static void hdmi_bridge_disable(struct drm_bridge *bridge)
  98. {
  99. }
  100. static void hdmi_bridge_post_disable(struct drm_bridge *bridge)
  101. {
  102. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  103. struct hdmi *hdmi = hdmi_bridge->hdmi;
  104. struct hdmi_phy *phy = hdmi->phy;
  105. if (hdmi->hdcp_ctrl)
  106. hdmi_hdcp_off(hdmi->hdcp_ctrl);
  107. DBG("power down");
  108. hdmi_set_mode(hdmi, false);
  109. if (phy)
  110. phy->funcs->powerdown(phy);
  111. if (hdmi->power_on) {
  112. power_off(bridge);
  113. hdmi->power_on = false;
  114. hdmi_audio_update(hdmi);
  115. }
  116. }
  117. static void hdmi_bridge_mode_set(struct drm_bridge *bridge,
  118. struct drm_display_mode *mode,
  119. struct drm_display_mode *adjusted_mode)
  120. {
  121. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  122. struct hdmi *hdmi = hdmi_bridge->hdmi;
  123. int hstart, hend, vstart, vend;
  124. uint32_t frame_ctrl;
  125. mode = adjusted_mode;
  126. hdmi->pixclock = mode->clock * 1000;
  127. hstart = mode->htotal - mode->hsync_start;
  128. hend = mode->htotal - mode->hsync_start + mode->hdisplay;
  129. vstart = mode->vtotal - mode->vsync_start - 1;
  130. vend = mode->vtotal - mode->vsync_start + mode->vdisplay - 1;
  131. DBG("htotal=%d, vtotal=%d, hstart=%d, hend=%d, vstart=%d, vend=%d",
  132. mode->htotal, mode->vtotal, hstart, hend, vstart, vend);
  133. hdmi_write(hdmi, REG_HDMI_TOTAL,
  134. HDMI_TOTAL_H_TOTAL(mode->htotal - 1) |
  135. HDMI_TOTAL_V_TOTAL(mode->vtotal - 1));
  136. hdmi_write(hdmi, REG_HDMI_ACTIVE_HSYNC,
  137. HDMI_ACTIVE_HSYNC_START(hstart) |
  138. HDMI_ACTIVE_HSYNC_END(hend));
  139. hdmi_write(hdmi, REG_HDMI_ACTIVE_VSYNC,
  140. HDMI_ACTIVE_VSYNC_START(vstart) |
  141. HDMI_ACTIVE_VSYNC_END(vend));
  142. if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
  143. hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
  144. HDMI_VSYNC_TOTAL_F2_V_TOTAL(mode->vtotal));
  145. hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
  146. HDMI_VSYNC_ACTIVE_F2_START(vstart + 1) |
  147. HDMI_VSYNC_ACTIVE_F2_END(vend + 1));
  148. } else {
  149. hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
  150. HDMI_VSYNC_TOTAL_F2_V_TOTAL(0));
  151. hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
  152. HDMI_VSYNC_ACTIVE_F2_START(0) |
  153. HDMI_VSYNC_ACTIVE_F2_END(0));
  154. }
  155. frame_ctrl = 0;
  156. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  157. frame_ctrl |= HDMI_FRAME_CTRL_HSYNC_LOW;
  158. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  159. frame_ctrl |= HDMI_FRAME_CTRL_VSYNC_LOW;
  160. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  161. frame_ctrl |= HDMI_FRAME_CTRL_INTERLACED_EN;
  162. DBG("frame_ctrl=%08x", frame_ctrl);
  163. hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl);
  164. hdmi_audio_update(hdmi);
  165. }
  166. static const struct drm_bridge_funcs hdmi_bridge_funcs = {
  167. .pre_enable = hdmi_bridge_pre_enable,
  168. .enable = hdmi_bridge_enable,
  169. .disable = hdmi_bridge_disable,
  170. .post_disable = hdmi_bridge_post_disable,
  171. .mode_set = hdmi_bridge_mode_set,
  172. };
  173. /* initialize bridge */
  174. struct drm_bridge *hdmi_bridge_init(struct hdmi *hdmi)
  175. {
  176. struct drm_bridge *bridge = NULL;
  177. struct hdmi_bridge *hdmi_bridge;
  178. int ret;
  179. hdmi_bridge = devm_kzalloc(hdmi->dev->dev,
  180. sizeof(*hdmi_bridge), GFP_KERNEL);
  181. if (!hdmi_bridge) {
  182. ret = -ENOMEM;
  183. goto fail;
  184. }
  185. hdmi_bridge->hdmi = hdmi;
  186. bridge = &hdmi_bridge->base;
  187. bridge->funcs = &hdmi_bridge_funcs;
  188. ret = drm_bridge_attach(hdmi->dev, bridge);
  189. if (ret)
  190. goto fail;
  191. return bridge;
  192. fail:
  193. if (bridge)
  194. hdmi_bridge_destroy(bridge);
  195. return ERR_PTR(ret);
  196. }