cursor.c 2.1 KB

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  1. #include <drm/drmP.h>
  2. #include <drm/drm_mode.h>
  3. #include "nouveau_drm.h"
  4. #include "nouveau_reg.h"
  5. #include "nouveau_crtc.h"
  6. #include "hw.h"
  7. static void
  8. nv04_cursor_show(struct nouveau_crtc *nv_crtc, bool update)
  9. {
  10. nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, true);
  11. }
  12. static void
  13. nv04_cursor_hide(struct nouveau_crtc *nv_crtc, bool update)
  14. {
  15. nv_show_cursor(nv_crtc->base.dev, nv_crtc->index, false);
  16. }
  17. static void
  18. nv04_cursor_set_pos(struct nouveau_crtc *nv_crtc, int x, int y)
  19. {
  20. nv_crtc->cursor_saved_x = x; nv_crtc->cursor_saved_y = y;
  21. NVWriteRAMDAC(nv_crtc->base.dev, nv_crtc->index,
  22. NV_PRAMDAC_CU_START_POS,
  23. XLATE(y, 0, NV_PRAMDAC_CU_START_POS_Y) |
  24. XLATE(x, 0, NV_PRAMDAC_CU_START_POS_X));
  25. }
  26. static void
  27. crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index)
  28. {
  29. NVWriteVgaCrtc(crtc->dev, nouveau_crtc(crtc)->index, index,
  30. crtcstate->CRTC[index]);
  31. }
  32. static void
  33. nv04_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset)
  34. {
  35. struct drm_device *dev = nv_crtc->base.dev;
  36. struct nouveau_drm *drm = nouveau_drm(dev);
  37. struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
  38. struct drm_crtc *crtc = &nv_crtc->base;
  39. regp->CRTC[NV_CIO_CRE_HCUR_ADDR0_INDEX] =
  40. MASK(NV_CIO_CRE_HCUR_ASI) |
  41. XLATE(offset, 17, NV_CIO_CRE_HCUR_ADDR0_ADR);
  42. regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] =
  43. XLATE(offset, 11, NV_CIO_CRE_HCUR_ADDR1_ADR);
  44. if (crtc->mode.flags & DRM_MODE_FLAG_DBLSCAN)
  45. regp->CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX] |=
  46. MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL);
  47. regp->CRTC[NV_CIO_CRE_HCUR_ADDR2_INDEX] = offset >> 24;
  48. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);
  49. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);
  50. crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);
  51. if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE)
  52. nv_fix_nv40_hw_cursor(dev, nv_crtc->index);
  53. }
  54. int
  55. nv04_cursor_init(struct nouveau_crtc *crtc)
  56. {
  57. crtc->cursor.set_offset = nv04_cursor_set_offset;
  58. crtc->cursor.set_pos = nv04_cursor_set_pos;
  59. crtc->cursor.hide = nv04_cursor_hide;
  60. crtc->cursor.show = nv04_cursor_show;
  61. return 0;
  62. }