nouveau_drm.c 28 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/delay.h>
  26. #include <linux/module.h>
  27. #include <linux/pci.h>
  28. #include <linux/pm_runtime.h>
  29. #include <linux/vga_switcheroo.h>
  30. #include "drmP.h"
  31. #include "drm_crtc_helper.h"
  32. #include <core/gpuobj.h>
  33. #include <core/option.h>
  34. #include <core/pci.h>
  35. #include <core/tegra.h>
  36. #include "nouveau_drm.h"
  37. #include "nouveau_dma.h"
  38. #include "nouveau_ttm.h"
  39. #include "nouveau_gem.h"
  40. #include "nouveau_vga.h"
  41. #include "nouveau_sysfs.h"
  42. #include "nouveau_hwmon.h"
  43. #include "nouveau_acpi.h"
  44. #include "nouveau_bios.h"
  45. #include "nouveau_ioctl.h"
  46. #include "nouveau_abi16.h"
  47. #include "nouveau_fbcon.h"
  48. #include "nouveau_fence.h"
  49. #include "nouveau_debugfs.h"
  50. #include "nouveau_usif.h"
  51. #include "nouveau_connector.h"
  52. #include "nouveau_platform.h"
  53. MODULE_PARM_DESC(config, "option string to pass to driver core");
  54. static char *nouveau_config;
  55. module_param_named(config, nouveau_config, charp, 0400);
  56. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  57. static char *nouveau_debug;
  58. module_param_named(debug, nouveau_debug, charp, 0400);
  59. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  60. static int nouveau_noaccel = 0;
  61. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  62. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  63. "0 = disabled, 1 = enabled, 2 = headless)");
  64. int nouveau_modeset = -1;
  65. module_param_named(modeset, nouveau_modeset, int, 0400);
  66. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  67. int nouveau_runtime_pm = -1;
  68. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  69. static struct drm_driver driver_stub;
  70. static struct drm_driver driver_pci;
  71. static struct drm_driver driver_platform;
  72. static u64
  73. nouveau_pci_name(struct pci_dev *pdev)
  74. {
  75. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  76. name |= pdev->bus->number << 16;
  77. name |= PCI_SLOT(pdev->devfn) << 8;
  78. return name | PCI_FUNC(pdev->devfn);
  79. }
  80. static u64
  81. nouveau_platform_name(struct platform_device *platformdev)
  82. {
  83. return platformdev->id;
  84. }
  85. static u64
  86. nouveau_name(struct drm_device *dev)
  87. {
  88. if (dev->pdev)
  89. return nouveau_pci_name(dev->pdev);
  90. else
  91. return nouveau_platform_name(dev->platformdev);
  92. }
  93. static int
  94. nouveau_cli_create(struct drm_device *dev, const char *sname,
  95. int size, void **pcli)
  96. {
  97. struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
  98. int ret;
  99. if (cli) {
  100. snprintf(cli->name, sizeof(cli->name), "%s", sname);
  101. cli->dev = dev;
  102. ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
  103. nouveau_config, nouveau_debug,
  104. &cli->base);
  105. if (ret == 0) {
  106. mutex_init(&cli->mutex);
  107. usif_client_init(cli);
  108. }
  109. return ret;
  110. }
  111. return -ENOMEM;
  112. }
  113. static void
  114. nouveau_cli_destroy(struct nouveau_cli *cli)
  115. {
  116. nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
  117. nvif_client_fini(&cli->base);
  118. usif_client_fini(cli);
  119. kfree(cli);
  120. }
  121. static void
  122. nouveau_accel_fini(struct nouveau_drm *drm)
  123. {
  124. nouveau_channel_idle(drm->channel);
  125. nvif_object_fini(&drm->ntfy);
  126. nvkm_gpuobj_del(&drm->notify);
  127. nvif_notify_fini(&drm->flip);
  128. nvif_object_fini(&drm->nvsw);
  129. nouveau_channel_del(&drm->channel);
  130. nouveau_channel_idle(drm->cechan);
  131. nvif_object_fini(&drm->ttm.copy);
  132. nouveau_channel_del(&drm->cechan);
  133. if (drm->fence)
  134. nouveau_fence(drm)->dtor(drm);
  135. }
  136. static void
  137. nouveau_accel_init(struct nouveau_drm *drm)
  138. {
  139. struct nvif_device *device = &drm->device;
  140. struct nvif_sclass *sclass;
  141. u32 arg0, arg1;
  142. int ret, i, n;
  143. if (nouveau_noaccel)
  144. return;
  145. /* initialise synchronisation routines */
  146. /*XXX: this is crap, but the fence/channel stuff is a little
  147. * backwards in some places. this will be fixed.
  148. */
  149. ret = n = nvif_object_sclass_get(&device->object, &sclass);
  150. if (ret < 0)
  151. return;
  152. for (ret = -ENOSYS, i = 0; i < n; i++) {
  153. switch (sclass[i].oclass) {
  154. case NV03_CHANNEL_DMA:
  155. ret = nv04_fence_create(drm);
  156. break;
  157. case NV10_CHANNEL_DMA:
  158. ret = nv10_fence_create(drm);
  159. break;
  160. case NV17_CHANNEL_DMA:
  161. case NV40_CHANNEL_DMA:
  162. ret = nv17_fence_create(drm);
  163. break;
  164. case NV50_CHANNEL_GPFIFO:
  165. ret = nv50_fence_create(drm);
  166. break;
  167. case G82_CHANNEL_GPFIFO:
  168. ret = nv84_fence_create(drm);
  169. break;
  170. case FERMI_CHANNEL_GPFIFO:
  171. case KEPLER_CHANNEL_GPFIFO_A:
  172. case MAXWELL_CHANNEL_GPFIFO_A:
  173. ret = nvc0_fence_create(drm);
  174. break;
  175. default:
  176. break;
  177. }
  178. }
  179. nvif_object_sclass_put(&sclass);
  180. if (ret) {
  181. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  182. nouveau_accel_fini(drm);
  183. return;
  184. }
  185. if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
  186. ret = nouveau_channel_new(drm, &drm->device,
  187. KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
  188. KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
  189. 0, &drm->cechan);
  190. if (ret)
  191. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  192. arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
  193. arg1 = 1;
  194. } else
  195. if (device->info.chipset >= 0xa3 &&
  196. device->info.chipset != 0xaa &&
  197. device->info.chipset != 0xac) {
  198. ret = nouveau_channel_new(drm, &drm->device,
  199. NvDmaFB, NvDmaTT, &drm->cechan);
  200. if (ret)
  201. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  202. arg0 = NvDmaFB;
  203. arg1 = NvDmaTT;
  204. } else {
  205. arg0 = NvDmaFB;
  206. arg1 = NvDmaTT;
  207. }
  208. ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
  209. if (ret) {
  210. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  211. nouveau_accel_fini(drm);
  212. return;
  213. }
  214. ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
  215. nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
  216. if (ret == 0) {
  217. ret = RING_SPACE(drm->channel, 2);
  218. if (ret == 0) {
  219. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  220. BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
  221. OUT_RING (drm->channel, NVDRM_NVSW);
  222. } else
  223. if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
  224. BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
  225. OUT_RING (drm->channel, 0x001f0000);
  226. }
  227. }
  228. ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
  229. false, NVSW_NTFY_UEVENT, NULL, 0, 0,
  230. &drm->flip);
  231. if (ret == 0)
  232. ret = nvif_notify_get(&drm->flip);
  233. if (ret) {
  234. nouveau_accel_fini(drm);
  235. return;
  236. }
  237. }
  238. if (ret) {
  239. NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
  240. nouveau_accel_fini(drm);
  241. return;
  242. }
  243. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  244. ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
  245. NULL, &drm->notify);
  246. if (ret) {
  247. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  248. nouveau_accel_fini(drm);
  249. return;
  250. }
  251. ret = nvif_object_init(&drm->channel->user, NvNotify0,
  252. NV_DMA_IN_MEMORY,
  253. &(struct nv_dma_v0) {
  254. .target = NV_DMA_V0_TARGET_VRAM,
  255. .access = NV_DMA_V0_ACCESS_RDWR,
  256. .start = drm->notify->addr,
  257. .limit = drm->notify->addr + 31
  258. }, sizeof(struct nv_dma_v0),
  259. &drm->ntfy);
  260. if (ret) {
  261. nouveau_accel_fini(drm);
  262. return;
  263. }
  264. }
  265. nouveau_bo_move_init(drm);
  266. }
  267. static int nouveau_drm_probe(struct pci_dev *pdev,
  268. const struct pci_device_id *pent)
  269. {
  270. struct nvkm_device *device;
  271. struct apertures_struct *aper;
  272. bool boot = false;
  273. int ret;
  274. /* We need to check that the chipset is supported before booting
  275. * fbdev off the hardware, as there's no way to put it back.
  276. */
  277. ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device);
  278. if (ret)
  279. return ret;
  280. nvkm_device_del(&device);
  281. /* Remove conflicting drivers (vesafb, efifb etc). */
  282. aper = alloc_apertures(3);
  283. if (!aper)
  284. return -ENOMEM;
  285. aper->ranges[0].base = pci_resource_start(pdev, 1);
  286. aper->ranges[0].size = pci_resource_len(pdev, 1);
  287. aper->count = 1;
  288. if (pci_resource_len(pdev, 2)) {
  289. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  290. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  291. aper->count++;
  292. }
  293. if (pci_resource_len(pdev, 3)) {
  294. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  295. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  296. aper->count++;
  297. }
  298. #ifdef CONFIG_X86
  299. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  300. #endif
  301. if (nouveau_modeset != 2)
  302. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  303. kfree(aper);
  304. ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
  305. true, true, ~0ULL, &device);
  306. if (ret)
  307. return ret;
  308. pci_set_master(pdev);
  309. ret = drm_get_pci_dev(pdev, pent, &driver_pci);
  310. if (ret) {
  311. nvkm_device_del(&device);
  312. return ret;
  313. }
  314. return 0;
  315. }
  316. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  317. static void
  318. nouveau_get_hdmi_dev(struct nouveau_drm *drm)
  319. {
  320. struct pci_dev *pdev = drm->dev->pdev;
  321. if (!pdev) {
  322. DRM_INFO("not a PCI device; no HDMI\n");
  323. drm->hdmi_device = NULL;
  324. return;
  325. }
  326. /* subfunction one is a hdmi audio device? */
  327. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  328. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  329. if (!drm->hdmi_device) {
  330. NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  331. return;
  332. }
  333. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  334. NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
  335. pci_dev_put(drm->hdmi_device);
  336. drm->hdmi_device = NULL;
  337. return;
  338. }
  339. }
  340. static int
  341. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  342. {
  343. struct nouveau_drm *drm;
  344. int ret;
  345. ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
  346. if (ret)
  347. return ret;
  348. dev->dev_private = drm;
  349. drm->dev = dev;
  350. nvxx_client(&drm->client.base)->debug =
  351. nvkm_dbgopt(nouveau_debug, "DRM");
  352. INIT_LIST_HEAD(&drm->clients);
  353. spin_lock_init(&drm->tile.lock);
  354. nouveau_get_hdmi_dev(drm);
  355. ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
  356. &(struct nv_device_v0) {
  357. .device = ~0,
  358. }, sizeof(struct nv_device_v0),
  359. &drm->device);
  360. if (ret)
  361. goto fail_device;
  362. dev->irq_enabled = true;
  363. /* workaround an odd issue on nvc1 by disabling the device's
  364. * nosnoop capability. hopefully won't cause issues until a
  365. * better fix is found - assuming there is one...
  366. */
  367. if (drm->device.info.chipset == 0xc1)
  368. nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
  369. nouveau_vga_init(drm);
  370. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  371. ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
  372. 0x1000, NULL, &drm->client.vm);
  373. if (ret)
  374. goto fail_device;
  375. nvxx_client(&drm->client.base)->vm = drm->client.vm;
  376. }
  377. ret = nouveau_ttm_init(drm);
  378. if (ret)
  379. goto fail_ttm;
  380. ret = nouveau_bios_init(dev);
  381. if (ret)
  382. goto fail_bios;
  383. ret = nouveau_display_create(dev);
  384. if (ret)
  385. goto fail_dispctor;
  386. if (dev->mode_config.num_crtc) {
  387. ret = nouveau_display_init(dev);
  388. if (ret)
  389. goto fail_dispinit;
  390. }
  391. nouveau_sysfs_init(dev);
  392. nouveau_hwmon_init(dev);
  393. nouveau_accel_init(drm);
  394. nouveau_fbcon_init(dev);
  395. if (nouveau_runtime_pm != 0) {
  396. pm_runtime_use_autosuspend(dev->dev);
  397. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  398. pm_runtime_set_active(dev->dev);
  399. pm_runtime_allow(dev->dev);
  400. pm_runtime_mark_last_busy(dev->dev);
  401. pm_runtime_put(dev->dev);
  402. }
  403. return 0;
  404. fail_dispinit:
  405. nouveau_display_destroy(dev);
  406. fail_dispctor:
  407. nouveau_bios_takedown(dev);
  408. fail_bios:
  409. nouveau_ttm_fini(drm);
  410. fail_ttm:
  411. nouveau_vga_fini(drm);
  412. fail_device:
  413. nvif_device_fini(&drm->device);
  414. nouveau_cli_destroy(&drm->client);
  415. return ret;
  416. }
  417. static int
  418. nouveau_drm_unload(struct drm_device *dev)
  419. {
  420. struct nouveau_drm *drm = nouveau_drm(dev);
  421. pm_runtime_get_sync(dev->dev);
  422. nouveau_fbcon_fini(dev);
  423. nouveau_accel_fini(drm);
  424. nouveau_hwmon_fini(dev);
  425. nouveau_sysfs_fini(dev);
  426. if (dev->mode_config.num_crtc)
  427. nouveau_display_fini(dev);
  428. nouveau_display_destroy(dev);
  429. nouveau_bios_takedown(dev);
  430. nouveau_ttm_fini(drm);
  431. nouveau_vga_fini(drm);
  432. nvif_device_fini(&drm->device);
  433. if (drm->hdmi_device)
  434. pci_dev_put(drm->hdmi_device);
  435. nouveau_cli_destroy(&drm->client);
  436. return 0;
  437. }
  438. void
  439. nouveau_drm_device_remove(struct drm_device *dev)
  440. {
  441. struct nouveau_drm *drm = nouveau_drm(dev);
  442. struct nvkm_client *client;
  443. struct nvkm_device *device;
  444. dev->irq_enabled = false;
  445. client = nvxx_client(&drm->client.base);
  446. device = nvkm_device_find(client->device);
  447. drm_put_dev(dev);
  448. nvkm_device_del(&device);
  449. }
  450. static void
  451. nouveau_drm_remove(struct pci_dev *pdev)
  452. {
  453. struct drm_device *dev = pci_get_drvdata(pdev);
  454. nouveau_drm_device_remove(dev);
  455. }
  456. static int
  457. nouveau_do_suspend(struct drm_device *dev, bool runtime)
  458. {
  459. struct nouveau_drm *drm = nouveau_drm(dev);
  460. struct nouveau_cli *cli;
  461. int ret;
  462. if (dev->mode_config.num_crtc) {
  463. NV_INFO(drm, "suspending console...\n");
  464. nouveau_fbcon_set_suspend(dev, 1);
  465. NV_INFO(drm, "suspending display...\n");
  466. ret = nouveau_display_suspend(dev, runtime);
  467. if (ret)
  468. return ret;
  469. }
  470. NV_INFO(drm, "evicting buffers...\n");
  471. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  472. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  473. if (drm->cechan) {
  474. ret = nouveau_channel_idle(drm->cechan);
  475. if (ret)
  476. goto fail_display;
  477. }
  478. if (drm->channel) {
  479. ret = nouveau_channel_idle(drm->channel);
  480. if (ret)
  481. goto fail_display;
  482. }
  483. NV_INFO(drm, "suspending client object trees...\n");
  484. if (drm->fence && nouveau_fence(drm)->suspend) {
  485. if (!nouveau_fence(drm)->suspend(drm)) {
  486. ret = -ENOMEM;
  487. goto fail_display;
  488. }
  489. }
  490. list_for_each_entry(cli, &drm->clients, head) {
  491. ret = nvif_client_suspend(&cli->base);
  492. if (ret)
  493. goto fail_client;
  494. }
  495. NV_INFO(drm, "suspending kernel object tree...\n");
  496. ret = nvif_client_suspend(&drm->client.base);
  497. if (ret)
  498. goto fail_client;
  499. return 0;
  500. fail_client:
  501. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  502. nvif_client_resume(&cli->base);
  503. }
  504. if (drm->fence && nouveau_fence(drm)->resume)
  505. nouveau_fence(drm)->resume(drm);
  506. fail_display:
  507. if (dev->mode_config.num_crtc) {
  508. NV_INFO(drm, "resuming display...\n");
  509. nouveau_display_resume(dev, runtime);
  510. }
  511. return ret;
  512. }
  513. static int
  514. nouveau_do_resume(struct drm_device *dev, bool runtime)
  515. {
  516. struct nouveau_drm *drm = nouveau_drm(dev);
  517. struct nouveau_cli *cli;
  518. NV_INFO(drm, "resuming kernel object tree...\n");
  519. nvif_client_resume(&drm->client.base);
  520. NV_INFO(drm, "resuming client object trees...\n");
  521. if (drm->fence && nouveau_fence(drm)->resume)
  522. nouveau_fence(drm)->resume(drm);
  523. list_for_each_entry(cli, &drm->clients, head) {
  524. nvif_client_resume(&cli->base);
  525. }
  526. nouveau_run_vbios_init(dev);
  527. if (dev->mode_config.num_crtc) {
  528. NV_INFO(drm, "resuming display...\n");
  529. nouveau_display_resume(dev, runtime);
  530. NV_INFO(drm, "resuming console...\n");
  531. nouveau_fbcon_set_suspend(dev, 0);
  532. }
  533. return 0;
  534. }
  535. int
  536. nouveau_pmops_suspend(struct device *dev)
  537. {
  538. struct pci_dev *pdev = to_pci_dev(dev);
  539. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  540. int ret;
  541. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  542. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  543. return 0;
  544. ret = nouveau_do_suspend(drm_dev, false);
  545. if (ret)
  546. return ret;
  547. pci_save_state(pdev);
  548. pci_disable_device(pdev);
  549. pci_set_power_state(pdev, PCI_D3hot);
  550. udelay(200);
  551. return 0;
  552. }
  553. int
  554. nouveau_pmops_resume(struct device *dev)
  555. {
  556. struct pci_dev *pdev = to_pci_dev(dev);
  557. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  558. int ret;
  559. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  560. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  561. return 0;
  562. pci_set_power_state(pdev, PCI_D0);
  563. pci_restore_state(pdev);
  564. ret = pci_enable_device(pdev);
  565. if (ret)
  566. return ret;
  567. pci_set_master(pdev);
  568. return nouveau_do_resume(drm_dev, false);
  569. }
  570. static int
  571. nouveau_pmops_freeze(struct device *dev)
  572. {
  573. struct pci_dev *pdev = to_pci_dev(dev);
  574. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  575. return nouveau_do_suspend(drm_dev, false);
  576. }
  577. static int
  578. nouveau_pmops_thaw(struct device *dev)
  579. {
  580. struct pci_dev *pdev = to_pci_dev(dev);
  581. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  582. return nouveau_do_resume(drm_dev, false);
  583. }
  584. static int
  585. nouveau_pmops_runtime_suspend(struct device *dev)
  586. {
  587. struct pci_dev *pdev = to_pci_dev(dev);
  588. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  589. int ret;
  590. if (nouveau_runtime_pm == 0) {
  591. pm_runtime_forbid(dev);
  592. return -EBUSY;
  593. }
  594. /* are we optimus enabled? */
  595. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  596. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  597. pm_runtime_forbid(dev);
  598. return -EBUSY;
  599. }
  600. drm_kms_helper_poll_disable(drm_dev);
  601. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  602. nouveau_switcheroo_optimus_dsm();
  603. ret = nouveau_do_suspend(drm_dev, true);
  604. pci_save_state(pdev);
  605. pci_disable_device(pdev);
  606. pci_ignore_hotplug(pdev);
  607. pci_set_power_state(pdev, PCI_D3cold);
  608. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  609. return ret;
  610. }
  611. static int
  612. nouveau_pmops_runtime_resume(struct device *dev)
  613. {
  614. struct pci_dev *pdev = to_pci_dev(dev);
  615. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  616. struct nvif_device *device = &nouveau_drm(drm_dev)->device;
  617. int ret;
  618. if (nouveau_runtime_pm == 0)
  619. return -EINVAL;
  620. pci_set_power_state(pdev, PCI_D0);
  621. pci_restore_state(pdev);
  622. ret = pci_enable_device(pdev);
  623. if (ret)
  624. return ret;
  625. pci_set_master(pdev);
  626. ret = nouveau_do_resume(drm_dev, true);
  627. if (!drm_dev->mode_config.poll_enabled)
  628. drm_kms_helper_poll_enable(drm_dev);
  629. /* do magic */
  630. nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
  631. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  632. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  633. return ret;
  634. }
  635. static int
  636. nouveau_pmops_runtime_idle(struct device *dev)
  637. {
  638. struct pci_dev *pdev = to_pci_dev(dev);
  639. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  640. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  641. struct drm_crtc *crtc;
  642. if (nouveau_runtime_pm == 0) {
  643. pm_runtime_forbid(dev);
  644. return -EBUSY;
  645. }
  646. /* are we optimus enabled? */
  647. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  648. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  649. pm_runtime_forbid(dev);
  650. return -EBUSY;
  651. }
  652. /* if we have a hdmi audio device - make sure it has a driver loaded */
  653. if (drm->hdmi_device) {
  654. if (!drm->hdmi_device->driver) {
  655. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  656. pm_runtime_mark_last_busy(dev);
  657. return -EBUSY;
  658. }
  659. }
  660. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  661. if (crtc->enabled) {
  662. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  663. return -EBUSY;
  664. }
  665. }
  666. pm_runtime_mark_last_busy(dev);
  667. pm_runtime_autosuspend(dev);
  668. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  669. return 1;
  670. }
  671. static int
  672. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  673. {
  674. struct nouveau_drm *drm = nouveau_drm(dev);
  675. struct nouveau_cli *cli;
  676. char name[32], tmpname[TASK_COMM_LEN];
  677. int ret;
  678. /* need to bring up power immediately if opening device */
  679. ret = pm_runtime_get_sync(dev->dev);
  680. if (ret < 0 && ret != -EACCES)
  681. return ret;
  682. get_task_comm(tmpname, current);
  683. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  684. ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
  685. if (ret)
  686. goto out_suspend;
  687. cli->base.super = false;
  688. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  689. ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
  690. 0x1000, NULL, &cli->vm);
  691. if (ret) {
  692. nouveau_cli_destroy(cli);
  693. goto out_suspend;
  694. }
  695. nvxx_client(&cli->base)->vm = cli->vm;
  696. }
  697. fpriv->driver_priv = cli;
  698. mutex_lock(&drm->client.mutex);
  699. list_add(&cli->head, &drm->clients);
  700. mutex_unlock(&drm->client.mutex);
  701. out_suspend:
  702. pm_runtime_mark_last_busy(dev->dev);
  703. pm_runtime_put_autosuspend(dev->dev);
  704. return ret;
  705. }
  706. static void
  707. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  708. {
  709. struct nouveau_cli *cli = nouveau_cli(fpriv);
  710. struct nouveau_drm *drm = nouveau_drm(dev);
  711. pm_runtime_get_sync(dev->dev);
  712. mutex_lock(&cli->mutex);
  713. if (cli->abi16)
  714. nouveau_abi16_fini(cli->abi16);
  715. mutex_unlock(&cli->mutex);
  716. mutex_lock(&drm->client.mutex);
  717. list_del(&cli->head);
  718. mutex_unlock(&drm->client.mutex);
  719. }
  720. static void
  721. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  722. {
  723. struct nouveau_cli *cli = nouveau_cli(fpriv);
  724. nouveau_cli_destroy(cli);
  725. pm_runtime_mark_last_busy(dev->dev);
  726. pm_runtime_put_autosuspend(dev->dev);
  727. }
  728. static const struct drm_ioctl_desc
  729. nouveau_ioctls[] = {
  730. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
  731. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  732. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  733. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
  734. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  735. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
  736. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
  737. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
  738. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
  739. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
  740. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
  741. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
  742. };
  743. long
  744. nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  745. {
  746. struct drm_file *filp = file->private_data;
  747. struct drm_device *dev = filp->minor->dev;
  748. long ret;
  749. ret = pm_runtime_get_sync(dev->dev);
  750. if (ret < 0 && ret != -EACCES)
  751. return ret;
  752. switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
  753. case DRM_NOUVEAU_NVIF:
  754. ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
  755. break;
  756. default:
  757. ret = drm_ioctl(file, cmd, arg);
  758. break;
  759. }
  760. pm_runtime_mark_last_busy(dev->dev);
  761. pm_runtime_put_autosuspend(dev->dev);
  762. return ret;
  763. }
  764. static const struct file_operations
  765. nouveau_driver_fops = {
  766. .owner = THIS_MODULE,
  767. .open = drm_open,
  768. .release = drm_release,
  769. .unlocked_ioctl = nouveau_drm_ioctl,
  770. .mmap = nouveau_ttm_mmap,
  771. .poll = drm_poll,
  772. .read = drm_read,
  773. #if defined(CONFIG_COMPAT)
  774. .compat_ioctl = nouveau_compat_ioctl,
  775. #endif
  776. .llseek = noop_llseek,
  777. };
  778. static struct drm_driver
  779. driver_stub = {
  780. .driver_features =
  781. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
  782. DRIVER_KMS_LEGACY_CONTEXT,
  783. .load = nouveau_drm_load,
  784. .unload = nouveau_drm_unload,
  785. .open = nouveau_drm_open,
  786. .preclose = nouveau_drm_preclose,
  787. .postclose = nouveau_drm_postclose,
  788. .lastclose = nouveau_vga_lastclose,
  789. #if defined(CONFIG_DEBUG_FS)
  790. .debugfs_init = nouveau_debugfs_init,
  791. .debugfs_cleanup = nouveau_debugfs_takedown,
  792. #endif
  793. .get_vblank_counter = drm_vblank_no_hw_counter,
  794. .enable_vblank = nouveau_display_vblank_enable,
  795. .disable_vblank = nouveau_display_vblank_disable,
  796. .get_scanout_position = nouveau_display_scanoutpos,
  797. .get_vblank_timestamp = nouveau_display_vblstamp,
  798. .ioctls = nouveau_ioctls,
  799. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  800. .fops = &nouveau_driver_fops,
  801. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  802. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  803. .gem_prime_export = drm_gem_prime_export,
  804. .gem_prime_import = drm_gem_prime_import,
  805. .gem_prime_pin = nouveau_gem_prime_pin,
  806. .gem_prime_res_obj = nouveau_gem_prime_res_obj,
  807. .gem_prime_unpin = nouveau_gem_prime_unpin,
  808. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  809. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  810. .gem_prime_vmap = nouveau_gem_prime_vmap,
  811. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  812. .gem_free_object = nouveau_gem_object_del,
  813. .gem_open_object = nouveau_gem_object_open,
  814. .gem_close_object = nouveau_gem_object_close,
  815. .dumb_create = nouveau_display_dumb_create,
  816. .dumb_map_offset = nouveau_display_dumb_map_offset,
  817. .dumb_destroy = drm_gem_dumb_destroy,
  818. .name = DRIVER_NAME,
  819. .desc = DRIVER_DESC,
  820. #ifdef GIT_REVISION
  821. .date = GIT_REVISION,
  822. #else
  823. .date = DRIVER_DATE,
  824. #endif
  825. .major = DRIVER_MAJOR,
  826. .minor = DRIVER_MINOR,
  827. .patchlevel = DRIVER_PATCHLEVEL,
  828. };
  829. static struct pci_device_id
  830. nouveau_drm_pci_table[] = {
  831. {
  832. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  833. .class = PCI_BASE_CLASS_DISPLAY << 16,
  834. .class_mask = 0xff << 16,
  835. },
  836. {
  837. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  838. .class = PCI_BASE_CLASS_DISPLAY << 16,
  839. .class_mask = 0xff << 16,
  840. },
  841. {}
  842. };
  843. static void nouveau_display_options(void)
  844. {
  845. DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
  846. DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
  847. DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
  848. DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
  849. DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
  850. DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
  851. DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
  852. DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
  853. DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
  854. DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
  855. DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
  856. DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate);
  857. }
  858. static const struct dev_pm_ops nouveau_pm_ops = {
  859. .suspend = nouveau_pmops_suspend,
  860. .resume = nouveau_pmops_resume,
  861. .freeze = nouveau_pmops_freeze,
  862. .thaw = nouveau_pmops_thaw,
  863. .poweroff = nouveau_pmops_freeze,
  864. .restore = nouveau_pmops_resume,
  865. .runtime_suspend = nouveau_pmops_runtime_suspend,
  866. .runtime_resume = nouveau_pmops_runtime_resume,
  867. .runtime_idle = nouveau_pmops_runtime_idle,
  868. };
  869. static struct pci_driver
  870. nouveau_drm_pci_driver = {
  871. .name = "nouveau",
  872. .id_table = nouveau_drm_pci_table,
  873. .probe = nouveau_drm_probe,
  874. .remove = nouveau_drm_remove,
  875. .driver.pm = &nouveau_pm_ops,
  876. };
  877. struct drm_device *
  878. nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
  879. struct platform_device *pdev,
  880. struct nvkm_device **pdevice)
  881. {
  882. struct drm_device *drm;
  883. int err;
  884. err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
  885. true, true, ~0ULL, pdevice);
  886. if (err)
  887. goto err_free;
  888. drm = drm_dev_alloc(&driver_platform, &pdev->dev);
  889. if (!drm) {
  890. err = -ENOMEM;
  891. goto err_free;
  892. }
  893. err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
  894. if (err < 0)
  895. goto err_free;
  896. drm->platformdev = pdev;
  897. platform_set_drvdata(pdev, drm);
  898. return drm;
  899. err_free:
  900. nvkm_device_del(pdevice);
  901. return ERR_PTR(err);
  902. }
  903. static int __init
  904. nouveau_drm_init(void)
  905. {
  906. driver_pci = driver_stub;
  907. driver_pci.set_busid = drm_pci_set_busid;
  908. driver_platform = driver_stub;
  909. driver_platform.set_busid = drm_platform_set_busid;
  910. nouveau_display_options();
  911. if (nouveau_modeset == -1) {
  912. #ifdef CONFIG_VGA_CONSOLE
  913. if (vgacon_text_force())
  914. nouveau_modeset = 0;
  915. #endif
  916. }
  917. if (!nouveau_modeset)
  918. return 0;
  919. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  920. platform_driver_register(&nouveau_platform_driver);
  921. #endif
  922. nouveau_register_dsm_handler();
  923. return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
  924. }
  925. static void __exit
  926. nouveau_drm_exit(void)
  927. {
  928. if (!nouveau_modeset)
  929. return;
  930. drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
  931. nouveau_unregister_dsm_handler();
  932. #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
  933. platform_driver_unregister(&nouveau_platform_driver);
  934. #endif
  935. }
  936. module_init(nouveau_drm_init);
  937. module_exit(nouveau_drm_exit);
  938. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  939. MODULE_AUTHOR(DRIVER_AUTHOR);
  940. MODULE_DESCRIPTION(DRIVER_DESC);
  941. MODULE_LICENSE("GPL and additional rights");