cik_blit_shaders.c 5.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246
  1. /*
  2. * Copyright 2012 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE COPYRIGHT HOLDER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Alex Deucher <alexander.deucher@amd.com>
  25. */
  26. #include <linux/types.h>
  27. #include <linux/bug.h>
  28. #include <linux/kernel.h>
  29. const u32 cik_default_state[] =
  30. {
  31. 0xc0066900,
  32. 0x00000000,
  33. 0x00000060, /* DB_RENDER_CONTROL */
  34. 0x00000000, /* DB_COUNT_CONTROL */
  35. 0x00000000, /* DB_DEPTH_VIEW */
  36. 0x0000002a, /* DB_RENDER_OVERRIDE */
  37. 0x00000000, /* DB_RENDER_OVERRIDE2 */
  38. 0x00000000, /* DB_HTILE_DATA_BASE */
  39. 0xc0046900,
  40. 0x00000008,
  41. 0x00000000, /* DB_DEPTH_BOUNDS_MIN */
  42. 0x00000000, /* DB_DEPTH_BOUNDS_MAX */
  43. 0x00000000, /* DB_STENCIL_CLEAR */
  44. 0x00000000, /* DB_DEPTH_CLEAR */
  45. 0xc0036900,
  46. 0x0000000f,
  47. 0x00000000, /* DB_DEPTH_INFO */
  48. 0x00000000, /* DB_Z_INFO */
  49. 0x00000000, /* DB_STENCIL_INFO */
  50. 0xc0016900,
  51. 0x00000080,
  52. 0x00000000, /* PA_SC_WINDOW_OFFSET */
  53. 0xc00d6900,
  54. 0x00000083,
  55. 0x0000ffff, /* PA_SC_CLIPRECT_RULE */
  56. 0x00000000, /* PA_SC_CLIPRECT_0_TL */
  57. 0x20002000, /* PA_SC_CLIPRECT_0_BR */
  58. 0x00000000,
  59. 0x20002000,
  60. 0x00000000,
  61. 0x20002000,
  62. 0x00000000,
  63. 0x20002000,
  64. 0xaaaaaaaa, /* PA_SC_EDGERULE */
  65. 0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */
  66. 0x0000000f, /* CB_TARGET_MASK */
  67. 0x0000000f, /* CB_SHADER_MASK */
  68. 0xc0226900,
  69. 0x00000094,
  70. 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
  71. 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
  72. 0x80000000,
  73. 0x20002000,
  74. 0x80000000,
  75. 0x20002000,
  76. 0x80000000,
  77. 0x20002000,
  78. 0x80000000,
  79. 0x20002000,
  80. 0x80000000,
  81. 0x20002000,
  82. 0x80000000,
  83. 0x20002000,
  84. 0x80000000,
  85. 0x20002000,
  86. 0x80000000,
  87. 0x20002000,
  88. 0x80000000,
  89. 0x20002000,
  90. 0x80000000,
  91. 0x20002000,
  92. 0x80000000,
  93. 0x20002000,
  94. 0x80000000,
  95. 0x20002000,
  96. 0x80000000,
  97. 0x20002000,
  98. 0x80000000,
  99. 0x20002000,
  100. 0x80000000,
  101. 0x20002000,
  102. 0x00000000, /* PA_SC_VPORT_ZMIN_0 */
  103. 0x3f800000, /* PA_SC_VPORT_ZMAX_0 */
  104. 0xc0046900,
  105. 0x00000100,
  106. 0xffffffff, /* VGT_MAX_VTX_INDX */
  107. 0x00000000, /* VGT_MIN_VTX_INDX */
  108. 0x00000000, /* VGT_INDX_OFFSET */
  109. 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
  110. 0xc0046900,
  111. 0x00000105,
  112. 0x00000000, /* CB_BLEND_RED */
  113. 0x00000000, /* CB_BLEND_GREEN */
  114. 0x00000000, /* CB_BLEND_BLUE */
  115. 0x00000000, /* CB_BLEND_ALPHA */
  116. 0xc0016900,
  117. 0x000001e0,
  118. 0x00000000, /* CB_BLEND0_CONTROL */
  119. 0xc00c6900,
  120. 0x00000200,
  121. 0x00000000, /* DB_DEPTH_CONTROL */
  122. 0x00000000, /* DB_EQAA */
  123. 0x00cc0010, /* CB_COLOR_CONTROL */
  124. 0x00000210, /* DB_SHADER_CONTROL */
  125. 0x00010000, /* PA_CL_CLIP_CNTL */
  126. 0x00000004, /* PA_SU_SC_MODE_CNTL */
  127. 0x00000100, /* PA_CL_VTE_CNTL */
  128. 0x00000000, /* PA_CL_VS_OUT_CNTL */
  129. 0x00000000, /* PA_CL_NANINF_CNTL */
  130. 0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */
  131. 0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */
  132. 0x00000000, /* PA_SU_PRIM_FILTER_CNTL */
  133. 0xc0116900,
  134. 0x00000280,
  135. 0x00000000, /* PA_SU_POINT_SIZE */
  136. 0x00000000, /* PA_SU_POINT_MINMAX */
  137. 0x00000008, /* PA_SU_LINE_CNTL */
  138. 0x00000000, /* PA_SC_LINE_STIPPLE */
  139. 0x00000000, /* VGT_OUTPUT_PATH_CNTL */
  140. 0x00000000, /* VGT_HOS_CNTL */
  141. 0x00000000,
  142. 0x00000000,
  143. 0x00000000,
  144. 0x00000000,
  145. 0x00000000,
  146. 0x00000000,
  147. 0x00000000,
  148. 0x00000000,
  149. 0x00000000,
  150. 0x00000000,
  151. 0x00000000, /* VGT_GS_MODE */
  152. 0xc0026900,
  153. 0x00000292,
  154. 0x00000000, /* PA_SC_MODE_CNTL_0 */
  155. 0x00000000, /* PA_SC_MODE_CNTL_1 */
  156. 0xc0016900,
  157. 0x000002a1,
  158. 0x00000000, /* VGT_PRIMITIVEID_EN */
  159. 0xc0016900,
  160. 0x000002a5,
  161. 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */
  162. 0xc0026900,
  163. 0x000002a8,
  164. 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
  165. 0x00000000,
  166. 0xc0026900,
  167. 0x000002ad,
  168. 0x00000000, /* VGT_REUSE_OFF */
  169. 0x00000000,
  170. 0xc0016900,
  171. 0x000002d5,
  172. 0x00000000, /* VGT_SHADER_STAGES_EN */
  173. 0xc0016900,
  174. 0x000002dc,
  175. 0x0000aa00, /* DB_ALPHA_TO_MASK */
  176. 0xc0066900,
  177. 0x000002de,
  178. 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
  179. 0x00000000,
  180. 0x00000000,
  181. 0x00000000,
  182. 0x00000000,
  183. 0x00000000,
  184. 0xc0026900,
  185. 0x000002e5,
  186. 0x00000000, /* VGT_STRMOUT_CONFIG */
  187. 0x00000000,
  188. 0xc01b6900,
  189. 0x000002f5,
  190. 0x76543210, /* PA_SC_CENTROID_PRIORITY_0 */
  191. 0xfedcba98, /* PA_SC_CENTROID_PRIORITY_1 */
  192. 0x00000000, /* PA_SC_LINE_CNTL */
  193. 0x00000000, /* PA_SC_AA_CONFIG */
  194. 0x00000005, /* PA_SU_VTX_CNTL */
  195. 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
  196. 0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */
  197. 0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */
  198. 0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */
  199. 0x00000000, /* PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 */
  200. 0x00000000,
  201. 0x00000000,
  202. 0x00000000,
  203. 0x00000000,
  204. 0x00000000,
  205. 0x00000000,
  206. 0x00000000,
  207. 0x00000000,
  208. 0x00000000,
  209. 0x00000000,
  210. 0x00000000,
  211. 0x00000000,
  212. 0x00000000,
  213. 0x00000000,
  214. 0x00000000,
  215. 0xffffffff, /* PA_SC_AA_MASK_X0Y0_X1Y0 */
  216. 0xffffffff,
  217. 0xc0026900,
  218. 0x00000316,
  219. 0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */
  220. 0x00000010, /* */
  221. };
  222. const u32 cik_default_size = ARRAY_SIZE(cik_default_state);