radeon_audio.c 26 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Slava Grigorev <slava.grigorev@amd.com>
  23. */
  24. #include <linux/gcd.h>
  25. #include <drm/drmP.h>
  26. #include <drm/drm_crtc.h>
  27. #include "radeon.h"
  28. #include "atom.h"
  29. #include "radeon_audio.h"
  30. void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
  31. u8 enable_mask);
  32. void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
  33. u8 enable_mask);
  34. void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
  35. u8 enable_mask);
  36. u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
  37. void dce6_endpoint_wreg(struct radeon_device *rdev,
  38. u32 offset, u32 reg, u32 v);
  39. void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
  40. struct cea_sad *sads, int sad_count);
  41. void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
  42. struct cea_sad *sads, int sad_count);
  43. void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
  44. struct cea_sad *sads, int sad_count);
  45. void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
  46. u8 *sadb, int sad_count);
  47. void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
  48. u8 *sadb, int sad_count);
  49. void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
  50. u8 *sadb, int sad_count);
  51. void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
  52. u8 *sadb, int sad_count);
  53. void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
  54. u8 *sadb, int sad_count);
  55. void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
  56. u8 *sadb, int sad_count);
  57. void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
  58. struct drm_connector *connector, struct drm_display_mode *mode);
  59. void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
  60. struct drm_connector *connector, struct drm_display_mode *mode);
  61. struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
  62. struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
  63. void dce6_afmt_select_pin(struct drm_encoder *encoder);
  64. void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
  65. struct radeon_crtc *crtc, unsigned int clock);
  66. void dce3_2_audio_set_dto(struct radeon_device *rdev,
  67. struct radeon_crtc *crtc, unsigned int clock);
  68. void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
  69. struct radeon_crtc *crtc, unsigned int clock);
  70. void dce4_dp_audio_set_dto(struct radeon_device *rdev,
  71. struct radeon_crtc *crtc, unsigned int clock);
  72. void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
  73. struct radeon_crtc *crtc, unsigned int clock);
  74. void dce6_dp_audio_set_dto(struct radeon_device *rdev,
  75. struct radeon_crtc *crtc, unsigned int clock);
  76. void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
  77. unsigned char *buffer, size_t size);
  78. void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
  79. unsigned char *buffer, size_t size);
  80. void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
  81. const struct radeon_hdmi_acr *acr);
  82. void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
  83. const struct radeon_hdmi_acr *acr);
  84. void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
  85. const struct radeon_hdmi_acr *acr);
  86. void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
  87. void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
  88. void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
  89. u32 offset, int bpc);
  90. void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset);
  91. void dce3_2_set_audio_packet(struct drm_encoder *encoder, u32 offset);
  92. void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset);
  93. void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
  94. void dce3_2_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
  95. void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute);
  96. static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
  97. struct drm_display_mode *mode);
  98. static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
  99. struct drm_display_mode *mode);
  100. void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
  101. void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
  102. void evergreen_dp_enable(struct drm_encoder *encoder, bool enable);
  103. static const u32 pin_offsets[7] =
  104. {
  105. (0x5e00 - 0x5e00),
  106. (0x5e18 - 0x5e00),
  107. (0x5e30 - 0x5e00),
  108. (0x5e48 - 0x5e00),
  109. (0x5e60 - 0x5e00),
  110. (0x5e78 - 0x5e00),
  111. (0x5e90 - 0x5e00),
  112. };
  113. static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
  114. {
  115. return RREG32(reg);
  116. }
  117. static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
  118. u32 reg, u32 v)
  119. {
  120. WREG32(reg, v);
  121. }
  122. static struct radeon_audio_basic_funcs r600_funcs = {
  123. .endpoint_rreg = radeon_audio_rreg,
  124. .endpoint_wreg = radeon_audio_wreg,
  125. .enable = r600_audio_enable,
  126. };
  127. static struct radeon_audio_basic_funcs dce32_funcs = {
  128. .endpoint_rreg = radeon_audio_rreg,
  129. .endpoint_wreg = radeon_audio_wreg,
  130. .enable = r600_audio_enable,
  131. };
  132. static struct radeon_audio_basic_funcs dce4_funcs = {
  133. .endpoint_rreg = radeon_audio_rreg,
  134. .endpoint_wreg = radeon_audio_wreg,
  135. .enable = dce4_audio_enable,
  136. };
  137. static struct radeon_audio_basic_funcs dce6_funcs = {
  138. .endpoint_rreg = dce6_endpoint_rreg,
  139. .endpoint_wreg = dce6_endpoint_wreg,
  140. .enable = dce6_audio_enable,
  141. };
  142. static struct radeon_audio_funcs r600_hdmi_funcs = {
  143. .get_pin = r600_audio_get_pin,
  144. .set_dto = r600_hdmi_audio_set_dto,
  145. .update_acr = r600_hdmi_update_acr,
  146. .set_vbi_packet = r600_set_vbi_packet,
  147. .set_avi_packet = r600_set_avi_packet,
  148. .set_audio_packet = r600_set_audio_packet,
  149. .set_mute = r600_set_mute,
  150. .mode_set = radeon_audio_hdmi_mode_set,
  151. .dpms = r600_hdmi_enable,
  152. };
  153. static struct radeon_audio_funcs dce32_hdmi_funcs = {
  154. .get_pin = r600_audio_get_pin,
  155. .write_sad_regs = dce3_2_afmt_write_sad_regs,
  156. .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
  157. .set_dto = dce3_2_audio_set_dto,
  158. .update_acr = dce3_2_hdmi_update_acr,
  159. .set_vbi_packet = r600_set_vbi_packet,
  160. .set_avi_packet = r600_set_avi_packet,
  161. .set_audio_packet = dce3_2_set_audio_packet,
  162. .set_mute = dce3_2_set_mute,
  163. .mode_set = radeon_audio_hdmi_mode_set,
  164. .dpms = r600_hdmi_enable,
  165. };
  166. static struct radeon_audio_funcs dce32_dp_funcs = {
  167. .get_pin = r600_audio_get_pin,
  168. .write_sad_regs = dce3_2_afmt_write_sad_regs,
  169. .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
  170. .set_dto = dce3_2_audio_set_dto,
  171. .set_avi_packet = r600_set_avi_packet,
  172. .set_audio_packet = dce3_2_set_audio_packet,
  173. };
  174. static struct radeon_audio_funcs dce4_hdmi_funcs = {
  175. .get_pin = r600_audio_get_pin,
  176. .write_sad_regs = evergreen_hdmi_write_sad_regs,
  177. .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
  178. .write_latency_fields = dce4_afmt_write_latency_fields,
  179. .set_dto = dce4_hdmi_audio_set_dto,
  180. .update_acr = evergreen_hdmi_update_acr,
  181. .set_vbi_packet = dce4_set_vbi_packet,
  182. .set_color_depth = dce4_hdmi_set_color_depth,
  183. .set_avi_packet = evergreen_set_avi_packet,
  184. .set_audio_packet = dce4_set_audio_packet,
  185. .set_mute = dce4_set_mute,
  186. .mode_set = radeon_audio_hdmi_mode_set,
  187. .dpms = evergreen_hdmi_enable,
  188. };
  189. static struct radeon_audio_funcs dce4_dp_funcs = {
  190. .get_pin = r600_audio_get_pin,
  191. .write_sad_regs = evergreen_hdmi_write_sad_regs,
  192. .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
  193. .write_latency_fields = dce4_afmt_write_latency_fields,
  194. .set_dto = dce4_dp_audio_set_dto,
  195. .set_avi_packet = evergreen_set_avi_packet,
  196. .set_audio_packet = dce4_set_audio_packet,
  197. .mode_set = radeon_audio_dp_mode_set,
  198. .dpms = evergreen_dp_enable,
  199. };
  200. static struct radeon_audio_funcs dce6_hdmi_funcs = {
  201. .select_pin = dce6_afmt_select_pin,
  202. .get_pin = dce6_audio_get_pin,
  203. .write_sad_regs = dce6_afmt_write_sad_regs,
  204. .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
  205. .write_latency_fields = dce6_afmt_write_latency_fields,
  206. .set_dto = dce6_hdmi_audio_set_dto,
  207. .update_acr = evergreen_hdmi_update_acr,
  208. .set_vbi_packet = dce4_set_vbi_packet,
  209. .set_color_depth = dce4_hdmi_set_color_depth,
  210. .set_avi_packet = evergreen_set_avi_packet,
  211. .set_audio_packet = dce4_set_audio_packet,
  212. .set_mute = dce4_set_mute,
  213. .mode_set = radeon_audio_hdmi_mode_set,
  214. .dpms = evergreen_hdmi_enable,
  215. };
  216. static struct radeon_audio_funcs dce6_dp_funcs = {
  217. .select_pin = dce6_afmt_select_pin,
  218. .get_pin = dce6_audio_get_pin,
  219. .write_sad_regs = dce6_afmt_write_sad_regs,
  220. .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
  221. .write_latency_fields = dce6_afmt_write_latency_fields,
  222. .set_dto = dce6_dp_audio_set_dto,
  223. .set_avi_packet = evergreen_set_avi_packet,
  224. .set_audio_packet = dce4_set_audio_packet,
  225. .mode_set = radeon_audio_dp_mode_set,
  226. .dpms = evergreen_dp_enable,
  227. };
  228. static void radeon_audio_enable(struct radeon_device *rdev,
  229. struct r600_audio_pin *pin, u8 enable_mask)
  230. {
  231. struct drm_encoder *encoder;
  232. struct radeon_encoder *radeon_encoder;
  233. struct radeon_encoder_atom_dig *dig;
  234. int pin_count = 0;
  235. if (!pin)
  236. return;
  237. if (rdev->mode_info.mode_config_initialized) {
  238. list_for_each_entry(encoder, &rdev->ddev->mode_config.encoder_list, head) {
  239. if (radeon_encoder_is_digital(encoder)) {
  240. radeon_encoder = to_radeon_encoder(encoder);
  241. dig = radeon_encoder->enc_priv;
  242. if (dig->pin == pin)
  243. pin_count++;
  244. }
  245. }
  246. if ((pin_count > 1) && (enable_mask == 0))
  247. return;
  248. }
  249. if (rdev->audio.funcs->enable)
  250. rdev->audio.funcs->enable(rdev, pin, enable_mask);
  251. }
  252. static void radeon_audio_interface_init(struct radeon_device *rdev)
  253. {
  254. if (ASIC_IS_DCE6(rdev)) {
  255. rdev->audio.funcs = &dce6_funcs;
  256. rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
  257. rdev->audio.dp_funcs = &dce6_dp_funcs;
  258. } else if (ASIC_IS_DCE4(rdev)) {
  259. rdev->audio.funcs = &dce4_funcs;
  260. rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
  261. rdev->audio.dp_funcs = &dce4_dp_funcs;
  262. } else if (ASIC_IS_DCE32(rdev)) {
  263. rdev->audio.funcs = &dce32_funcs;
  264. rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
  265. rdev->audio.dp_funcs = &dce32_dp_funcs;
  266. } else {
  267. rdev->audio.funcs = &r600_funcs;
  268. rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
  269. rdev->audio.dp_funcs = 0;
  270. }
  271. }
  272. static int radeon_audio_chipset_supported(struct radeon_device *rdev)
  273. {
  274. return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
  275. }
  276. int radeon_audio_init(struct radeon_device *rdev)
  277. {
  278. int i;
  279. if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
  280. return 0;
  281. rdev->audio.enabled = true;
  282. if (ASIC_IS_DCE83(rdev)) /* KB: 2 streams, 3 endpoints */
  283. rdev->audio.num_pins = 3;
  284. else if (ASIC_IS_DCE81(rdev)) /* KV: 4 streams, 7 endpoints */
  285. rdev->audio.num_pins = 7;
  286. else if (ASIC_IS_DCE8(rdev)) /* BN/HW: 6 streams, 7 endpoints */
  287. rdev->audio.num_pins = 7;
  288. else if (ASIC_IS_DCE64(rdev)) /* OL: 2 streams, 2 endpoints */
  289. rdev->audio.num_pins = 2;
  290. else if (ASIC_IS_DCE61(rdev)) /* TN: 4 streams, 6 endpoints */
  291. rdev->audio.num_pins = 6;
  292. else if (ASIC_IS_DCE6(rdev)) /* SI: 6 streams, 6 endpoints */
  293. rdev->audio.num_pins = 6;
  294. else
  295. rdev->audio.num_pins = 1;
  296. for (i = 0; i < rdev->audio.num_pins; i++) {
  297. rdev->audio.pin[i].channels = -1;
  298. rdev->audio.pin[i].rate = -1;
  299. rdev->audio.pin[i].bits_per_sample = -1;
  300. rdev->audio.pin[i].status_bits = 0;
  301. rdev->audio.pin[i].category_code = 0;
  302. rdev->audio.pin[i].connected = false;
  303. rdev->audio.pin[i].offset = pin_offsets[i];
  304. rdev->audio.pin[i].id = i;
  305. }
  306. radeon_audio_interface_init(rdev);
  307. /* disable audio. it will be set up later */
  308. for (i = 0; i < rdev->audio.num_pins; i++)
  309. radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
  310. return 0;
  311. }
  312. u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
  313. {
  314. if (rdev->audio.funcs->endpoint_rreg)
  315. return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
  316. return 0;
  317. }
  318. void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
  319. u32 reg, u32 v)
  320. {
  321. if (rdev->audio.funcs->endpoint_wreg)
  322. rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
  323. }
  324. static void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
  325. {
  326. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  327. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  328. struct cea_sad *sads;
  329. int sad_count;
  330. if (!connector)
  331. return;
  332. sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
  333. if (sad_count <= 0) {
  334. DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
  335. return;
  336. }
  337. BUG_ON(!sads);
  338. if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
  339. radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
  340. kfree(sads);
  341. }
  342. static void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
  343. {
  344. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  345. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  346. u8 *sadb = NULL;
  347. int sad_count;
  348. if (!connector)
  349. return;
  350. sad_count = drm_edid_to_speaker_allocation(radeon_connector_edid(connector),
  351. &sadb);
  352. if (sad_count < 0) {
  353. DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
  354. sad_count);
  355. sad_count = 0;
  356. }
  357. if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
  358. radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
  359. kfree(sadb);
  360. }
  361. static void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
  362. struct drm_display_mode *mode)
  363. {
  364. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  365. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  366. if (!connector)
  367. return;
  368. if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
  369. radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
  370. }
  371. struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
  372. {
  373. struct radeon_device *rdev = encoder->dev->dev_private;
  374. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  375. if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
  376. return radeon_encoder->audio->get_pin(rdev);
  377. return NULL;
  378. }
  379. static void radeon_audio_select_pin(struct drm_encoder *encoder)
  380. {
  381. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  382. if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
  383. radeon_encoder->audio->select_pin(encoder);
  384. }
  385. void radeon_audio_detect(struct drm_connector *connector,
  386. struct drm_encoder *encoder,
  387. enum drm_connector_status status)
  388. {
  389. struct drm_device *dev = connector->dev;
  390. struct radeon_device *rdev = dev->dev_private;
  391. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  392. struct radeon_encoder_atom_dig *dig;
  393. if (!radeon_audio_chipset_supported(rdev))
  394. return;
  395. if (!radeon_encoder_is_digital(encoder))
  396. return;
  397. dig = radeon_encoder->enc_priv;
  398. if (status == connector_status_connected) {
  399. if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
  400. struct radeon_connector *radeon_connector = to_radeon_connector(connector);
  401. if (radeon_dp_getsinktype(radeon_connector) ==
  402. CONNECTOR_OBJECT_ID_DISPLAYPORT)
  403. radeon_encoder->audio = rdev->audio.dp_funcs;
  404. else
  405. radeon_encoder->audio = rdev->audio.hdmi_funcs;
  406. } else {
  407. radeon_encoder->audio = rdev->audio.hdmi_funcs;
  408. }
  409. if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
  410. if (!dig->pin)
  411. dig->pin = radeon_audio_get_pin(encoder);
  412. radeon_audio_enable(rdev, dig->pin, 0xf);
  413. } else {
  414. radeon_audio_enable(rdev, dig->pin, 0);
  415. dig->pin = NULL;
  416. }
  417. } else {
  418. radeon_audio_enable(rdev, dig->pin, 0);
  419. dig->pin = NULL;
  420. }
  421. }
  422. void radeon_audio_fini(struct radeon_device *rdev)
  423. {
  424. int i;
  425. if (!rdev->audio.enabled)
  426. return;
  427. for (i = 0; i < rdev->audio.num_pins; i++)
  428. radeon_audio_enable(rdev, &rdev->audio.pin[i], 0);
  429. rdev->audio.enabled = false;
  430. }
  431. static void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
  432. {
  433. struct radeon_device *rdev = encoder->dev->dev_private;
  434. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  435. struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
  436. if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
  437. radeon_encoder->audio->set_dto(rdev, crtc, clock);
  438. }
  439. static int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
  440. struct drm_display_mode *mode)
  441. {
  442. struct radeon_device *rdev = encoder->dev->dev_private;
  443. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  444. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  445. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  446. u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
  447. struct hdmi_avi_infoframe frame;
  448. int err;
  449. if (!connector)
  450. return -EINVAL;
  451. err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
  452. if (err < 0) {
  453. DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
  454. return err;
  455. }
  456. if (radeon_encoder->output_csc != RADEON_OUTPUT_CSC_BYPASS) {
  457. if (drm_rgb_quant_range_selectable(radeon_connector_edid(connector))) {
  458. if (radeon_encoder->output_csc == RADEON_OUTPUT_CSC_TVRGB)
  459. frame.quantization_range = HDMI_QUANTIZATION_RANGE_LIMITED;
  460. else
  461. frame.quantization_range = HDMI_QUANTIZATION_RANGE_FULL;
  462. } else {
  463. frame.quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT;
  464. }
  465. }
  466. err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
  467. if (err < 0) {
  468. DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
  469. return err;
  470. }
  471. if (dig && dig->afmt && radeon_encoder->audio &&
  472. radeon_encoder->audio->set_avi_packet)
  473. radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
  474. buffer, sizeof(buffer));
  475. return 0;
  476. }
  477. /*
  478. * calculate CTS and N values if they are not found in the table
  479. */
  480. static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
  481. {
  482. int n, cts;
  483. unsigned long div, mul;
  484. /* Safe, but overly large values */
  485. n = 128 * freq;
  486. cts = clock * 1000;
  487. /* Smallest valid fraction */
  488. div = gcd(n, cts);
  489. n /= div;
  490. cts /= div;
  491. /*
  492. * The optimal N is 128*freq/1000. Calculate the closest larger
  493. * value that doesn't truncate any bits.
  494. */
  495. mul = ((128*freq/1000) + (n-1))/n;
  496. n *= mul;
  497. cts *= mul;
  498. /* Check that we are in spec (not always possible) */
  499. if (n < (128*freq/1500))
  500. printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
  501. if (n > (128*freq/300))
  502. printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
  503. *N = n;
  504. *CTS = cts;
  505. DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
  506. *N, *CTS, freq);
  507. }
  508. static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
  509. {
  510. static struct radeon_hdmi_acr res;
  511. u8 i;
  512. static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
  513. /* 32kHz 44.1kHz 48kHz */
  514. /* Clock N CTS N CTS N CTS */
  515. { 25175, 4096, 25175, 28224, 125875, 6144, 25175 }, /* 25,20/1.001 MHz */
  516. { 25200, 4096, 25200, 6272, 28000, 6144, 25200 }, /* 25.20 MHz */
  517. { 27000, 4096, 27000, 6272, 30000, 6144, 27000 }, /* 27.00 MHz */
  518. { 27027, 4096, 27027, 6272, 30030, 6144, 27027 }, /* 27.00*1.001 MHz */
  519. { 54000, 4096, 54000, 6272, 60000, 6144, 54000 }, /* 54.00 MHz */
  520. { 54054, 4096, 54054, 6272, 60060, 6144, 54054 }, /* 54.00*1.001 MHz */
  521. { 74176, 4096, 74176, 5733, 75335, 6144, 74176 }, /* 74.25/1.001 MHz */
  522. { 74250, 4096, 74250, 6272, 82500, 6144, 74250 }, /* 74.25 MHz */
  523. { 148352, 4096, 148352, 5733, 150670, 6144, 148352 }, /* 148.50/1.001 MHz */
  524. { 148500, 4096, 148500, 6272, 165000, 6144, 148500 }, /* 148.50 MHz */
  525. };
  526. /* Precalculated values for common clocks */
  527. for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
  528. if (hdmi_predefined_acr[i].clock == clock)
  529. return &hdmi_predefined_acr[i];
  530. /* And odd clocks get manually calculated */
  531. radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
  532. radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
  533. radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
  534. return &res;
  535. }
  536. /*
  537. * update the N and CTS parameters for a given pixel clock rate
  538. */
  539. static void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
  540. {
  541. const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
  542. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  543. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  544. if (!dig || !dig->afmt)
  545. return;
  546. if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
  547. radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
  548. }
  549. static void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
  550. {
  551. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  552. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  553. if (!dig || !dig->afmt)
  554. return;
  555. if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
  556. radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
  557. }
  558. static void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
  559. {
  560. int bpc = 8;
  561. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  562. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  563. if (!dig || !dig->afmt)
  564. return;
  565. if (encoder->crtc) {
  566. struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
  567. bpc = radeon_crtc->bpc;
  568. }
  569. if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
  570. radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
  571. }
  572. static void radeon_audio_set_audio_packet(struct drm_encoder *encoder)
  573. {
  574. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  575. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  576. if (!dig || !dig->afmt)
  577. return;
  578. if (radeon_encoder->audio && radeon_encoder->audio->set_audio_packet)
  579. radeon_encoder->audio->set_audio_packet(encoder, dig->afmt->offset);
  580. }
  581. static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
  582. {
  583. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  584. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  585. if (!dig || !dig->afmt)
  586. return;
  587. if (radeon_encoder->audio && radeon_encoder->audio->set_mute)
  588. radeon_encoder->audio->set_mute(encoder, dig->afmt->offset, mute);
  589. }
  590. /*
  591. * update the info frames with the data from the current display mode
  592. */
  593. static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
  594. struct drm_display_mode *mode)
  595. {
  596. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  597. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  598. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  599. if (!dig || !dig->afmt)
  600. return;
  601. if (!connector)
  602. return;
  603. if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
  604. radeon_audio_set_mute(encoder, true);
  605. radeon_audio_write_speaker_allocation(encoder);
  606. radeon_audio_write_sad_regs(encoder);
  607. radeon_audio_write_latency_fields(encoder, mode);
  608. radeon_audio_set_dto(encoder, mode->clock);
  609. radeon_audio_set_vbi_packet(encoder);
  610. radeon_hdmi_set_color_depth(encoder);
  611. radeon_audio_update_acr(encoder, mode->clock);
  612. radeon_audio_set_audio_packet(encoder);
  613. radeon_audio_select_pin(encoder);
  614. if (radeon_audio_set_avi_packet(encoder, mode) < 0)
  615. return;
  616. radeon_audio_set_mute(encoder, false);
  617. } else {
  618. radeon_hdmi_set_color_depth(encoder);
  619. if (radeon_audio_set_avi_packet(encoder, mode) < 0)
  620. return;
  621. }
  622. }
  623. static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
  624. struct drm_display_mode *mode)
  625. {
  626. struct drm_device *dev = encoder->dev;
  627. struct radeon_device *rdev = dev->dev_private;
  628. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  629. struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
  630. struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
  631. if (!dig || !dig->afmt)
  632. return;
  633. if (!connector)
  634. return;
  635. if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
  636. radeon_audio_write_speaker_allocation(encoder);
  637. radeon_audio_write_sad_regs(encoder);
  638. radeon_audio_write_latency_fields(encoder, mode);
  639. radeon_audio_set_dto(encoder, rdev->clock.vco_freq * 10);
  640. radeon_audio_set_audio_packet(encoder);
  641. radeon_audio_select_pin(encoder);
  642. if (radeon_audio_set_avi_packet(encoder, mode) < 0)
  643. return;
  644. }
  645. }
  646. void radeon_audio_mode_set(struct drm_encoder *encoder,
  647. struct drm_display_mode *mode)
  648. {
  649. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  650. if (radeon_encoder->audio && radeon_encoder->audio->mode_set)
  651. radeon_encoder->audio->mode_set(encoder, mode);
  652. }
  653. void radeon_audio_dpms(struct drm_encoder *encoder, int mode)
  654. {
  655. struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
  656. if (radeon_encoder->audio && radeon_encoder->audio->dpms)
  657. radeon_encoder->audio->dpms(encoder, mode == DRM_MODE_DPMS_ON);
  658. }
  659. unsigned int radeon_audio_decode_dfs_div(unsigned int div)
  660. {
  661. if (div >= 8 && div < 64)
  662. return (div - 8) * 25 + 200;
  663. else if (div >= 64 && div < 96)
  664. return (div - 64) * 50 + 1600;
  665. else if (div >= 96 && div < 128)
  666. return (div - 96) * 100 + 3200;
  667. else
  668. return 0;
  669. }