radeon_object.h 6.4 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #ifndef __RADEON_OBJECT_H__
  29. #define __RADEON_OBJECT_H__
  30. #include <drm/radeon_drm.h>
  31. #include "radeon.h"
  32. /**
  33. * radeon_mem_type_to_domain - return domain corresponding to mem_type
  34. * @mem_type: ttm memory type
  35. *
  36. * Returns corresponding domain of the ttm mem_type
  37. */
  38. static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
  39. {
  40. switch (mem_type) {
  41. case TTM_PL_VRAM:
  42. return RADEON_GEM_DOMAIN_VRAM;
  43. case TTM_PL_TT:
  44. return RADEON_GEM_DOMAIN_GTT;
  45. case TTM_PL_SYSTEM:
  46. return RADEON_GEM_DOMAIN_CPU;
  47. default:
  48. break;
  49. }
  50. return 0;
  51. }
  52. /**
  53. * radeon_bo_reserve - reserve bo
  54. * @bo: bo structure
  55. * @no_intr: don't return -ERESTARTSYS on pending signal
  56. *
  57. * Returns:
  58. * -ERESTARTSYS: A wait for the buffer to become unreserved was interrupted by
  59. * a signal. Release all buffer reservations and return to user-space.
  60. */
  61. static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr)
  62. {
  63. int r;
  64. r = ttm_bo_reserve(&bo->tbo, !no_intr, false, false, NULL);
  65. if (unlikely(r != 0)) {
  66. if (r != -ERESTARTSYS)
  67. dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
  68. return r;
  69. }
  70. return 0;
  71. }
  72. static inline void radeon_bo_unreserve(struct radeon_bo *bo)
  73. {
  74. ttm_bo_unreserve(&bo->tbo);
  75. }
  76. /**
  77. * radeon_bo_gpu_offset - return GPU offset of bo
  78. * @bo: radeon object for which we query the offset
  79. *
  80. * Returns current GPU offset of the object.
  81. *
  82. * Note: object should either be pinned or reserved when calling this
  83. * function, it might be useful to add check for this for debugging.
  84. */
  85. static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
  86. {
  87. return bo->tbo.offset;
  88. }
  89. static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
  90. {
  91. return bo->tbo.num_pages << PAGE_SHIFT;
  92. }
  93. static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
  94. {
  95. return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
  96. }
  97. static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
  98. {
  99. return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
  100. }
  101. /**
  102. * radeon_bo_mmap_offset - return mmap offset of bo
  103. * @bo: radeon object for which we query the offset
  104. *
  105. * Returns mmap offset of the object.
  106. */
  107. static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
  108. {
  109. return drm_vma_node_offset_addr(&bo->tbo.vma_node);
  110. }
  111. extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
  112. bool no_wait);
  113. extern int radeon_bo_create(struct radeon_device *rdev,
  114. unsigned long size, int byte_align,
  115. bool kernel, u32 domain, u32 flags,
  116. struct sg_table *sg,
  117. struct reservation_object *resv,
  118. struct radeon_bo **bo_ptr);
  119. extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
  120. extern void radeon_bo_kunmap(struct radeon_bo *bo);
  121. extern struct radeon_bo *radeon_bo_ref(struct radeon_bo *bo);
  122. extern void radeon_bo_unref(struct radeon_bo **bo);
  123. extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
  124. extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
  125. u64 max_offset, u64 *gpu_addr);
  126. extern int radeon_bo_unpin(struct radeon_bo *bo);
  127. extern int radeon_bo_evict_vram(struct radeon_device *rdev);
  128. extern void radeon_bo_force_delete(struct radeon_device *rdev);
  129. extern int radeon_bo_init(struct radeon_device *rdev);
  130. extern void radeon_bo_fini(struct radeon_device *rdev);
  131. extern int radeon_bo_list_validate(struct radeon_device *rdev,
  132. struct ww_acquire_ctx *ticket,
  133. struct list_head *head, int ring);
  134. extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
  135. u32 tiling_flags, u32 pitch);
  136. extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
  137. u32 *tiling_flags, u32 *pitch);
  138. extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
  139. bool force_drop);
  140. extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
  141. struct ttm_mem_reg *new_mem);
  142. extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
  143. extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
  144. extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
  145. bool shared);
  146. /*
  147. * sub allocation
  148. */
  149. static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
  150. {
  151. return sa_bo->manager->gpu_addr + sa_bo->soffset;
  152. }
  153. static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
  154. {
  155. return sa_bo->manager->cpu_ptr + sa_bo->soffset;
  156. }
  157. extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
  158. struct radeon_sa_manager *sa_manager,
  159. unsigned size, u32 align, u32 domain,
  160. u32 flags);
  161. extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
  162. struct radeon_sa_manager *sa_manager);
  163. extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
  164. struct radeon_sa_manager *sa_manager);
  165. extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
  166. struct radeon_sa_manager *sa_manager);
  167. extern int radeon_sa_bo_new(struct radeon_device *rdev,
  168. struct radeon_sa_manager *sa_manager,
  169. struct radeon_sa_bo **sa_bo,
  170. unsigned size, unsigned align);
  171. extern void radeon_sa_bo_free(struct radeon_device *rdev,
  172. struct radeon_sa_bo **sa_bo,
  173. struct radeon_fence *fence);
  174. #if defined(CONFIG_DEBUG_FS)
  175. extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
  176. struct seq_file *m);
  177. #endif
  178. #endif