radeon_vce.c 20 KB

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  1. /*
  2. * Copyright 2013 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. * Authors: Christian König <christian.koenig@amd.com>
  26. */
  27. #include <linux/firmware.h>
  28. #include <linux/module.h>
  29. #include <drm/drmP.h>
  30. #include <drm/drm.h>
  31. #include "radeon.h"
  32. #include "radeon_asic.h"
  33. #include "sid.h"
  34. /* 1 second timeout */
  35. #define VCE_IDLE_TIMEOUT_MS 1000
  36. /* Firmware Names */
  37. #define FIRMWARE_TAHITI "radeon/TAHITI_vce.bin"
  38. #define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin"
  39. MODULE_FIRMWARE(FIRMWARE_TAHITI);
  40. MODULE_FIRMWARE(FIRMWARE_BONAIRE);
  41. static void radeon_vce_idle_work_handler(struct work_struct *work);
  42. /**
  43. * radeon_vce_init - allocate memory, load vce firmware
  44. *
  45. * @rdev: radeon_device pointer
  46. *
  47. * First step to get VCE online, allocate memory and load the firmware
  48. */
  49. int radeon_vce_init(struct radeon_device *rdev)
  50. {
  51. static const char *fw_version = "[ATI LIB=VCEFW,";
  52. static const char *fb_version = "[ATI LIB=VCEFWSTATS,";
  53. unsigned long size;
  54. const char *fw_name, *c;
  55. uint8_t start, mid, end;
  56. int i, r;
  57. INIT_DELAYED_WORK(&rdev->vce.idle_work, radeon_vce_idle_work_handler);
  58. switch (rdev->family) {
  59. case CHIP_TAHITI:
  60. case CHIP_PITCAIRN:
  61. case CHIP_VERDE:
  62. case CHIP_OLAND:
  63. case CHIP_ARUBA:
  64. fw_name = FIRMWARE_TAHITI;
  65. break;
  66. case CHIP_BONAIRE:
  67. case CHIP_KAVERI:
  68. case CHIP_KABINI:
  69. case CHIP_HAWAII:
  70. case CHIP_MULLINS:
  71. fw_name = FIRMWARE_BONAIRE;
  72. break;
  73. default:
  74. return -EINVAL;
  75. }
  76. r = request_firmware(&rdev->vce_fw, fw_name, rdev->dev);
  77. if (r) {
  78. dev_err(rdev->dev, "radeon_vce: Can't load firmware \"%s\"\n",
  79. fw_name);
  80. return r;
  81. }
  82. /* search for firmware version */
  83. size = rdev->vce_fw->size - strlen(fw_version) - 9;
  84. c = rdev->vce_fw->data;
  85. for (;size > 0; --size, ++c)
  86. if (strncmp(c, fw_version, strlen(fw_version)) == 0)
  87. break;
  88. if (size == 0)
  89. return -EINVAL;
  90. c += strlen(fw_version);
  91. if (sscanf(c, "%2hhd.%2hhd.%2hhd]", &start, &mid, &end) != 3)
  92. return -EINVAL;
  93. /* search for feedback version */
  94. size = rdev->vce_fw->size - strlen(fb_version) - 3;
  95. c = rdev->vce_fw->data;
  96. for (;size > 0; --size, ++c)
  97. if (strncmp(c, fb_version, strlen(fb_version)) == 0)
  98. break;
  99. if (size == 0)
  100. return -EINVAL;
  101. c += strlen(fb_version);
  102. if (sscanf(c, "%2u]", &rdev->vce.fb_version) != 1)
  103. return -EINVAL;
  104. DRM_INFO("Found VCE firmware/feedback version %hhd.%hhd.%hhd / %d!\n",
  105. start, mid, end, rdev->vce.fb_version);
  106. rdev->vce.fw_version = (start << 24) | (mid << 16) | (end << 8);
  107. /* we can only work with this fw version for now */
  108. if ((rdev->vce.fw_version != ((40 << 24) | (2 << 16) | (2 << 8))) &&
  109. (rdev->vce.fw_version != ((50 << 24) | (0 << 16) | (1 << 8))) &&
  110. (rdev->vce.fw_version != ((50 << 24) | (1 << 16) | (2 << 8))))
  111. return -EINVAL;
  112. /* allocate firmware, stack and heap BO */
  113. if (rdev->family < CHIP_BONAIRE)
  114. size = vce_v1_0_bo_size(rdev);
  115. else
  116. size = vce_v2_0_bo_size(rdev);
  117. r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
  118. RADEON_GEM_DOMAIN_VRAM, 0, NULL, NULL,
  119. &rdev->vce.vcpu_bo);
  120. if (r) {
  121. dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r);
  122. return r;
  123. }
  124. r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
  125. if (r) {
  126. radeon_bo_unref(&rdev->vce.vcpu_bo);
  127. dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
  128. return r;
  129. }
  130. r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
  131. &rdev->vce.gpu_addr);
  132. radeon_bo_unreserve(rdev->vce.vcpu_bo);
  133. if (r) {
  134. radeon_bo_unref(&rdev->vce.vcpu_bo);
  135. dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r);
  136. return r;
  137. }
  138. for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
  139. atomic_set(&rdev->vce.handles[i], 0);
  140. rdev->vce.filp[i] = NULL;
  141. }
  142. return 0;
  143. }
  144. /**
  145. * radeon_vce_fini - free memory
  146. *
  147. * @rdev: radeon_device pointer
  148. *
  149. * Last step on VCE teardown, free firmware memory
  150. */
  151. void radeon_vce_fini(struct radeon_device *rdev)
  152. {
  153. if (rdev->vce.vcpu_bo == NULL)
  154. return;
  155. radeon_bo_unref(&rdev->vce.vcpu_bo);
  156. release_firmware(rdev->vce_fw);
  157. }
  158. /**
  159. * radeon_vce_suspend - unpin VCE fw memory
  160. *
  161. * @rdev: radeon_device pointer
  162. *
  163. */
  164. int radeon_vce_suspend(struct radeon_device *rdev)
  165. {
  166. int i;
  167. if (rdev->vce.vcpu_bo == NULL)
  168. return 0;
  169. for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
  170. if (atomic_read(&rdev->vce.handles[i]))
  171. break;
  172. if (i == RADEON_MAX_VCE_HANDLES)
  173. return 0;
  174. /* TODO: suspending running encoding sessions isn't supported */
  175. return -EINVAL;
  176. }
  177. /**
  178. * radeon_vce_resume - pin VCE fw memory
  179. *
  180. * @rdev: radeon_device pointer
  181. *
  182. */
  183. int radeon_vce_resume(struct radeon_device *rdev)
  184. {
  185. void *cpu_addr;
  186. int r;
  187. if (rdev->vce.vcpu_bo == NULL)
  188. return -EINVAL;
  189. r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
  190. if (r) {
  191. dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
  192. return r;
  193. }
  194. r = radeon_bo_kmap(rdev->vce.vcpu_bo, &cpu_addr);
  195. if (r) {
  196. radeon_bo_unreserve(rdev->vce.vcpu_bo);
  197. dev_err(rdev->dev, "(%d) VCE map failed\n", r);
  198. return r;
  199. }
  200. memset(cpu_addr, 0, radeon_bo_size(rdev->vce.vcpu_bo));
  201. if (rdev->family < CHIP_BONAIRE)
  202. r = vce_v1_0_load_fw(rdev, cpu_addr);
  203. else
  204. memcpy(cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
  205. radeon_bo_kunmap(rdev->vce.vcpu_bo);
  206. radeon_bo_unreserve(rdev->vce.vcpu_bo);
  207. return r;
  208. }
  209. /**
  210. * radeon_vce_idle_work_handler - power off VCE
  211. *
  212. * @work: pointer to work structure
  213. *
  214. * power of VCE when it's not used any more
  215. */
  216. static void radeon_vce_idle_work_handler(struct work_struct *work)
  217. {
  218. struct radeon_device *rdev =
  219. container_of(work, struct radeon_device, vce.idle_work.work);
  220. if ((radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE1_INDEX) == 0) &&
  221. (radeon_fence_count_emitted(rdev, TN_RING_TYPE_VCE2_INDEX) == 0)) {
  222. if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
  223. radeon_dpm_enable_vce(rdev, false);
  224. } else {
  225. radeon_set_vce_clocks(rdev, 0, 0);
  226. }
  227. } else {
  228. schedule_delayed_work(&rdev->vce.idle_work,
  229. msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
  230. }
  231. }
  232. /**
  233. * radeon_vce_note_usage - power up VCE
  234. *
  235. * @rdev: radeon_device pointer
  236. *
  237. * Make sure VCE is powerd up when we want to use it
  238. */
  239. void radeon_vce_note_usage(struct radeon_device *rdev)
  240. {
  241. bool streams_changed = false;
  242. bool set_clocks = !cancel_delayed_work_sync(&rdev->vce.idle_work);
  243. set_clocks &= schedule_delayed_work(&rdev->vce.idle_work,
  244. msecs_to_jiffies(VCE_IDLE_TIMEOUT_MS));
  245. if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
  246. /* XXX figure out if the streams changed */
  247. streams_changed = false;
  248. }
  249. if (set_clocks || streams_changed) {
  250. if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
  251. radeon_dpm_enable_vce(rdev, true);
  252. } else {
  253. radeon_set_vce_clocks(rdev, 53300, 40000);
  254. }
  255. }
  256. }
  257. /**
  258. * radeon_vce_free_handles - free still open VCE handles
  259. *
  260. * @rdev: radeon_device pointer
  261. * @filp: drm file pointer
  262. *
  263. * Close all VCE handles still open by this file pointer
  264. */
  265. void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp)
  266. {
  267. int i, r;
  268. for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
  269. uint32_t handle = atomic_read(&rdev->vce.handles[i]);
  270. if (!handle || rdev->vce.filp[i] != filp)
  271. continue;
  272. radeon_vce_note_usage(rdev);
  273. r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX,
  274. handle, NULL);
  275. if (r)
  276. DRM_ERROR("Error destroying VCE handle (%d)!\n", r);
  277. rdev->vce.filp[i] = NULL;
  278. atomic_set(&rdev->vce.handles[i], 0);
  279. }
  280. }
  281. /**
  282. * radeon_vce_get_create_msg - generate a VCE create msg
  283. *
  284. * @rdev: radeon_device pointer
  285. * @ring: ring we should submit the msg to
  286. * @handle: VCE session handle to use
  287. * @fence: optional fence to return
  288. *
  289. * Open up a stream for HW test
  290. */
  291. int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring,
  292. uint32_t handle, struct radeon_fence **fence)
  293. {
  294. const unsigned ib_size_dw = 1024;
  295. struct radeon_ib ib;
  296. uint64_t dummy;
  297. int i, r;
  298. r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
  299. if (r) {
  300. DRM_ERROR("radeon: failed to get ib (%d).\n", r);
  301. return r;
  302. }
  303. dummy = ib.gpu_addr + 1024;
  304. /* stitch together an VCE create msg */
  305. ib.length_dw = 0;
  306. ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
  307. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
  308. ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
  309. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */
  310. ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */
  311. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
  312. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000042);
  313. ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000a);
  314. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
  315. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000080);
  316. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000060);
  317. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
  318. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
  319. ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c);
  320. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
  321. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
  322. ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
  323. ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
  324. ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
  325. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
  326. for (i = ib.length_dw; i < ib_size_dw; ++i)
  327. ib.ptr[i] = cpu_to_le32(0x0);
  328. r = radeon_ib_schedule(rdev, &ib, NULL, false);
  329. if (r) {
  330. DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
  331. }
  332. if (fence)
  333. *fence = radeon_fence_ref(ib.fence);
  334. radeon_ib_free(rdev, &ib);
  335. return r;
  336. }
  337. /**
  338. * radeon_vce_get_destroy_msg - generate a VCE destroy msg
  339. *
  340. * @rdev: radeon_device pointer
  341. * @ring: ring we should submit the msg to
  342. * @handle: VCE session handle to use
  343. * @fence: optional fence to return
  344. *
  345. * Close up a stream for HW test or if userspace failed to do so
  346. */
  347. int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring,
  348. uint32_t handle, struct radeon_fence **fence)
  349. {
  350. const unsigned ib_size_dw = 1024;
  351. struct radeon_ib ib;
  352. uint64_t dummy;
  353. int i, r;
  354. r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
  355. if (r) {
  356. DRM_ERROR("radeon: failed to get ib (%d).\n", r);
  357. return r;
  358. }
  359. dummy = ib.gpu_addr + 1024;
  360. /* stitch together an VCE destroy msg */
  361. ib.length_dw = 0;
  362. ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
  363. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
  364. ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
  365. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
  366. ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
  367. ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
  368. ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
  369. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
  370. ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000008); /* len */
  371. ib.ptr[ib.length_dw++] = cpu_to_le32(0x02000001); /* destroy cmd */
  372. for (i = ib.length_dw; i < ib_size_dw; ++i)
  373. ib.ptr[i] = cpu_to_le32(0x0);
  374. r = radeon_ib_schedule(rdev, &ib, NULL, false);
  375. if (r) {
  376. DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
  377. }
  378. if (fence)
  379. *fence = radeon_fence_ref(ib.fence);
  380. radeon_ib_free(rdev, &ib);
  381. return r;
  382. }
  383. /**
  384. * radeon_vce_cs_reloc - command submission relocation
  385. *
  386. * @p: parser context
  387. * @lo: address of lower dword
  388. * @hi: address of higher dword
  389. * @size: size of checker for relocation buffer
  390. *
  391. * Patch relocation inside command stream with real buffer address
  392. */
  393. int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi,
  394. unsigned size)
  395. {
  396. struct radeon_cs_chunk *relocs_chunk;
  397. struct radeon_bo_list *reloc;
  398. uint64_t start, end, offset;
  399. unsigned idx;
  400. relocs_chunk = p->chunk_relocs;
  401. offset = radeon_get_ib_value(p, lo);
  402. idx = radeon_get_ib_value(p, hi);
  403. if (idx >= relocs_chunk->length_dw) {
  404. DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
  405. idx, relocs_chunk->length_dw);
  406. return -EINVAL;
  407. }
  408. reloc = &p->relocs[(idx / 4)];
  409. start = reloc->gpu_offset;
  410. end = start + radeon_bo_size(reloc->robj);
  411. start += offset;
  412. p->ib.ptr[lo] = start & 0xFFFFFFFF;
  413. p->ib.ptr[hi] = start >> 32;
  414. if (end <= start) {
  415. DRM_ERROR("invalid reloc offset %llX!\n", offset);
  416. return -EINVAL;
  417. }
  418. if ((end - start) < size) {
  419. DRM_ERROR("buffer to small (%d / %d)!\n",
  420. (unsigned)(end - start), size);
  421. return -EINVAL;
  422. }
  423. return 0;
  424. }
  425. /**
  426. * radeon_vce_validate_handle - validate stream handle
  427. *
  428. * @p: parser context
  429. * @handle: handle to validate
  430. * @allocated: allocated a new handle?
  431. *
  432. * Validates the handle and return the found session index or -EINVAL
  433. * we we don't have another free session index.
  434. */
  435. static int radeon_vce_validate_handle(struct radeon_cs_parser *p,
  436. uint32_t handle, bool *allocated)
  437. {
  438. unsigned i;
  439. *allocated = false;
  440. /* validate the handle */
  441. for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
  442. if (atomic_read(&p->rdev->vce.handles[i]) == handle) {
  443. if (p->rdev->vce.filp[i] != p->filp) {
  444. DRM_ERROR("VCE handle collision detected!\n");
  445. return -EINVAL;
  446. }
  447. return i;
  448. }
  449. }
  450. /* handle not found try to alloc a new one */
  451. for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
  452. if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) {
  453. p->rdev->vce.filp[i] = p->filp;
  454. p->rdev->vce.img_size[i] = 0;
  455. *allocated = true;
  456. return i;
  457. }
  458. }
  459. DRM_ERROR("No more free VCE handles!\n");
  460. return -EINVAL;
  461. }
  462. /**
  463. * radeon_vce_cs_parse - parse and validate the command stream
  464. *
  465. * @p: parser context
  466. *
  467. */
  468. int radeon_vce_cs_parse(struct radeon_cs_parser *p)
  469. {
  470. int session_idx = -1;
  471. bool destroyed = false, created = false, allocated = false;
  472. uint32_t tmp, handle = 0;
  473. uint32_t *size = &tmp;
  474. int i, r = 0;
  475. while (p->idx < p->chunk_ib->length_dw) {
  476. uint32_t len = radeon_get_ib_value(p, p->idx);
  477. uint32_t cmd = radeon_get_ib_value(p, p->idx + 1);
  478. if ((len < 8) || (len & 3)) {
  479. DRM_ERROR("invalid VCE command length (%d)!\n", len);
  480. r = -EINVAL;
  481. goto out;
  482. }
  483. if (destroyed) {
  484. DRM_ERROR("No other command allowed after destroy!\n");
  485. r = -EINVAL;
  486. goto out;
  487. }
  488. switch (cmd) {
  489. case 0x00000001: // session
  490. handle = radeon_get_ib_value(p, p->idx + 2);
  491. session_idx = radeon_vce_validate_handle(p, handle,
  492. &allocated);
  493. if (session_idx < 0)
  494. return session_idx;
  495. size = &p->rdev->vce.img_size[session_idx];
  496. break;
  497. case 0x00000002: // task info
  498. break;
  499. case 0x01000001: // create
  500. created = true;
  501. if (!allocated) {
  502. DRM_ERROR("Handle already in use!\n");
  503. r = -EINVAL;
  504. goto out;
  505. }
  506. *size = radeon_get_ib_value(p, p->idx + 8) *
  507. radeon_get_ib_value(p, p->idx + 10) *
  508. 8 * 3 / 2;
  509. break;
  510. case 0x04000001: // config extension
  511. case 0x04000002: // pic control
  512. case 0x04000005: // rate control
  513. case 0x04000007: // motion estimation
  514. case 0x04000008: // rdo
  515. case 0x04000009: // vui
  516. break;
  517. case 0x03000001: // encode
  518. r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9,
  519. *size);
  520. if (r)
  521. goto out;
  522. r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11,
  523. *size / 3);
  524. if (r)
  525. goto out;
  526. break;
  527. case 0x02000001: // destroy
  528. destroyed = true;
  529. break;
  530. case 0x05000001: // context buffer
  531. r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
  532. *size * 2);
  533. if (r)
  534. goto out;
  535. break;
  536. case 0x05000004: // video bitstream buffer
  537. tmp = radeon_get_ib_value(p, p->idx + 4);
  538. r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
  539. tmp);
  540. if (r)
  541. goto out;
  542. break;
  543. case 0x05000005: // feedback buffer
  544. r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2,
  545. 4096);
  546. if (r)
  547. goto out;
  548. break;
  549. default:
  550. DRM_ERROR("invalid VCE command (0x%x)!\n", cmd);
  551. r = -EINVAL;
  552. goto out;
  553. }
  554. if (session_idx == -1) {
  555. DRM_ERROR("no session command at start of IB\n");
  556. r = -EINVAL;
  557. goto out;
  558. }
  559. p->idx += len / 4;
  560. }
  561. if (allocated && !created) {
  562. DRM_ERROR("New session without create command!\n");
  563. r = -ENOENT;
  564. }
  565. out:
  566. if ((!r && destroyed) || (r && allocated)) {
  567. /*
  568. * IB contains a destroy msg or we have allocated an
  569. * handle and got an error, anyway free the handle
  570. */
  571. for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
  572. atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0);
  573. }
  574. return r;
  575. }
  576. /**
  577. * radeon_vce_semaphore_emit - emit a semaphore command
  578. *
  579. * @rdev: radeon_device pointer
  580. * @ring: engine to use
  581. * @semaphore: address of semaphore
  582. * @emit_wait: true=emit wait, false=emit signal
  583. *
  584. */
  585. bool radeon_vce_semaphore_emit(struct radeon_device *rdev,
  586. struct radeon_ring *ring,
  587. struct radeon_semaphore *semaphore,
  588. bool emit_wait)
  589. {
  590. uint64_t addr = semaphore->gpu_addr;
  591. radeon_ring_write(ring, cpu_to_le32(VCE_CMD_SEMAPHORE));
  592. radeon_ring_write(ring, cpu_to_le32((addr >> 3) & 0x000FFFFF));
  593. radeon_ring_write(ring, cpu_to_le32((addr >> 23) & 0x000FFFFF));
  594. radeon_ring_write(ring, cpu_to_le32(0x01003000 | (emit_wait ? 1 : 0)));
  595. if (!emit_wait)
  596. radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
  597. return true;
  598. }
  599. /**
  600. * radeon_vce_ib_execute - execute indirect buffer
  601. *
  602. * @rdev: radeon_device pointer
  603. * @ib: the IB to execute
  604. *
  605. */
  606. void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
  607. {
  608. struct radeon_ring *ring = &rdev->ring[ib->ring];
  609. radeon_ring_write(ring, cpu_to_le32(VCE_CMD_IB));
  610. radeon_ring_write(ring, cpu_to_le32(ib->gpu_addr));
  611. radeon_ring_write(ring, cpu_to_le32(upper_32_bits(ib->gpu_addr)));
  612. radeon_ring_write(ring, cpu_to_le32(ib->length_dw));
  613. }
  614. /**
  615. * radeon_vce_fence_emit - add a fence command to the ring
  616. *
  617. * @rdev: radeon_device pointer
  618. * @fence: the fence
  619. *
  620. */
  621. void radeon_vce_fence_emit(struct radeon_device *rdev,
  622. struct radeon_fence *fence)
  623. {
  624. struct radeon_ring *ring = &rdev->ring[fence->ring];
  625. uint64_t addr = rdev->fence_drv[fence->ring].gpu_addr;
  626. radeon_ring_write(ring, cpu_to_le32(VCE_CMD_FENCE));
  627. radeon_ring_write(ring, cpu_to_le32(addr));
  628. radeon_ring_write(ring, cpu_to_le32(upper_32_bits(addr)));
  629. radeon_ring_write(ring, cpu_to_le32(fence->seq));
  630. radeon_ring_write(ring, cpu_to_le32(VCE_CMD_TRAP));
  631. radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
  632. }
  633. /**
  634. * radeon_vce_ring_test - test if VCE ring is working
  635. *
  636. * @rdev: radeon_device pointer
  637. * @ring: the engine to test on
  638. *
  639. */
  640. int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring)
  641. {
  642. uint32_t rptr = vce_v1_0_get_rptr(rdev, ring);
  643. unsigned i;
  644. int r;
  645. r = radeon_ring_lock(rdev, ring, 16);
  646. if (r) {
  647. DRM_ERROR("radeon: vce failed to lock ring %d (%d).\n",
  648. ring->idx, r);
  649. return r;
  650. }
  651. radeon_ring_write(ring, cpu_to_le32(VCE_CMD_END));
  652. radeon_ring_unlock_commit(rdev, ring, false);
  653. for (i = 0; i < rdev->usec_timeout; i++) {
  654. if (vce_v1_0_get_rptr(rdev, ring) != rptr)
  655. break;
  656. DRM_UDELAY(1);
  657. }
  658. if (i < rdev->usec_timeout) {
  659. DRM_INFO("ring test on %d succeeded in %d usecs\n",
  660. ring->idx, i);
  661. } else {
  662. DRM_ERROR("radeon: ring %d test failed\n",
  663. ring->idx);
  664. r = -ETIMEDOUT;
  665. }
  666. return r;
  667. }
  668. /**
  669. * radeon_vce_ib_test - test if VCE IBs are working
  670. *
  671. * @rdev: radeon_device pointer
  672. * @ring: the engine to test on
  673. *
  674. */
  675. int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
  676. {
  677. struct radeon_fence *fence = NULL;
  678. int r;
  679. r = radeon_vce_get_create_msg(rdev, ring->idx, 1, NULL);
  680. if (r) {
  681. DRM_ERROR("radeon: failed to get create msg (%d).\n", r);
  682. goto error;
  683. }
  684. r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence);
  685. if (r) {
  686. DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r);
  687. goto error;
  688. }
  689. r = radeon_fence_wait(fence, false);
  690. if (r) {
  691. DRM_ERROR("radeon: fence wait failed (%d).\n", r);
  692. } else {
  693. DRM_INFO("ib test on ring %d succeeded\n", ring->idx);
  694. }
  695. error:
  696. radeon_fence_unref(&fence);
  697. return r;
  698. }