rcar_du_kms.c 22 KB

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  1. /*
  2. * rcar_du_kms.c -- R-Car Display Unit Mode Setting
  3. *
  4. * Copyright (C) 2013-2014 Renesas Electronics Corporation
  5. *
  6. * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <drm/drmP.h>
  14. #include <drm/drm_atomic.h>
  15. #include <drm/drm_atomic_helper.h>
  16. #include <drm/drm_crtc.h>
  17. #include <drm/drm_crtc_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <linux/of_graph.h>
  21. #include <linux/wait.h>
  22. #include "rcar_du_crtc.h"
  23. #include "rcar_du_drv.h"
  24. #include "rcar_du_encoder.h"
  25. #include "rcar_du_kms.h"
  26. #include "rcar_du_lvdsenc.h"
  27. #include "rcar_du_regs.h"
  28. /* -----------------------------------------------------------------------------
  29. * Format helpers
  30. */
  31. static const struct rcar_du_format_info rcar_du_format_infos[] = {
  32. {
  33. .fourcc = DRM_FORMAT_RGB565,
  34. .bpp = 16,
  35. .planes = 1,
  36. .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  37. .edf = PnDDCR4_EDF_NONE,
  38. }, {
  39. .fourcc = DRM_FORMAT_ARGB1555,
  40. .bpp = 16,
  41. .planes = 1,
  42. .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  43. .edf = PnDDCR4_EDF_NONE,
  44. }, {
  45. .fourcc = DRM_FORMAT_XRGB1555,
  46. .bpp = 16,
  47. .planes = 1,
  48. .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  49. .edf = PnDDCR4_EDF_NONE,
  50. }, {
  51. .fourcc = DRM_FORMAT_XRGB8888,
  52. .bpp = 32,
  53. .planes = 1,
  54. .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  55. .edf = PnDDCR4_EDF_RGB888,
  56. }, {
  57. .fourcc = DRM_FORMAT_ARGB8888,
  58. .bpp = 32,
  59. .planes = 1,
  60. .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
  61. .edf = PnDDCR4_EDF_ARGB8888,
  62. }, {
  63. .fourcc = DRM_FORMAT_UYVY,
  64. .bpp = 16,
  65. .planes = 1,
  66. .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  67. .edf = PnDDCR4_EDF_NONE,
  68. }, {
  69. .fourcc = DRM_FORMAT_YUYV,
  70. .bpp = 16,
  71. .planes = 1,
  72. .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  73. .edf = PnDDCR4_EDF_NONE,
  74. }, {
  75. .fourcc = DRM_FORMAT_NV12,
  76. .bpp = 12,
  77. .planes = 2,
  78. .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  79. .edf = PnDDCR4_EDF_NONE,
  80. }, {
  81. .fourcc = DRM_FORMAT_NV21,
  82. .bpp = 12,
  83. .planes = 2,
  84. .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  85. .edf = PnDDCR4_EDF_NONE,
  86. }, {
  87. /* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
  88. .fourcc = DRM_FORMAT_NV16,
  89. .bpp = 16,
  90. .planes = 2,
  91. .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  92. .edf = PnDDCR4_EDF_NONE,
  93. },
  94. };
  95. const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
  96. {
  97. unsigned int i;
  98. for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
  99. if (rcar_du_format_infos[i].fourcc == fourcc)
  100. return &rcar_du_format_infos[i];
  101. }
  102. return NULL;
  103. }
  104. /* -----------------------------------------------------------------------------
  105. * Frame buffer
  106. */
  107. int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
  108. struct drm_mode_create_dumb *args)
  109. {
  110. struct rcar_du_device *rcdu = dev->dev_private;
  111. unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
  112. unsigned int align;
  113. /* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
  114. * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
  115. */
  116. if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
  117. align = 128;
  118. else
  119. align = 16 * args->bpp / 8;
  120. args->pitch = roundup(min_pitch, align);
  121. return drm_gem_cma_dumb_create_internal(file, dev, args);
  122. }
  123. static struct drm_framebuffer *
  124. rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
  125. struct drm_mode_fb_cmd2 *mode_cmd)
  126. {
  127. struct rcar_du_device *rcdu = dev->dev_private;
  128. const struct rcar_du_format_info *format;
  129. unsigned int max_pitch;
  130. unsigned int align;
  131. unsigned int bpp;
  132. format = rcar_du_format_info(mode_cmd->pixel_format);
  133. if (format == NULL) {
  134. dev_dbg(dev->dev, "unsupported pixel format %08x\n",
  135. mode_cmd->pixel_format);
  136. return ERR_PTR(-EINVAL);
  137. }
  138. /*
  139. * The pitch and alignment constraints are expressed in pixels on the
  140. * hardware side and in bytes in the DRM API.
  141. */
  142. bpp = format->planes == 2 ? 1 : format->bpp / 8;
  143. max_pitch = 4096 * bpp;
  144. if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
  145. align = 128;
  146. else
  147. align = 16 * bpp;
  148. if (mode_cmd->pitches[0] & (align - 1) ||
  149. mode_cmd->pitches[0] >= max_pitch) {
  150. dev_dbg(dev->dev, "invalid pitch value %u\n",
  151. mode_cmd->pitches[0]);
  152. return ERR_PTR(-EINVAL);
  153. }
  154. if (format->planes == 2) {
  155. if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
  156. dev_dbg(dev->dev,
  157. "luma and chroma pitches do not match\n");
  158. return ERR_PTR(-EINVAL);
  159. }
  160. }
  161. return drm_fb_cma_create(dev, file_priv, mode_cmd);
  162. }
  163. static void rcar_du_output_poll_changed(struct drm_device *dev)
  164. {
  165. struct rcar_du_device *rcdu = dev->dev_private;
  166. drm_fbdev_cma_hotplug_event(rcdu->fbdev);
  167. }
  168. /* -----------------------------------------------------------------------------
  169. * Atomic Check and Update
  170. */
  171. /*
  172. * Atomic hardware plane allocator
  173. *
  174. * The hardware plane allocator is solely based on the atomic plane states
  175. * without keeping any external state to avoid races between .atomic_check()
  176. * and .atomic_commit().
  177. *
  178. * The core idea is to avoid using a free planes bitmask that would need to be
  179. * shared between check and commit handlers with a collective knowledge based on
  180. * the allocated hardware plane(s) for each KMS plane. The allocator then loops
  181. * over all plane states to compute the free planes bitmask, allocates hardware
  182. * planes based on that bitmask, and stores the result back in the plane states.
  183. *
  184. * For this to work we need to access the current state of planes not touched by
  185. * the atomic update. To ensure that it won't be modified, we need to lock all
  186. * planes using drm_atomic_get_plane_state(). This effectively serializes atomic
  187. * updates from .atomic_check() up to completion (when swapping the states if
  188. * the check step has succeeded) or rollback (when freeing the states if the
  189. * check step has failed).
  190. *
  191. * Allocation is performed in the .atomic_check() handler and applied
  192. * automatically when the core swaps the old and new states.
  193. */
  194. static bool rcar_du_plane_needs_realloc(struct rcar_du_plane *plane,
  195. struct rcar_du_plane_state *state)
  196. {
  197. const struct rcar_du_format_info *cur_format;
  198. cur_format = to_rcar_plane_state(plane->plane.state)->format;
  199. /* Lowering the number of planes doesn't strictly require reallocation
  200. * as the extra hardware plane will be freed when committing, but doing
  201. * so could lead to more fragmentation.
  202. */
  203. return !cur_format || cur_format->planes != state->format->planes;
  204. }
  205. static unsigned int rcar_du_plane_hwmask(struct rcar_du_plane_state *state)
  206. {
  207. unsigned int mask;
  208. if (state->hwindex == -1)
  209. return 0;
  210. mask = 1 << state->hwindex;
  211. if (state->format->planes == 2)
  212. mask |= 1 << ((state->hwindex + 1) % 8);
  213. return mask;
  214. }
  215. static int rcar_du_plane_hwalloc(unsigned int num_planes, unsigned int free)
  216. {
  217. unsigned int i;
  218. for (i = 0; i < RCAR_DU_NUM_HW_PLANES; ++i) {
  219. if (!(free & (1 << i)))
  220. continue;
  221. if (num_planes == 1 || free & (1 << ((i + 1) % 8)))
  222. break;
  223. }
  224. return i == RCAR_DU_NUM_HW_PLANES ? -EBUSY : i;
  225. }
  226. static int rcar_du_atomic_check(struct drm_device *dev,
  227. struct drm_atomic_state *state)
  228. {
  229. struct rcar_du_device *rcdu = dev->dev_private;
  230. unsigned int group_freed_planes[RCAR_DU_MAX_GROUPS] = { 0, };
  231. unsigned int group_free_planes[RCAR_DU_MAX_GROUPS] = { 0, };
  232. bool needs_realloc = false;
  233. unsigned int groups = 0;
  234. unsigned int i;
  235. int ret;
  236. ret = drm_atomic_helper_check(dev, state);
  237. if (ret < 0)
  238. return ret;
  239. /* Check if hardware planes need to be reallocated. */
  240. for (i = 0; i < dev->mode_config.num_total_plane; ++i) {
  241. struct rcar_du_plane_state *plane_state;
  242. struct rcar_du_plane *plane;
  243. unsigned int index;
  244. if (!state->planes[i])
  245. continue;
  246. plane = to_rcar_plane(state->planes[i]);
  247. plane_state = to_rcar_plane_state(state->plane_states[i]);
  248. dev_dbg(rcdu->dev, "%s: checking plane (%u,%u)\n", __func__,
  249. plane->group->index, plane - plane->group->planes);
  250. /* If the plane is being disabled we don't need to go through
  251. * the full reallocation procedure. Just mark the hardware
  252. * plane(s) as freed.
  253. */
  254. if (!plane_state->format) {
  255. dev_dbg(rcdu->dev, "%s: plane is being disabled\n",
  256. __func__);
  257. index = plane - plane->group->planes;
  258. group_freed_planes[plane->group->index] |= 1 << index;
  259. plane_state->hwindex = -1;
  260. continue;
  261. }
  262. /* If the plane needs to be reallocated mark it as such, and
  263. * mark the hardware plane(s) as free.
  264. */
  265. if (rcar_du_plane_needs_realloc(plane, plane_state)) {
  266. dev_dbg(rcdu->dev, "%s: plane needs reallocation\n",
  267. __func__);
  268. groups |= 1 << plane->group->index;
  269. needs_realloc = true;
  270. index = plane - plane->group->planes;
  271. group_freed_planes[plane->group->index] |= 1 << index;
  272. plane_state->hwindex = -1;
  273. }
  274. }
  275. if (!needs_realloc)
  276. return 0;
  277. /* Grab all plane states for the groups that need reallocation to ensure
  278. * locking and avoid racy updates. This serializes the update operation,
  279. * but there's not much we can do about it as that's the hardware
  280. * design.
  281. *
  282. * Compute the used planes mask for each group at the same time to avoid
  283. * looping over the planes separately later.
  284. */
  285. while (groups) {
  286. unsigned int index = ffs(groups) - 1;
  287. struct rcar_du_group *group = &rcdu->groups[index];
  288. unsigned int used_planes = 0;
  289. dev_dbg(rcdu->dev, "%s: finding free planes for group %u\n",
  290. __func__, index);
  291. for (i = 0; i < group->num_planes; ++i) {
  292. struct rcar_du_plane *plane = &group->planes[i];
  293. struct rcar_du_plane_state *plane_state;
  294. struct drm_plane_state *s;
  295. s = drm_atomic_get_plane_state(state, &plane->plane);
  296. if (IS_ERR(s))
  297. return PTR_ERR(s);
  298. /* If the plane has been freed in the above loop its
  299. * hardware planes must not be added to the used planes
  300. * bitmask. However, the current state doesn't reflect
  301. * the free state yet, as we've modified the new state
  302. * above. Use the local freed planes list to check for
  303. * that condition instead.
  304. */
  305. if (group_freed_planes[index] & (1 << i)) {
  306. dev_dbg(rcdu->dev,
  307. "%s: plane (%u,%u) has been freed, skipping\n",
  308. __func__, plane->group->index,
  309. plane - plane->group->planes);
  310. continue;
  311. }
  312. plane_state = to_rcar_plane_state(plane->plane.state);
  313. used_planes |= rcar_du_plane_hwmask(plane_state);
  314. dev_dbg(rcdu->dev,
  315. "%s: plane (%u,%u) uses %u hwplanes (index %d)\n",
  316. __func__, plane->group->index,
  317. plane - plane->group->planes,
  318. plane_state->format ?
  319. plane_state->format->planes : 0,
  320. plane_state->hwindex);
  321. }
  322. group_free_planes[index] = 0xff & ~used_planes;
  323. groups &= ~(1 << index);
  324. dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
  325. __func__, index, group_free_planes[index]);
  326. }
  327. /* Reallocate hardware planes for each plane that needs it. */
  328. for (i = 0; i < dev->mode_config.num_total_plane; ++i) {
  329. struct rcar_du_plane_state *plane_state;
  330. struct rcar_du_plane *plane;
  331. unsigned int crtc_planes;
  332. unsigned int free;
  333. int idx;
  334. if (!state->planes[i])
  335. continue;
  336. plane = to_rcar_plane(state->planes[i]);
  337. plane_state = to_rcar_plane_state(state->plane_states[i]);
  338. dev_dbg(rcdu->dev, "%s: allocating plane (%u,%u)\n", __func__,
  339. plane->group->index, plane - plane->group->planes);
  340. /* Skip planes that are being disabled or don't need to be
  341. * reallocated.
  342. */
  343. if (!plane_state->format ||
  344. !rcar_du_plane_needs_realloc(plane, plane_state))
  345. continue;
  346. /* Try to allocate the plane from the free planes currently
  347. * associated with the target CRTC to avoid restarting the CRTC
  348. * group and thus minimize flicker. If it fails fall back to
  349. * allocating from all free planes.
  350. */
  351. crtc_planes = to_rcar_crtc(plane_state->state.crtc)->index % 2
  352. ? plane->group->dptsr_planes
  353. : ~plane->group->dptsr_planes;
  354. free = group_free_planes[plane->group->index];
  355. idx = rcar_du_plane_hwalloc(plane_state->format->planes,
  356. free & crtc_planes);
  357. if (idx < 0)
  358. idx = rcar_du_plane_hwalloc(plane_state->format->planes,
  359. free);
  360. if (idx < 0) {
  361. dev_dbg(rcdu->dev, "%s: no available hardware plane\n",
  362. __func__);
  363. return idx;
  364. }
  365. dev_dbg(rcdu->dev, "%s: allocated %u hwplanes (index %u)\n",
  366. __func__, plane_state->format->planes, idx);
  367. plane_state->hwindex = idx;
  368. group_free_planes[plane->group->index] &=
  369. ~rcar_du_plane_hwmask(plane_state);
  370. dev_dbg(rcdu->dev, "%s: group %u free planes mask 0x%02x\n",
  371. __func__, plane->group->index,
  372. group_free_planes[plane->group->index]);
  373. }
  374. return 0;
  375. }
  376. struct rcar_du_commit {
  377. struct work_struct work;
  378. struct drm_device *dev;
  379. struct drm_atomic_state *state;
  380. u32 crtcs;
  381. };
  382. static void rcar_du_atomic_complete(struct rcar_du_commit *commit)
  383. {
  384. struct drm_device *dev = commit->dev;
  385. struct rcar_du_device *rcdu = dev->dev_private;
  386. struct drm_atomic_state *old_state = commit->state;
  387. /* Apply the atomic update. */
  388. drm_atomic_helper_commit_modeset_disables(dev, old_state);
  389. drm_atomic_helper_commit_modeset_enables(dev, old_state);
  390. drm_atomic_helper_commit_planes(dev, old_state, false);
  391. drm_atomic_helper_wait_for_vblanks(dev, old_state);
  392. drm_atomic_helper_cleanup_planes(dev, old_state);
  393. drm_atomic_state_free(old_state);
  394. /* Complete the commit, wake up any waiter. */
  395. spin_lock(&rcdu->commit.wait.lock);
  396. rcdu->commit.pending &= ~commit->crtcs;
  397. wake_up_all_locked(&rcdu->commit.wait);
  398. spin_unlock(&rcdu->commit.wait.lock);
  399. kfree(commit);
  400. }
  401. static void rcar_du_atomic_work(struct work_struct *work)
  402. {
  403. struct rcar_du_commit *commit =
  404. container_of(work, struct rcar_du_commit, work);
  405. rcar_du_atomic_complete(commit);
  406. }
  407. static int rcar_du_atomic_commit(struct drm_device *dev,
  408. struct drm_atomic_state *state, bool async)
  409. {
  410. struct rcar_du_device *rcdu = dev->dev_private;
  411. struct rcar_du_commit *commit;
  412. unsigned int i;
  413. int ret;
  414. ret = drm_atomic_helper_prepare_planes(dev, state);
  415. if (ret)
  416. return ret;
  417. /* Allocate the commit object. */
  418. commit = kzalloc(sizeof(*commit), GFP_KERNEL);
  419. if (commit == NULL) {
  420. ret = -ENOMEM;
  421. goto error;
  422. }
  423. INIT_WORK(&commit->work, rcar_du_atomic_work);
  424. commit->dev = dev;
  425. commit->state = state;
  426. /* Wait until all affected CRTCs have completed previous commits and
  427. * mark them as pending.
  428. */
  429. for (i = 0; i < dev->mode_config.num_crtc; ++i) {
  430. if (state->crtcs[i])
  431. commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]);
  432. }
  433. spin_lock(&rcdu->commit.wait.lock);
  434. ret = wait_event_interruptible_locked(rcdu->commit.wait,
  435. !(rcdu->commit.pending & commit->crtcs));
  436. if (ret == 0)
  437. rcdu->commit.pending |= commit->crtcs;
  438. spin_unlock(&rcdu->commit.wait.lock);
  439. if (ret) {
  440. kfree(commit);
  441. goto error;
  442. }
  443. /* Swap the state, this is the point of no return. */
  444. drm_atomic_helper_swap_state(dev, state);
  445. if (async)
  446. schedule_work(&commit->work);
  447. else
  448. rcar_du_atomic_complete(commit);
  449. return 0;
  450. error:
  451. drm_atomic_helper_cleanup_planes(dev, state);
  452. return ret;
  453. }
  454. /* -----------------------------------------------------------------------------
  455. * Initialization
  456. */
  457. static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
  458. .fb_create = rcar_du_fb_create,
  459. .output_poll_changed = rcar_du_output_poll_changed,
  460. .atomic_check = rcar_du_atomic_check,
  461. .atomic_commit = rcar_du_atomic_commit,
  462. };
  463. static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
  464. enum rcar_du_output output,
  465. struct of_endpoint *ep)
  466. {
  467. static const struct {
  468. const char *compatible;
  469. enum rcar_du_encoder_type type;
  470. } encoders[] = {
  471. { "adi,adv7123", RCAR_DU_ENCODER_VGA },
  472. { "adi,adv7511w", RCAR_DU_ENCODER_HDMI },
  473. { "thine,thc63lvdm83d", RCAR_DU_ENCODER_LVDS },
  474. };
  475. enum rcar_du_encoder_type enc_type = RCAR_DU_ENCODER_NONE;
  476. struct device_node *connector = NULL;
  477. struct device_node *encoder = NULL;
  478. struct device_node *ep_node = NULL;
  479. struct device_node *entity_ep_node;
  480. struct device_node *entity;
  481. int ret;
  482. /*
  483. * Locate the connected entity and infer its type from the number of
  484. * endpoints.
  485. */
  486. entity = of_graph_get_remote_port_parent(ep->local_node);
  487. if (!entity) {
  488. dev_dbg(rcdu->dev, "unconnected endpoint %s, skipping\n",
  489. ep->local_node->full_name);
  490. return -ENODEV;
  491. }
  492. entity_ep_node = of_parse_phandle(ep->local_node, "remote-endpoint", 0);
  493. for_each_endpoint_of_node(entity, ep_node) {
  494. if (ep_node == entity_ep_node)
  495. continue;
  496. /*
  497. * We've found one endpoint other than the input, this must
  498. * be an encoder. Locate the connector.
  499. */
  500. encoder = entity;
  501. connector = of_graph_get_remote_port_parent(ep_node);
  502. of_node_put(ep_node);
  503. if (!connector) {
  504. dev_warn(rcdu->dev,
  505. "no connector for encoder %s, skipping\n",
  506. encoder->full_name);
  507. of_node_put(entity_ep_node);
  508. of_node_put(encoder);
  509. return -ENODEV;
  510. }
  511. break;
  512. }
  513. of_node_put(entity_ep_node);
  514. if (encoder) {
  515. /*
  516. * If an encoder has been found, get its type based on its
  517. * compatible string.
  518. */
  519. unsigned int i;
  520. for (i = 0; i < ARRAY_SIZE(encoders); ++i) {
  521. if (of_device_is_compatible(encoder,
  522. encoders[i].compatible)) {
  523. enc_type = encoders[i].type;
  524. break;
  525. }
  526. }
  527. if (i == ARRAY_SIZE(encoders)) {
  528. dev_warn(rcdu->dev,
  529. "unknown encoder type for %s, skipping\n",
  530. encoder->full_name);
  531. of_node_put(encoder);
  532. of_node_put(connector);
  533. return -EINVAL;
  534. }
  535. } else {
  536. /*
  537. * If no encoder has been found the entity must be the
  538. * connector.
  539. */
  540. connector = entity;
  541. }
  542. ret = rcar_du_encoder_init(rcdu, enc_type, output, encoder, connector);
  543. if (ret && ret != -EPROBE_DEFER)
  544. dev_warn(rcdu->dev,
  545. "failed to initialize encoder %s on output %u (%d), skipping\n",
  546. of_node_full_name(encoder), output, ret);
  547. of_node_put(encoder);
  548. of_node_put(connector);
  549. return ret;
  550. }
  551. static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
  552. {
  553. struct device_node *np = rcdu->dev->of_node;
  554. struct device_node *ep_node;
  555. unsigned int num_encoders = 0;
  556. /*
  557. * Iterate over the endpoints and create one encoder for each output
  558. * pipeline.
  559. */
  560. for_each_endpoint_of_node(np, ep_node) {
  561. enum rcar_du_output output;
  562. struct of_endpoint ep;
  563. unsigned int i;
  564. int ret;
  565. ret = of_graph_parse_endpoint(ep_node, &ep);
  566. if (ret < 0) {
  567. of_node_put(ep_node);
  568. return ret;
  569. }
  570. /* Find the output route corresponding to the port number. */
  571. for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
  572. if (rcdu->info->routes[i].possible_crtcs &&
  573. rcdu->info->routes[i].port == ep.port) {
  574. output = i;
  575. break;
  576. }
  577. }
  578. if (i == RCAR_DU_OUTPUT_MAX) {
  579. dev_warn(rcdu->dev,
  580. "port %u references unexisting output, skipping\n",
  581. ep.port);
  582. continue;
  583. }
  584. /* Process the output pipeline. */
  585. ret = rcar_du_encoders_init_one(rcdu, output, &ep);
  586. if (ret < 0) {
  587. if (ret == -EPROBE_DEFER) {
  588. of_node_put(ep_node);
  589. return ret;
  590. }
  591. continue;
  592. }
  593. num_encoders++;
  594. }
  595. return num_encoders;
  596. }
  597. static int rcar_du_properties_init(struct rcar_du_device *rcdu)
  598. {
  599. rcdu->props.alpha =
  600. drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
  601. if (rcdu->props.alpha == NULL)
  602. return -ENOMEM;
  603. /* The color key is expressed as an RGB888 triplet stored in a 32-bit
  604. * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
  605. * or enable source color keying (1).
  606. */
  607. rcdu->props.colorkey =
  608. drm_property_create_range(rcdu->ddev, 0, "colorkey",
  609. 0, 0x01ffffff);
  610. if (rcdu->props.colorkey == NULL)
  611. return -ENOMEM;
  612. rcdu->props.zpos =
  613. drm_property_create_range(rcdu->ddev, 0, "zpos", 1, 7);
  614. if (rcdu->props.zpos == NULL)
  615. return -ENOMEM;
  616. return 0;
  617. }
  618. int rcar_du_modeset_init(struct rcar_du_device *rcdu)
  619. {
  620. static const unsigned int mmio_offsets[] = {
  621. DU0_REG_OFFSET, DU2_REG_OFFSET
  622. };
  623. struct drm_device *dev = rcdu->ddev;
  624. struct drm_encoder *encoder;
  625. struct drm_fbdev_cma *fbdev;
  626. unsigned int num_encoders;
  627. unsigned int num_groups;
  628. unsigned int i;
  629. int ret;
  630. drm_mode_config_init(dev);
  631. dev->mode_config.min_width = 0;
  632. dev->mode_config.min_height = 0;
  633. dev->mode_config.max_width = 4095;
  634. dev->mode_config.max_height = 2047;
  635. dev->mode_config.funcs = &rcar_du_mode_config_funcs;
  636. rcdu->num_crtcs = rcdu->info->num_crtcs;
  637. ret = rcar_du_properties_init(rcdu);
  638. if (ret < 0)
  639. return ret;
  640. /* Initialize vertical blanking interrupts handling. Start with vblank
  641. * disabled for all CRTCs.
  642. */
  643. ret = drm_vblank_init(dev, (1 << rcdu->info->num_crtcs) - 1);
  644. if (ret < 0)
  645. return ret;
  646. /* Initialize the groups. */
  647. num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
  648. for (i = 0; i < num_groups; ++i) {
  649. struct rcar_du_group *rgrp = &rcdu->groups[i];
  650. mutex_init(&rgrp->lock);
  651. rgrp->dev = rcdu;
  652. rgrp->mmio_offset = mmio_offsets[i];
  653. rgrp->index = i;
  654. rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U);
  655. /* If we have more than one CRTCs in this group pre-associate
  656. * planes 0-3 with CRTC 0 and planes 4-7 with CRTC 1 to minimize
  657. * flicker occurring when the association is changed.
  658. */
  659. rgrp->dptsr_planes = rgrp->num_crtcs > 1 ? 0xf0 : 0;
  660. ret = rcar_du_planes_init(rgrp);
  661. if (ret < 0)
  662. return ret;
  663. }
  664. /* Create the CRTCs. */
  665. for (i = 0; i < rcdu->num_crtcs; ++i) {
  666. struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
  667. ret = rcar_du_crtc_create(rgrp, i);
  668. if (ret < 0)
  669. return ret;
  670. }
  671. /* Initialize the encoders. */
  672. ret = rcar_du_lvdsenc_init(rcdu);
  673. if (ret < 0)
  674. return ret;
  675. ret = rcar_du_encoders_init(rcdu);
  676. if (ret < 0)
  677. return ret;
  678. if (ret == 0) {
  679. dev_err(rcdu->dev, "error: no encoder could be initialized\n");
  680. return -EINVAL;
  681. }
  682. num_encoders = ret;
  683. /* Set the possible CRTCs and possible clones. There's always at least
  684. * one way for all encoders to clone each other, set all bits in the
  685. * possible clones field.
  686. */
  687. list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
  688. struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
  689. const struct rcar_du_output_routing *route =
  690. &rcdu->info->routes[renc->output];
  691. encoder->possible_crtcs = route->possible_crtcs;
  692. encoder->possible_clones = (1 << num_encoders) - 1;
  693. }
  694. drm_mode_config_reset(dev);
  695. drm_kms_helper_poll_init(dev);
  696. if (dev->mode_config.num_connector) {
  697. fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
  698. dev->mode_config.num_connector);
  699. if (IS_ERR(fbdev))
  700. return PTR_ERR(fbdev);
  701. rcdu->fbdev = fbdev;
  702. } else {
  703. dev_info(rcdu->dev,
  704. "no connector found, disabling fbdev emulation\n");
  705. }
  706. return 0;
  707. }