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- 1. stiH display hardware IP
- ---------------------------
- The STMicroelectronics stiH SoCs use a common chain of HW display IP blocks:
- - The High Quality Video Display Processor (HQVDP) gets video frames from a
- video decoder and does high quality video processing, including scaling.
- - The Compositor is a multiplane, dual-mixer (Main & Aux) digital processor. It
- has several inputs:
- - The graphics planes are internally processed by the Generic Display
- Pipeline (GDP).
- - The video plug (VID) connects to the HQVDP output.
- - The cursor handles ... a cursor.
- - The TV OUT pre-formats (convert, clip, round) the compositor output data
- - The HDMI / DVO / HD Analog / SD analog IP builds the video signals
- - DVO (Digital Video Output) handles a 24bits parallel signal
- - The HD analog signal is typically driven by a YCbCr cable, supporting up to
- 1080i mode.
- - The SD analog signal is typically used for legacy TV
- - The VTG (Video Timing Generators) build Vsync signals used by the other HW IP
- Note that some stiH drivers support only a subset of thee HW IP.
- .-------------. .-----------. .-----------.
- GPU >-------------+GDP Main | | +---+ HDMI +--> HDMI
- GPU >-------------+GDP mixer+---+ | :===========:
- GPU >-------------+Cursor | | +---+ DVO +--> 24b//
- ------- | COMPOSITOR | | TV OUT | :===========:
- | | | | | +---+ HD analog +--> YCbCr
- Vid >--+ HQVDP +--+VID Aux +---+ | :===========:
- dec | | | mixer| | +---+ SD analog +--> CVBS
- '-------' '-------------' '-----------' '-----------'
- .-----------.
- | main+--> Vsync
- | VTG |
- | aux+--> Vsync
- '-----------'
- 2. DRM / HW mapping
- -------------------
- These IP are mapped to the DRM objects as following:
- - The CRTCs are mapped to the Compositor Main and Aux Mixers
- - The Framebuffers and planes are mapped to the Compositor GDP (non video
- buffers) and to HQVDP+VID (video buffers)
- - The Cursor is mapped to the Compositor Cursor
- - The Encoders are mapped to the TVOut
- - The Bridges/Connectors are mapped to the HDMI / DVO / HD Analog / SD analog
- FB & planes Cursor CRTC Encoders Bridges/Connectors
- | | | | |
- | | | | |
- | .-------------. | .-----------. .-----------. |
- +------------> |GDP | Main | | | +-> | | HDMI | <-+
- +------------> |GDP v mixer|<+ | | | :===========: |
- | |Cursor | | | +-> | | DVO | <-+
- | ------- | COMPOSITOR | | |TV OUT | | :===========: |
- | | | | | | | +-> | | HD analog | <-+
- +-> | HQVDP | |VID Aux |<+ | | | :===========: |
- | | | mixer| | +-> | | SD analog | <-+
- '-------' '-------------' '-----------' '-----------'
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