pc87427.c 40 KB

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  1. /*
  2. * pc87427.c - hardware monitoring driver for the
  3. * National Semiconductor PC87427 Super-I/O chip
  4. * Copyright (C) 2006, 2008, 2010 Jean Delvare <jdelvare@suse.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * Supports the following chips:
  16. *
  17. * Chip #vin #fan #pwm #temp devid
  18. * PC87427 - 8 4 6 0xF2
  19. *
  20. * This driver assumes that no more than one chip is present.
  21. * Only fans are fully supported so far. Temperatures are in read-only
  22. * mode, and voltages aren't supported at all.
  23. */
  24. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  25. #include <linux/module.h>
  26. #include <linux/init.h>
  27. #include <linux/slab.h>
  28. #include <linux/jiffies.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/hwmon.h>
  31. #include <linux/hwmon-sysfs.h>
  32. #include <linux/err.h>
  33. #include <linux/mutex.h>
  34. #include <linux/sysfs.h>
  35. #include <linux/ioport.h>
  36. #include <linux/acpi.h>
  37. #include <linux/io.h>
  38. static unsigned short force_id;
  39. module_param(force_id, ushort, 0);
  40. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  41. static struct platform_device *pdev;
  42. #define DRVNAME "pc87427"
  43. /*
  44. * The lock mutex protects both the I/O accesses (needed because the
  45. * device is using banked registers) and the register cache (needed to keep
  46. * the data in the registers and the cache in sync at any time).
  47. */
  48. struct pc87427_data {
  49. struct device *hwmon_dev;
  50. struct mutex lock;
  51. int address[2];
  52. const char *name;
  53. unsigned long last_updated; /* in jiffies */
  54. u8 fan_enabled; /* bit vector */
  55. u16 fan[8]; /* register values */
  56. u16 fan_min[8]; /* register values */
  57. u8 fan_status[8]; /* register values */
  58. u8 pwm_enabled; /* bit vector */
  59. u8 pwm_auto_ok; /* bit vector */
  60. u8 pwm_enable[4]; /* register values */
  61. u8 pwm[4]; /* register values */
  62. u8 temp_enabled; /* bit vector */
  63. s16 temp[6]; /* register values */
  64. s8 temp_min[6]; /* register values */
  65. s8 temp_max[6]; /* register values */
  66. s8 temp_crit[6]; /* register values */
  67. u8 temp_status[6]; /* register values */
  68. u8 temp_type[6]; /* register values */
  69. };
  70. struct pc87427_sio_data {
  71. unsigned short address[2];
  72. u8 has_fanin;
  73. u8 has_fanout;
  74. };
  75. /*
  76. * Super-I/O registers and operations
  77. */
  78. #define SIOREG_LDSEL 0x07 /* Logical device select */
  79. #define SIOREG_DEVID 0x20 /* Device ID */
  80. #define SIOREG_CF2 0x22 /* Configuration 2 */
  81. #define SIOREG_CF3 0x23 /* Configuration 3 */
  82. #define SIOREG_CF4 0x24 /* Configuration 4 */
  83. #define SIOREG_CF5 0x25 /* Configuration 5 */
  84. #define SIOREG_CFB 0x2B /* Configuration B */
  85. #define SIOREG_CFC 0x2C /* Configuration C */
  86. #define SIOREG_CFD 0x2D /* Configuration D */
  87. #define SIOREG_ACT 0x30 /* Device activation */
  88. #define SIOREG_MAP 0x50 /* I/O or memory mapping */
  89. #define SIOREG_IOBASE 0x60 /* I/O base address */
  90. static const u8 logdev[2] = { 0x09, 0x14 };
  91. static const char *logdev_str[2] = { DRVNAME " FMC", DRVNAME " HMC" };
  92. #define LD_FAN 0
  93. #define LD_IN 1
  94. #define LD_TEMP 1
  95. static inline void superio_outb(int sioaddr, int reg, int val)
  96. {
  97. outb(reg, sioaddr);
  98. outb(val, sioaddr + 1);
  99. }
  100. static inline int superio_inb(int sioaddr, int reg)
  101. {
  102. outb(reg, sioaddr);
  103. return inb(sioaddr + 1);
  104. }
  105. static inline void superio_exit(int sioaddr)
  106. {
  107. outb(0x02, sioaddr);
  108. outb(0x02, sioaddr + 1);
  109. }
  110. /*
  111. * Logical devices
  112. */
  113. #define REGION_LENGTH 32
  114. #define PC87427_REG_BANK 0x0f
  115. #define BANK_FM(nr) (nr)
  116. #define BANK_FT(nr) (0x08 + (nr))
  117. #define BANK_FC(nr) (0x10 + (nr) * 2)
  118. #define BANK_TM(nr) (nr)
  119. #define BANK_VM(nr) (0x08 + (nr))
  120. /*
  121. * I/O access functions
  122. */
  123. /* ldi is the logical device index */
  124. static inline int pc87427_read8(struct pc87427_data *data, u8 ldi, u8 reg)
  125. {
  126. return inb(data->address[ldi] + reg);
  127. }
  128. /* Must be called with data->lock held, except during init */
  129. static inline int pc87427_read8_bank(struct pc87427_data *data, u8 ldi,
  130. u8 bank, u8 reg)
  131. {
  132. outb(bank, data->address[ldi] + PC87427_REG_BANK);
  133. return inb(data->address[ldi] + reg);
  134. }
  135. /* Must be called with data->lock held, except during init */
  136. static inline void pc87427_write8_bank(struct pc87427_data *data, u8 ldi,
  137. u8 bank, u8 reg, u8 value)
  138. {
  139. outb(bank, data->address[ldi] + PC87427_REG_BANK);
  140. outb(value, data->address[ldi] + reg);
  141. }
  142. /*
  143. * Fan registers and conversions
  144. */
  145. /* fan data registers are 16-bit wide */
  146. #define PC87427_REG_FAN 0x12
  147. #define PC87427_REG_FAN_MIN 0x14
  148. #define PC87427_REG_FAN_STATUS 0x10
  149. #define FAN_STATUS_STALL (1 << 3)
  150. #define FAN_STATUS_LOSPD (1 << 1)
  151. #define FAN_STATUS_MONEN (1 << 0)
  152. /*
  153. * Dedicated function to read all registers related to a given fan input.
  154. * This saves us quite a few locks and bank selections.
  155. * Must be called with data->lock held.
  156. * nr is from 0 to 7
  157. */
  158. static void pc87427_readall_fan(struct pc87427_data *data, u8 nr)
  159. {
  160. int iobase = data->address[LD_FAN];
  161. outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
  162. data->fan[nr] = inw(iobase + PC87427_REG_FAN);
  163. data->fan_min[nr] = inw(iobase + PC87427_REG_FAN_MIN);
  164. data->fan_status[nr] = inb(iobase + PC87427_REG_FAN_STATUS);
  165. /* Clear fan alarm bits */
  166. outb(data->fan_status[nr], iobase + PC87427_REG_FAN_STATUS);
  167. }
  168. /*
  169. * The 2 LSB of fan speed registers are used for something different.
  170. * The actual 2 LSB of the measurements are not available.
  171. */
  172. static inline unsigned long fan_from_reg(u16 reg)
  173. {
  174. reg &= 0xfffc;
  175. if (reg == 0x0000 || reg == 0xfffc)
  176. return 0;
  177. return 5400000UL / reg;
  178. }
  179. /* The 2 LSB of the fan speed limit registers are not significant. */
  180. static inline u16 fan_to_reg(unsigned long val)
  181. {
  182. if (val < 83UL)
  183. return 0xffff;
  184. if (val >= 1350000UL)
  185. return 0x0004;
  186. return ((1350000UL + val / 2) / val) << 2;
  187. }
  188. /*
  189. * PWM registers and conversions
  190. */
  191. #define PC87427_REG_PWM_ENABLE 0x10
  192. #define PC87427_REG_PWM_DUTY 0x12
  193. #define PWM_ENABLE_MODE_MASK (7 << 4)
  194. #define PWM_ENABLE_CTLEN (1 << 0)
  195. #define PWM_MODE_MANUAL (0 << 4)
  196. #define PWM_MODE_AUTO (1 << 4)
  197. #define PWM_MODE_OFF (2 << 4)
  198. #define PWM_MODE_ON (7 << 4)
  199. /*
  200. * Dedicated function to read all registers related to a given PWM output.
  201. * This saves us quite a few locks and bank selections.
  202. * Must be called with data->lock held.
  203. * nr is from 0 to 3
  204. */
  205. static void pc87427_readall_pwm(struct pc87427_data *data, u8 nr)
  206. {
  207. int iobase = data->address[LD_FAN];
  208. outb(BANK_FC(nr), iobase + PC87427_REG_BANK);
  209. data->pwm_enable[nr] = inb(iobase + PC87427_REG_PWM_ENABLE);
  210. data->pwm[nr] = inb(iobase + PC87427_REG_PWM_DUTY);
  211. }
  212. static inline int pwm_enable_from_reg(u8 reg)
  213. {
  214. switch (reg & PWM_ENABLE_MODE_MASK) {
  215. case PWM_MODE_ON:
  216. return 0;
  217. case PWM_MODE_MANUAL:
  218. case PWM_MODE_OFF:
  219. return 1;
  220. case PWM_MODE_AUTO:
  221. return 2;
  222. default:
  223. return -EPROTO;
  224. }
  225. }
  226. static inline u8 pwm_enable_to_reg(unsigned long val, u8 pwmval)
  227. {
  228. switch (val) {
  229. default:
  230. return PWM_MODE_ON;
  231. case 1:
  232. return pwmval ? PWM_MODE_MANUAL : PWM_MODE_OFF;
  233. case 2:
  234. return PWM_MODE_AUTO;
  235. }
  236. }
  237. /*
  238. * Temperature registers and conversions
  239. */
  240. #define PC87427_REG_TEMP_STATUS 0x10
  241. #define PC87427_REG_TEMP 0x14
  242. #define PC87427_REG_TEMP_MAX 0x18
  243. #define PC87427_REG_TEMP_MIN 0x19
  244. #define PC87427_REG_TEMP_CRIT 0x1a
  245. #define PC87427_REG_TEMP_TYPE 0x1d
  246. #define TEMP_STATUS_CHANEN (1 << 0)
  247. #define TEMP_STATUS_LOWFLG (1 << 1)
  248. #define TEMP_STATUS_HIGHFLG (1 << 2)
  249. #define TEMP_STATUS_CRITFLG (1 << 3)
  250. #define TEMP_STATUS_SENSERR (1 << 5)
  251. #define TEMP_TYPE_MASK (3 << 5)
  252. #define TEMP_TYPE_THERMISTOR (1 << 5)
  253. #define TEMP_TYPE_REMOTE_DIODE (2 << 5)
  254. #define TEMP_TYPE_LOCAL_DIODE (3 << 5)
  255. /*
  256. * Dedicated function to read all registers related to a given temperature
  257. * input. This saves us quite a few locks and bank selections.
  258. * Must be called with data->lock held.
  259. * nr is from 0 to 5
  260. */
  261. static void pc87427_readall_temp(struct pc87427_data *data, u8 nr)
  262. {
  263. int iobase = data->address[LD_TEMP];
  264. outb(BANK_TM(nr), iobase + PC87427_REG_BANK);
  265. data->temp[nr] = le16_to_cpu(inw(iobase + PC87427_REG_TEMP));
  266. data->temp_max[nr] = inb(iobase + PC87427_REG_TEMP_MAX);
  267. data->temp_min[nr] = inb(iobase + PC87427_REG_TEMP_MIN);
  268. data->temp_crit[nr] = inb(iobase + PC87427_REG_TEMP_CRIT);
  269. data->temp_type[nr] = inb(iobase + PC87427_REG_TEMP_TYPE);
  270. data->temp_status[nr] = inb(iobase + PC87427_REG_TEMP_STATUS);
  271. /* Clear fan alarm bits */
  272. outb(data->temp_status[nr], iobase + PC87427_REG_TEMP_STATUS);
  273. }
  274. static inline unsigned int temp_type_from_reg(u8 reg)
  275. {
  276. switch (reg & TEMP_TYPE_MASK) {
  277. case TEMP_TYPE_THERMISTOR:
  278. return 4;
  279. case TEMP_TYPE_REMOTE_DIODE:
  280. case TEMP_TYPE_LOCAL_DIODE:
  281. return 3;
  282. default:
  283. return 0;
  284. }
  285. }
  286. /*
  287. * We assume 8-bit thermal sensors; 9-bit thermal sensors are possible
  288. * too, but I have no idea how to figure out when they are used.
  289. */
  290. static inline long temp_from_reg(s16 reg)
  291. {
  292. return reg * 1000 / 256;
  293. }
  294. static inline long temp_from_reg8(s8 reg)
  295. {
  296. return reg * 1000;
  297. }
  298. /*
  299. * Data interface
  300. */
  301. static struct pc87427_data *pc87427_update_device(struct device *dev)
  302. {
  303. struct pc87427_data *data = dev_get_drvdata(dev);
  304. int i;
  305. mutex_lock(&data->lock);
  306. if (!time_after(jiffies, data->last_updated + HZ)
  307. && data->last_updated)
  308. goto done;
  309. /* Fans */
  310. for (i = 0; i < 8; i++) {
  311. if (!(data->fan_enabled & (1 << i)))
  312. continue;
  313. pc87427_readall_fan(data, i);
  314. }
  315. /* PWM outputs */
  316. for (i = 0; i < 4; i++) {
  317. if (!(data->pwm_enabled & (1 << i)))
  318. continue;
  319. pc87427_readall_pwm(data, i);
  320. }
  321. /* Temperature channels */
  322. for (i = 0; i < 6; i++) {
  323. if (!(data->temp_enabled & (1 << i)))
  324. continue;
  325. pc87427_readall_temp(data, i);
  326. }
  327. data->last_updated = jiffies;
  328. done:
  329. mutex_unlock(&data->lock);
  330. return data;
  331. }
  332. static ssize_t show_fan_input(struct device *dev, struct device_attribute
  333. *devattr, char *buf)
  334. {
  335. struct pc87427_data *data = pc87427_update_device(dev);
  336. int nr = to_sensor_dev_attr(devattr)->index;
  337. return sprintf(buf, "%lu\n", fan_from_reg(data->fan[nr]));
  338. }
  339. static ssize_t show_fan_min(struct device *dev, struct device_attribute
  340. *devattr, char *buf)
  341. {
  342. struct pc87427_data *data = pc87427_update_device(dev);
  343. int nr = to_sensor_dev_attr(devattr)->index;
  344. return sprintf(buf, "%lu\n", fan_from_reg(data->fan_min[nr]));
  345. }
  346. static ssize_t show_fan_alarm(struct device *dev, struct device_attribute
  347. *devattr, char *buf)
  348. {
  349. struct pc87427_data *data = pc87427_update_device(dev);
  350. int nr = to_sensor_dev_attr(devattr)->index;
  351. return sprintf(buf, "%d\n", !!(data->fan_status[nr]
  352. & FAN_STATUS_LOSPD));
  353. }
  354. static ssize_t show_fan_fault(struct device *dev, struct device_attribute
  355. *devattr, char *buf)
  356. {
  357. struct pc87427_data *data = pc87427_update_device(dev);
  358. int nr = to_sensor_dev_attr(devattr)->index;
  359. return sprintf(buf, "%d\n", !!(data->fan_status[nr]
  360. & FAN_STATUS_STALL));
  361. }
  362. static ssize_t set_fan_min(struct device *dev, struct device_attribute
  363. *devattr, const char *buf, size_t count)
  364. {
  365. struct pc87427_data *data = dev_get_drvdata(dev);
  366. int nr = to_sensor_dev_attr(devattr)->index;
  367. unsigned long val;
  368. int iobase = data->address[LD_FAN];
  369. if (kstrtoul(buf, 10, &val) < 0)
  370. return -EINVAL;
  371. mutex_lock(&data->lock);
  372. outb(BANK_FM(nr), iobase + PC87427_REG_BANK);
  373. /*
  374. * The low speed limit registers are read-only while monitoring
  375. * is enabled, so we have to disable monitoring, then change the
  376. * limit, and finally enable monitoring again.
  377. */
  378. outb(0, iobase + PC87427_REG_FAN_STATUS);
  379. data->fan_min[nr] = fan_to_reg(val);
  380. outw(data->fan_min[nr], iobase + PC87427_REG_FAN_MIN);
  381. outb(FAN_STATUS_MONEN, iobase + PC87427_REG_FAN_STATUS);
  382. mutex_unlock(&data->lock);
  383. return count;
  384. }
  385. static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan_input, NULL, 0);
  386. static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan_input, NULL, 1);
  387. static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan_input, NULL, 2);
  388. static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan_input, NULL, 3);
  389. static SENSOR_DEVICE_ATTR(fan5_input, S_IRUGO, show_fan_input, NULL, 4);
  390. static SENSOR_DEVICE_ATTR(fan6_input, S_IRUGO, show_fan_input, NULL, 5);
  391. static SENSOR_DEVICE_ATTR(fan7_input, S_IRUGO, show_fan_input, NULL, 6);
  392. static SENSOR_DEVICE_ATTR(fan8_input, S_IRUGO, show_fan_input, NULL, 7);
  393. static SENSOR_DEVICE_ATTR(fan1_min, S_IWUSR | S_IRUGO,
  394. show_fan_min, set_fan_min, 0);
  395. static SENSOR_DEVICE_ATTR(fan2_min, S_IWUSR | S_IRUGO,
  396. show_fan_min, set_fan_min, 1);
  397. static SENSOR_DEVICE_ATTR(fan3_min, S_IWUSR | S_IRUGO,
  398. show_fan_min, set_fan_min, 2);
  399. static SENSOR_DEVICE_ATTR(fan4_min, S_IWUSR | S_IRUGO,
  400. show_fan_min, set_fan_min, 3);
  401. static SENSOR_DEVICE_ATTR(fan5_min, S_IWUSR | S_IRUGO,
  402. show_fan_min, set_fan_min, 4);
  403. static SENSOR_DEVICE_ATTR(fan6_min, S_IWUSR | S_IRUGO,
  404. show_fan_min, set_fan_min, 5);
  405. static SENSOR_DEVICE_ATTR(fan7_min, S_IWUSR | S_IRUGO,
  406. show_fan_min, set_fan_min, 6);
  407. static SENSOR_DEVICE_ATTR(fan8_min, S_IWUSR | S_IRUGO,
  408. show_fan_min, set_fan_min, 7);
  409. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_fan_alarm, NULL, 0);
  410. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_fan_alarm, NULL, 1);
  411. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_fan_alarm, NULL, 2);
  412. static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_fan_alarm, NULL, 3);
  413. static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_fan_alarm, NULL, 4);
  414. static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_fan_alarm, NULL, 5);
  415. static SENSOR_DEVICE_ATTR(fan7_alarm, S_IRUGO, show_fan_alarm, NULL, 6);
  416. static SENSOR_DEVICE_ATTR(fan8_alarm, S_IRUGO, show_fan_alarm, NULL, 7);
  417. static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, show_fan_fault, NULL, 0);
  418. static SENSOR_DEVICE_ATTR(fan2_fault, S_IRUGO, show_fan_fault, NULL, 1);
  419. static SENSOR_DEVICE_ATTR(fan3_fault, S_IRUGO, show_fan_fault, NULL, 2);
  420. static SENSOR_DEVICE_ATTR(fan4_fault, S_IRUGO, show_fan_fault, NULL, 3);
  421. static SENSOR_DEVICE_ATTR(fan5_fault, S_IRUGO, show_fan_fault, NULL, 4);
  422. static SENSOR_DEVICE_ATTR(fan6_fault, S_IRUGO, show_fan_fault, NULL, 5);
  423. static SENSOR_DEVICE_ATTR(fan7_fault, S_IRUGO, show_fan_fault, NULL, 6);
  424. static SENSOR_DEVICE_ATTR(fan8_fault, S_IRUGO, show_fan_fault, NULL, 7);
  425. static struct attribute *pc87427_attributes_fan[8][5] = {
  426. {
  427. &sensor_dev_attr_fan1_input.dev_attr.attr,
  428. &sensor_dev_attr_fan1_min.dev_attr.attr,
  429. &sensor_dev_attr_fan1_alarm.dev_attr.attr,
  430. &sensor_dev_attr_fan1_fault.dev_attr.attr,
  431. NULL
  432. }, {
  433. &sensor_dev_attr_fan2_input.dev_attr.attr,
  434. &sensor_dev_attr_fan2_min.dev_attr.attr,
  435. &sensor_dev_attr_fan2_alarm.dev_attr.attr,
  436. &sensor_dev_attr_fan2_fault.dev_attr.attr,
  437. NULL
  438. }, {
  439. &sensor_dev_attr_fan3_input.dev_attr.attr,
  440. &sensor_dev_attr_fan3_min.dev_attr.attr,
  441. &sensor_dev_attr_fan3_alarm.dev_attr.attr,
  442. &sensor_dev_attr_fan3_fault.dev_attr.attr,
  443. NULL
  444. }, {
  445. &sensor_dev_attr_fan4_input.dev_attr.attr,
  446. &sensor_dev_attr_fan4_min.dev_attr.attr,
  447. &sensor_dev_attr_fan4_alarm.dev_attr.attr,
  448. &sensor_dev_attr_fan4_fault.dev_attr.attr,
  449. NULL
  450. }, {
  451. &sensor_dev_attr_fan5_input.dev_attr.attr,
  452. &sensor_dev_attr_fan5_min.dev_attr.attr,
  453. &sensor_dev_attr_fan5_alarm.dev_attr.attr,
  454. &sensor_dev_attr_fan5_fault.dev_attr.attr,
  455. NULL
  456. }, {
  457. &sensor_dev_attr_fan6_input.dev_attr.attr,
  458. &sensor_dev_attr_fan6_min.dev_attr.attr,
  459. &sensor_dev_attr_fan6_alarm.dev_attr.attr,
  460. &sensor_dev_attr_fan6_fault.dev_attr.attr,
  461. NULL
  462. }, {
  463. &sensor_dev_attr_fan7_input.dev_attr.attr,
  464. &sensor_dev_attr_fan7_min.dev_attr.attr,
  465. &sensor_dev_attr_fan7_alarm.dev_attr.attr,
  466. &sensor_dev_attr_fan7_fault.dev_attr.attr,
  467. NULL
  468. }, {
  469. &sensor_dev_attr_fan8_input.dev_attr.attr,
  470. &sensor_dev_attr_fan8_min.dev_attr.attr,
  471. &sensor_dev_attr_fan8_alarm.dev_attr.attr,
  472. &sensor_dev_attr_fan8_fault.dev_attr.attr,
  473. NULL
  474. }
  475. };
  476. static const struct attribute_group pc87427_group_fan[8] = {
  477. { .attrs = pc87427_attributes_fan[0] },
  478. { .attrs = pc87427_attributes_fan[1] },
  479. { .attrs = pc87427_attributes_fan[2] },
  480. { .attrs = pc87427_attributes_fan[3] },
  481. { .attrs = pc87427_attributes_fan[4] },
  482. { .attrs = pc87427_attributes_fan[5] },
  483. { .attrs = pc87427_attributes_fan[6] },
  484. { .attrs = pc87427_attributes_fan[7] },
  485. };
  486. /*
  487. * Must be called with data->lock held and pc87427_readall_pwm() freshly
  488. * called
  489. */
  490. static void update_pwm_enable(struct pc87427_data *data, int nr, u8 mode)
  491. {
  492. int iobase = data->address[LD_FAN];
  493. data->pwm_enable[nr] &= ~PWM_ENABLE_MODE_MASK;
  494. data->pwm_enable[nr] |= mode;
  495. outb(data->pwm_enable[nr], iobase + PC87427_REG_PWM_ENABLE);
  496. }
  497. static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
  498. *devattr, char *buf)
  499. {
  500. struct pc87427_data *data = pc87427_update_device(dev);
  501. int nr = to_sensor_dev_attr(devattr)->index;
  502. int pwm_enable;
  503. pwm_enable = pwm_enable_from_reg(data->pwm_enable[nr]);
  504. if (pwm_enable < 0)
  505. return pwm_enable;
  506. return sprintf(buf, "%d\n", pwm_enable);
  507. }
  508. static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
  509. *devattr, const char *buf, size_t count)
  510. {
  511. struct pc87427_data *data = dev_get_drvdata(dev);
  512. int nr = to_sensor_dev_attr(devattr)->index;
  513. unsigned long val;
  514. if (kstrtoul(buf, 10, &val) < 0 || val > 2)
  515. return -EINVAL;
  516. /* Can't go to automatic mode if it isn't configured */
  517. if (val == 2 && !(data->pwm_auto_ok & (1 << nr)))
  518. return -EINVAL;
  519. mutex_lock(&data->lock);
  520. pc87427_readall_pwm(data, nr);
  521. update_pwm_enable(data, nr, pwm_enable_to_reg(val, data->pwm[nr]));
  522. mutex_unlock(&data->lock);
  523. return count;
  524. }
  525. static ssize_t show_pwm(struct device *dev, struct device_attribute
  526. *devattr, char *buf)
  527. {
  528. struct pc87427_data *data = pc87427_update_device(dev);
  529. int nr = to_sensor_dev_attr(devattr)->index;
  530. return sprintf(buf, "%d\n", (int)data->pwm[nr]);
  531. }
  532. static ssize_t set_pwm(struct device *dev, struct device_attribute
  533. *devattr, const char *buf, size_t count)
  534. {
  535. struct pc87427_data *data = dev_get_drvdata(dev);
  536. int nr = to_sensor_dev_attr(devattr)->index;
  537. unsigned long val;
  538. int iobase = data->address[LD_FAN];
  539. u8 mode;
  540. if (kstrtoul(buf, 10, &val) < 0 || val > 0xff)
  541. return -EINVAL;
  542. mutex_lock(&data->lock);
  543. pc87427_readall_pwm(data, nr);
  544. mode = data->pwm_enable[nr] & PWM_ENABLE_MODE_MASK;
  545. if (mode != PWM_MODE_MANUAL && mode != PWM_MODE_OFF) {
  546. dev_notice(dev,
  547. "Can't set PWM%d duty cycle while not in manual mode\n",
  548. nr + 1);
  549. mutex_unlock(&data->lock);
  550. return -EPERM;
  551. }
  552. /* We may have to change the mode */
  553. if (mode == PWM_MODE_MANUAL && val == 0) {
  554. /* Transition from Manual to Off */
  555. update_pwm_enable(data, nr, PWM_MODE_OFF);
  556. mode = PWM_MODE_OFF;
  557. dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
  558. "manual", "off");
  559. } else if (mode == PWM_MODE_OFF && val != 0) {
  560. /* Transition from Off to Manual */
  561. update_pwm_enable(data, nr, PWM_MODE_MANUAL);
  562. mode = PWM_MODE_MANUAL;
  563. dev_dbg(dev, "Switching PWM%d from %s to %s\n", nr + 1,
  564. "off", "manual");
  565. }
  566. data->pwm[nr] = val;
  567. if (mode == PWM_MODE_MANUAL)
  568. outb(val, iobase + PC87427_REG_PWM_DUTY);
  569. mutex_unlock(&data->lock);
  570. return count;
  571. }
  572. static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
  573. show_pwm_enable, set_pwm_enable, 0);
  574. static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
  575. show_pwm_enable, set_pwm_enable, 1);
  576. static SENSOR_DEVICE_ATTR(pwm3_enable, S_IWUSR | S_IRUGO,
  577. show_pwm_enable, set_pwm_enable, 2);
  578. static SENSOR_DEVICE_ATTR(pwm4_enable, S_IWUSR | S_IRUGO,
  579. show_pwm_enable, set_pwm_enable, 3);
  580. static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 0);
  581. static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 1);
  582. static SENSOR_DEVICE_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 2);
  583. static SENSOR_DEVICE_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, set_pwm, 3);
  584. static struct attribute *pc87427_attributes_pwm[4][3] = {
  585. {
  586. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  587. &sensor_dev_attr_pwm1.dev_attr.attr,
  588. NULL
  589. }, {
  590. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  591. &sensor_dev_attr_pwm2.dev_attr.attr,
  592. NULL
  593. }, {
  594. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  595. &sensor_dev_attr_pwm3.dev_attr.attr,
  596. NULL
  597. }, {
  598. &sensor_dev_attr_pwm4_enable.dev_attr.attr,
  599. &sensor_dev_attr_pwm4.dev_attr.attr,
  600. NULL
  601. }
  602. };
  603. static const struct attribute_group pc87427_group_pwm[4] = {
  604. { .attrs = pc87427_attributes_pwm[0] },
  605. { .attrs = pc87427_attributes_pwm[1] },
  606. { .attrs = pc87427_attributes_pwm[2] },
  607. { .attrs = pc87427_attributes_pwm[3] },
  608. };
  609. static ssize_t show_temp_input(struct device *dev, struct device_attribute
  610. *devattr, char *buf)
  611. {
  612. struct pc87427_data *data = pc87427_update_device(dev);
  613. int nr = to_sensor_dev_attr(devattr)->index;
  614. return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
  615. }
  616. static ssize_t show_temp_min(struct device *dev, struct device_attribute
  617. *devattr, char *buf)
  618. {
  619. struct pc87427_data *data = pc87427_update_device(dev);
  620. int nr = to_sensor_dev_attr(devattr)->index;
  621. return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_min[nr]));
  622. }
  623. static ssize_t show_temp_max(struct device *dev, struct device_attribute
  624. *devattr, char *buf)
  625. {
  626. struct pc87427_data *data = pc87427_update_device(dev);
  627. int nr = to_sensor_dev_attr(devattr)->index;
  628. return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_max[nr]));
  629. }
  630. static ssize_t show_temp_crit(struct device *dev, struct device_attribute
  631. *devattr, char *buf)
  632. {
  633. struct pc87427_data *data = pc87427_update_device(dev);
  634. int nr = to_sensor_dev_attr(devattr)->index;
  635. return sprintf(buf, "%ld\n", temp_from_reg8(data->temp_crit[nr]));
  636. }
  637. static ssize_t show_temp_type(struct device *dev, struct device_attribute
  638. *devattr, char *buf)
  639. {
  640. struct pc87427_data *data = pc87427_update_device(dev);
  641. int nr = to_sensor_dev_attr(devattr)->index;
  642. return sprintf(buf, "%u\n", temp_type_from_reg(data->temp_type[nr]));
  643. }
  644. static ssize_t show_temp_min_alarm(struct device *dev, struct device_attribute
  645. *devattr, char *buf)
  646. {
  647. struct pc87427_data *data = pc87427_update_device(dev);
  648. int nr = to_sensor_dev_attr(devattr)->index;
  649. return sprintf(buf, "%d\n", !!(data->temp_status[nr]
  650. & TEMP_STATUS_LOWFLG));
  651. }
  652. static ssize_t show_temp_max_alarm(struct device *dev, struct device_attribute
  653. *devattr, char *buf)
  654. {
  655. struct pc87427_data *data = pc87427_update_device(dev);
  656. int nr = to_sensor_dev_attr(devattr)->index;
  657. return sprintf(buf, "%d\n", !!(data->temp_status[nr]
  658. & TEMP_STATUS_HIGHFLG));
  659. }
  660. static ssize_t show_temp_crit_alarm(struct device *dev, struct device_attribute
  661. *devattr, char *buf)
  662. {
  663. struct pc87427_data *data = pc87427_update_device(dev);
  664. int nr = to_sensor_dev_attr(devattr)->index;
  665. return sprintf(buf, "%d\n", !!(data->temp_status[nr]
  666. & TEMP_STATUS_CRITFLG));
  667. }
  668. static ssize_t show_temp_fault(struct device *dev, struct device_attribute
  669. *devattr, char *buf)
  670. {
  671. struct pc87427_data *data = pc87427_update_device(dev);
  672. int nr = to_sensor_dev_attr(devattr)->index;
  673. return sprintf(buf, "%d\n", !!(data->temp_status[nr]
  674. & TEMP_STATUS_SENSERR));
  675. }
  676. static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp_input, NULL, 0);
  677. static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp_input, NULL, 1);
  678. static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp_input, NULL, 2);
  679. static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_temp_input, NULL, 3);
  680. static SENSOR_DEVICE_ATTR(temp5_input, S_IRUGO, show_temp_input, NULL, 4);
  681. static SENSOR_DEVICE_ATTR(temp6_input, S_IRUGO, show_temp_input, NULL, 5);
  682. static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO, show_temp_min, NULL, 0);
  683. static SENSOR_DEVICE_ATTR(temp2_min, S_IRUGO, show_temp_min, NULL, 1);
  684. static SENSOR_DEVICE_ATTR(temp3_min, S_IRUGO, show_temp_min, NULL, 2);
  685. static SENSOR_DEVICE_ATTR(temp4_min, S_IRUGO, show_temp_min, NULL, 3);
  686. static SENSOR_DEVICE_ATTR(temp5_min, S_IRUGO, show_temp_min, NULL, 4);
  687. static SENSOR_DEVICE_ATTR(temp6_min, S_IRUGO, show_temp_min, NULL, 5);
  688. static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max, NULL, 0);
  689. static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO, show_temp_max, NULL, 1);
  690. static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO, show_temp_max, NULL, 2);
  691. static SENSOR_DEVICE_ATTR(temp4_max, S_IRUGO, show_temp_max, NULL, 3);
  692. static SENSOR_DEVICE_ATTR(temp5_max, S_IRUGO, show_temp_max, NULL, 4);
  693. static SENSOR_DEVICE_ATTR(temp6_max, S_IRUGO, show_temp_max, NULL, 5);
  694. static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
  695. static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO, show_temp_crit, NULL, 1);
  696. static SENSOR_DEVICE_ATTR(temp3_crit, S_IRUGO, show_temp_crit, NULL, 2);
  697. static SENSOR_DEVICE_ATTR(temp4_crit, S_IRUGO, show_temp_crit, NULL, 3);
  698. static SENSOR_DEVICE_ATTR(temp5_crit, S_IRUGO, show_temp_crit, NULL, 4);
  699. static SENSOR_DEVICE_ATTR(temp6_crit, S_IRUGO, show_temp_crit, NULL, 5);
  700. static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
  701. static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
  702. static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
  703. static SENSOR_DEVICE_ATTR(temp4_type, S_IRUGO, show_temp_type, NULL, 3);
  704. static SENSOR_DEVICE_ATTR(temp5_type, S_IRUGO, show_temp_type, NULL, 4);
  705. static SENSOR_DEVICE_ATTR(temp6_type, S_IRUGO, show_temp_type, NULL, 5);
  706. static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO,
  707. show_temp_min_alarm, NULL, 0);
  708. static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO,
  709. show_temp_min_alarm, NULL, 1);
  710. static SENSOR_DEVICE_ATTR(temp3_min_alarm, S_IRUGO,
  711. show_temp_min_alarm, NULL, 2);
  712. static SENSOR_DEVICE_ATTR(temp4_min_alarm, S_IRUGO,
  713. show_temp_min_alarm, NULL, 3);
  714. static SENSOR_DEVICE_ATTR(temp5_min_alarm, S_IRUGO,
  715. show_temp_min_alarm, NULL, 4);
  716. static SENSOR_DEVICE_ATTR(temp6_min_alarm, S_IRUGO,
  717. show_temp_min_alarm, NULL, 5);
  718. static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO,
  719. show_temp_max_alarm, NULL, 0);
  720. static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO,
  721. show_temp_max_alarm, NULL, 1);
  722. static SENSOR_DEVICE_ATTR(temp3_max_alarm, S_IRUGO,
  723. show_temp_max_alarm, NULL, 2);
  724. static SENSOR_DEVICE_ATTR(temp4_max_alarm, S_IRUGO,
  725. show_temp_max_alarm, NULL, 3);
  726. static SENSOR_DEVICE_ATTR(temp5_max_alarm, S_IRUGO,
  727. show_temp_max_alarm, NULL, 4);
  728. static SENSOR_DEVICE_ATTR(temp6_max_alarm, S_IRUGO,
  729. show_temp_max_alarm, NULL, 5);
  730. static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO,
  731. show_temp_crit_alarm, NULL, 0);
  732. static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO,
  733. show_temp_crit_alarm, NULL, 1);
  734. static SENSOR_DEVICE_ATTR(temp3_crit_alarm, S_IRUGO,
  735. show_temp_crit_alarm, NULL, 2);
  736. static SENSOR_DEVICE_ATTR(temp4_crit_alarm, S_IRUGO,
  737. show_temp_crit_alarm, NULL, 3);
  738. static SENSOR_DEVICE_ATTR(temp5_crit_alarm, S_IRUGO,
  739. show_temp_crit_alarm, NULL, 4);
  740. static SENSOR_DEVICE_ATTR(temp6_crit_alarm, S_IRUGO,
  741. show_temp_crit_alarm, NULL, 5);
  742. static SENSOR_DEVICE_ATTR(temp1_fault, S_IRUGO, show_temp_fault, NULL, 0);
  743. static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_temp_fault, NULL, 1);
  744. static SENSOR_DEVICE_ATTR(temp3_fault, S_IRUGO, show_temp_fault, NULL, 2);
  745. static SENSOR_DEVICE_ATTR(temp4_fault, S_IRUGO, show_temp_fault, NULL, 3);
  746. static SENSOR_DEVICE_ATTR(temp5_fault, S_IRUGO, show_temp_fault, NULL, 4);
  747. static SENSOR_DEVICE_ATTR(temp6_fault, S_IRUGO, show_temp_fault, NULL, 5);
  748. static struct attribute *pc87427_attributes_temp[6][10] = {
  749. {
  750. &sensor_dev_attr_temp1_input.dev_attr.attr,
  751. &sensor_dev_attr_temp1_min.dev_attr.attr,
  752. &sensor_dev_attr_temp1_max.dev_attr.attr,
  753. &sensor_dev_attr_temp1_crit.dev_attr.attr,
  754. &sensor_dev_attr_temp1_type.dev_attr.attr,
  755. &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
  756. &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
  757. &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
  758. &sensor_dev_attr_temp1_fault.dev_attr.attr,
  759. NULL
  760. }, {
  761. &sensor_dev_attr_temp2_input.dev_attr.attr,
  762. &sensor_dev_attr_temp2_min.dev_attr.attr,
  763. &sensor_dev_attr_temp2_max.dev_attr.attr,
  764. &sensor_dev_attr_temp2_crit.dev_attr.attr,
  765. &sensor_dev_attr_temp2_type.dev_attr.attr,
  766. &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
  767. &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
  768. &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
  769. &sensor_dev_attr_temp2_fault.dev_attr.attr,
  770. NULL
  771. }, {
  772. &sensor_dev_attr_temp3_input.dev_attr.attr,
  773. &sensor_dev_attr_temp3_min.dev_attr.attr,
  774. &sensor_dev_attr_temp3_max.dev_attr.attr,
  775. &sensor_dev_attr_temp3_crit.dev_attr.attr,
  776. &sensor_dev_attr_temp3_type.dev_attr.attr,
  777. &sensor_dev_attr_temp3_min_alarm.dev_attr.attr,
  778. &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
  779. &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
  780. &sensor_dev_attr_temp3_fault.dev_attr.attr,
  781. NULL
  782. }, {
  783. &sensor_dev_attr_temp4_input.dev_attr.attr,
  784. &sensor_dev_attr_temp4_min.dev_attr.attr,
  785. &sensor_dev_attr_temp4_max.dev_attr.attr,
  786. &sensor_dev_attr_temp4_crit.dev_attr.attr,
  787. &sensor_dev_attr_temp4_type.dev_attr.attr,
  788. &sensor_dev_attr_temp4_min_alarm.dev_attr.attr,
  789. &sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
  790. &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
  791. &sensor_dev_attr_temp4_fault.dev_attr.attr,
  792. NULL
  793. }, {
  794. &sensor_dev_attr_temp5_input.dev_attr.attr,
  795. &sensor_dev_attr_temp5_min.dev_attr.attr,
  796. &sensor_dev_attr_temp5_max.dev_attr.attr,
  797. &sensor_dev_attr_temp5_crit.dev_attr.attr,
  798. &sensor_dev_attr_temp5_type.dev_attr.attr,
  799. &sensor_dev_attr_temp5_min_alarm.dev_attr.attr,
  800. &sensor_dev_attr_temp5_max_alarm.dev_attr.attr,
  801. &sensor_dev_attr_temp5_crit_alarm.dev_attr.attr,
  802. &sensor_dev_attr_temp5_fault.dev_attr.attr,
  803. NULL
  804. }, {
  805. &sensor_dev_attr_temp6_input.dev_attr.attr,
  806. &sensor_dev_attr_temp6_min.dev_attr.attr,
  807. &sensor_dev_attr_temp6_max.dev_attr.attr,
  808. &sensor_dev_attr_temp6_crit.dev_attr.attr,
  809. &sensor_dev_attr_temp6_type.dev_attr.attr,
  810. &sensor_dev_attr_temp6_min_alarm.dev_attr.attr,
  811. &sensor_dev_attr_temp6_max_alarm.dev_attr.attr,
  812. &sensor_dev_attr_temp6_crit_alarm.dev_attr.attr,
  813. &sensor_dev_attr_temp6_fault.dev_attr.attr,
  814. NULL
  815. }
  816. };
  817. static const struct attribute_group pc87427_group_temp[6] = {
  818. { .attrs = pc87427_attributes_temp[0] },
  819. { .attrs = pc87427_attributes_temp[1] },
  820. { .attrs = pc87427_attributes_temp[2] },
  821. { .attrs = pc87427_attributes_temp[3] },
  822. { .attrs = pc87427_attributes_temp[4] },
  823. { .attrs = pc87427_attributes_temp[5] },
  824. };
  825. static ssize_t show_name(struct device *dev, struct device_attribute
  826. *devattr, char *buf)
  827. {
  828. struct pc87427_data *data = dev_get_drvdata(dev);
  829. return sprintf(buf, "%s\n", data->name);
  830. }
  831. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  832. /*
  833. * Device detection, attach and detach
  834. */
  835. static int pc87427_request_regions(struct platform_device *pdev,
  836. int count)
  837. {
  838. struct resource *res;
  839. int i;
  840. for (i = 0; i < count; i++) {
  841. res = platform_get_resource(pdev, IORESOURCE_IO, i);
  842. if (!res) {
  843. dev_err(&pdev->dev, "Missing resource #%d\n", i);
  844. return -ENOENT;
  845. }
  846. if (!devm_request_region(&pdev->dev, res->start,
  847. resource_size(res), DRVNAME)) {
  848. dev_err(&pdev->dev,
  849. "Failed to request region 0x%lx-0x%lx\n",
  850. (unsigned long)res->start,
  851. (unsigned long)res->end);
  852. return -EBUSY;
  853. }
  854. }
  855. return 0;
  856. }
  857. static void pc87427_init_device(struct device *dev)
  858. {
  859. struct pc87427_sio_data *sio_data = dev_get_platdata(dev);
  860. struct pc87427_data *data = dev_get_drvdata(dev);
  861. int i;
  862. u8 reg;
  863. /* The FMC module should be ready */
  864. reg = pc87427_read8(data, LD_FAN, PC87427_REG_BANK);
  865. if (!(reg & 0x80))
  866. dev_warn(dev, "%s module not ready!\n", "FMC");
  867. /* Check which fans are enabled */
  868. for (i = 0; i < 8; i++) {
  869. if (!(sio_data->has_fanin & (1 << i))) /* Not wired */
  870. continue;
  871. reg = pc87427_read8_bank(data, LD_FAN, BANK_FM(i),
  872. PC87427_REG_FAN_STATUS);
  873. if (reg & FAN_STATUS_MONEN)
  874. data->fan_enabled |= (1 << i);
  875. }
  876. if (!data->fan_enabled) {
  877. dev_dbg(dev, "Enabling monitoring of all fans\n");
  878. for (i = 0; i < 8; i++) {
  879. if (!(sio_data->has_fanin & (1 << i))) /* Not wired */
  880. continue;
  881. pc87427_write8_bank(data, LD_FAN, BANK_FM(i),
  882. PC87427_REG_FAN_STATUS,
  883. FAN_STATUS_MONEN);
  884. }
  885. data->fan_enabled = sio_data->has_fanin;
  886. }
  887. /* Check which PWM outputs are enabled */
  888. for (i = 0; i < 4; i++) {
  889. if (!(sio_data->has_fanout & (1 << i))) /* Not wired */
  890. continue;
  891. reg = pc87427_read8_bank(data, LD_FAN, BANK_FC(i),
  892. PC87427_REG_PWM_ENABLE);
  893. if (reg & PWM_ENABLE_CTLEN)
  894. data->pwm_enabled |= (1 << i);
  895. /*
  896. * We don't expose an interface to reconfigure the automatic
  897. * fan control mode, so only allow to return to this mode if
  898. * it was originally set.
  899. */
  900. if ((reg & PWM_ENABLE_MODE_MASK) == PWM_MODE_AUTO) {
  901. dev_dbg(dev, "PWM%d is in automatic control mode\n",
  902. i + 1);
  903. data->pwm_auto_ok |= (1 << i);
  904. }
  905. }
  906. /* The HMC module should be ready */
  907. reg = pc87427_read8(data, LD_TEMP, PC87427_REG_BANK);
  908. if (!(reg & 0x80))
  909. dev_warn(dev, "%s module not ready!\n", "HMC");
  910. /* Check which temperature channels are enabled */
  911. for (i = 0; i < 6; i++) {
  912. reg = pc87427_read8_bank(data, LD_TEMP, BANK_TM(i),
  913. PC87427_REG_TEMP_STATUS);
  914. if (reg & TEMP_STATUS_CHANEN)
  915. data->temp_enabled |= (1 << i);
  916. }
  917. }
  918. static void pc87427_remove_files(struct device *dev)
  919. {
  920. struct pc87427_data *data = dev_get_drvdata(dev);
  921. int i;
  922. device_remove_file(dev, &dev_attr_name);
  923. for (i = 0; i < 8; i++) {
  924. if (!(data->fan_enabled & (1 << i)))
  925. continue;
  926. sysfs_remove_group(&dev->kobj, &pc87427_group_fan[i]);
  927. }
  928. for (i = 0; i < 4; i++) {
  929. if (!(data->pwm_enabled & (1 << i)))
  930. continue;
  931. sysfs_remove_group(&dev->kobj, &pc87427_group_pwm[i]);
  932. }
  933. for (i = 0; i < 6; i++) {
  934. if (!(data->temp_enabled & (1 << i)))
  935. continue;
  936. sysfs_remove_group(&dev->kobj, &pc87427_group_temp[i]);
  937. }
  938. }
  939. static int pc87427_probe(struct platform_device *pdev)
  940. {
  941. struct pc87427_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  942. struct pc87427_data *data;
  943. int i, err, res_count;
  944. data = devm_kzalloc(&pdev->dev, sizeof(struct pc87427_data),
  945. GFP_KERNEL);
  946. if (!data)
  947. return -ENOMEM;
  948. data->address[0] = sio_data->address[0];
  949. data->address[1] = sio_data->address[1];
  950. res_count = (data->address[0] != 0) + (data->address[1] != 0);
  951. err = pc87427_request_regions(pdev, res_count);
  952. if (err)
  953. return err;
  954. mutex_init(&data->lock);
  955. data->name = "pc87427";
  956. platform_set_drvdata(pdev, data);
  957. pc87427_init_device(&pdev->dev);
  958. /* Register sysfs hooks */
  959. err = device_create_file(&pdev->dev, &dev_attr_name);
  960. if (err)
  961. return err;
  962. for (i = 0; i < 8; i++) {
  963. if (!(data->fan_enabled & (1 << i)))
  964. continue;
  965. err = sysfs_create_group(&pdev->dev.kobj,
  966. &pc87427_group_fan[i]);
  967. if (err)
  968. goto exit_remove_files;
  969. }
  970. for (i = 0; i < 4; i++) {
  971. if (!(data->pwm_enabled & (1 << i)))
  972. continue;
  973. err = sysfs_create_group(&pdev->dev.kobj,
  974. &pc87427_group_pwm[i]);
  975. if (err)
  976. goto exit_remove_files;
  977. }
  978. for (i = 0; i < 6; i++) {
  979. if (!(data->temp_enabled & (1 << i)))
  980. continue;
  981. err = sysfs_create_group(&pdev->dev.kobj,
  982. &pc87427_group_temp[i]);
  983. if (err)
  984. goto exit_remove_files;
  985. }
  986. data->hwmon_dev = hwmon_device_register(&pdev->dev);
  987. if (IS_ERR(data->hwmon_dev)) {
  988. err = PTR_ERR(data->hwmon_dev);
  989. dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
  990. goto exit_remove_files;
  991. }
  992. return 0;
  993. exit_remove_files:
  994. pc87427_remove_files(&pdev->dev);
  995. return err;
  996. }
  997. static int pc87427_remove(struct platform_device *pdev)
  998. {
  999. struct pc87427_data *data = platform_get_drvdata(pdev);
  1000. hwmon_device_unregister(data->hwmon_dev);
  1001. pc87427_remove_files(&pdev->dev);
  1002. return 0;
  1003. }
  1004. static struct platform_driver pc87427_driver = {
  1005. .driver = {
  1006. .name = DRVNAME,
  1007. },
  1008. .probe = pc87427_probe,
  1009. .remove = pc87427_remove,
  1010. };
  1011. static int __init pc87427_device_add(const struct pc87427_sio_data *sio_data)
  1012. {
  1013. struct resource res[2] = {
  1014. { .flags = IORESOURCE_IO },
  1015. { .flags = IORESOURCE_IO },
  1016. };
  1017. int err, i, res_count;
  1018. res_count = 0;
  1019. for (i = 0; i < 2; i++) {
  1020. if (!sio_data->address[i])
  1021. continue;
  1022. res[res_count].start = sio_data->address[i];
  1023. res[res_count].end = sio_data->address[i] + REGION_LENGTH - 1;
  1024. res[res_count].name = logdev_str[i];
  1025. err = acpi_check_resource_conflict(&res[res_count]);
  1026. if (err)
  1027. goto exit;
  1028. res_count++;
  1029. }
  1030. pdev = platform_device_alloc(DRVNAME, res[0].start);
  1031. if (!pdev) {
  1032. err = -ENOMEM;
  1033. pr_err("Device allocation failed\n");
  1034. goto exit;
  1035. }
  1036. err = platform_device_add_resources(pdev, res, res_count);
  1037. if (err) {
  1038. pr_err("Device resource addition failed (%d)\n", err);
  1039. goto exit_device_put;
  1040. }
  1041. err = platform_device_add_data(pdev, sio_data,
  1042. sizeof(struct pc87427_sio_data));
  1043. if (err) {
  1044. pr_err("Platform data allocation failed\n");
  1045. goto exit_device_put;
  1046. }
  1047. err = platform_device_add(pdev);
  1048. if (err) {
  1049. pr_err("Device addition failed (%d)\n", err);
  1050. goto exit_device_put;
  1051. }
  1052. return 0;
  1053. exit_device_put:
  1054. platform_device_put(pdev);
  1055. exit:
  1056. return err;
  1057. }
  1058. static int __init pc87427_find(int sioaddr, struct pc87427_sio_data *sio_data)
  1059. {
  1060. u16 val;
  1061. u8 cfg, cfg_b;
  1062. int i, err = 0;
  1063. /* Identify device */
  1064. val = force_id ? force_id : superio_inb(sioaddr, SIOREG_DEVID);
  1065. if (val != 0xf2) { /* PC87427 */
  1066. err = -ENODEV;
  1067. goto exit;
  1068. }
  1069. for (i = 0; i < 2; i++) {
  1070. sio_data->address[i] = 0;
  1071. /* Select logical device */
  1072. superio_outb(sioaddr, SIOREG_LDSEL, logdev[i]);
  1073. val = superio_inb(sioaddr, SIOREG_ACT);
  1074. if (!(val & 0x01)) {
  1075. pr_info("Logical device 0x%02x not activated\n",
  1076. logdev[i]);
  1077. continue;
  1078. }
  1079. val = superio_inb(sioaddr, SIOREG_MAP);
  1080. if (val & 0x01) {
  1081. pr_warn("Logical device 0x%02x is memory-mapped, can't use\n",
  1082. logdev[i]);
  1083. continue;
  1084. }
  1085. val = (superio_inb(sioaddr, SIOREG_IOBASE) << 8)
  1086. | superio_inb(sioaddr, SIOREG_IOBASE + 1);
  1087. if (!val) {
  1088. pr_info("I/O base address not set for logical device 0x%02x\n",
  1089. logdev[i]);
  1090. continue;
  1091. }
  1092. sio_data->address[i] = val;
  1093. }
  1094. /* No point in loading the driver if everything is disabled */
  1095. if (!sio_data->address[0] && !sio_data->address[1]) {
  1096. err = -ENODEV;
  1097. goto exit;
  1098. }
  1099. /* Check which fan inputs are wired */
  1100. sio_data->has_fanin = (1 << 2) | (1 << 3); /* FANIN2, FANIN3 */
  1101. cfg = superio_inb(sioaddr, SIOREG_CF2);
  1102. if (!(cfg & (1 << 3)))
  1103. sio_data->has_fanin |= (1 << 0); /* FANIN0 */
  1104. if (!(cfg & (1 << 2)))
  1105. sio_data->has_fanin |= (1 << 4); /* FANIN4 */
  1106. cfg = superio_inb(sioaddr, SIOREG_CFD);
  1107. if (!(cfg & (1 << 0)))
  1108. sio_data->has_fanin |= (1 << 1); /* FANIN1 */
  1109. cfg = superio_inb(sioaddr, SIOREG_CF4);
  1110. if (!(cfg & (1 << 0)))
  1111. sio_data->has_fanin |= (1 << 7); /* FANIN7 */
  1112. cfg_b = superio_inb(sioaddr, SIOREG_CFB);
  1113. if (!(cfg & (1 << 1)) && (cfg_b & (1 << 3)))
  1114. sio_data->has_fanin |= (1 << 5); /* FANIN5 */
  1115. cfg = superio_inb(sioaddr, SIOREG_CF3);
  1116. if ((cfg & (1 << 3)) && !(cfg_b & (1 << 5)))
  1117. sio_data->has_fanin |= (1 << 6); /* FANIN6 */
  1118. /* Check which fan outputs are wired */
  1119. sio_data->has_fanout = (1 << 0); /* FANOUT0 */
  1120. if (cfg_b & (1 << 0))
  1121. sio_data->has_fanout |= (1 << 3); /* FANOUT3 */
  1122. cfg = superio_inb(sioaddr, SIOREG_CFC);
  1123. if (!(cfg & (1 << 4))) {
  1124. if (cfg_b & (1 << 1))
  1125. sio_data->has_fanout |= (1 << 1); /* FANOUT1 */
  1126. if (cfg_b & (1 << 2))
  1127. sio_data->has_fanout |= (1 << 2); /* FANOUT2 */
  1128. }
  1129. /* FANOUT1 and FANOUT2 can each be routed to 2 different pins */
  1130. cfg = superio_inb(sioaddr, SIOREG_CF5);
  1131. if (cfg & (1 << 6))
  1132. sio_data->has_fanout |= (1 << 1); /* FANOUT1 */
  1133. if (cfg & (1 << 5))
  1134. sio_data->has_fanout |= (1 << 2); /* FANOUT2 */
  1135. exit:
  1136. superio_exit(sioaddr);
  1137. return err;
  1138. }
  1139. static int __init pc87427_init(void)
  1140. {
  1141. int err;
  1142. struct pc87427_sio_data sio_data;
  1143. if (pc87427_find(0x2e, &sio_data)
  1144. && pc87427_find(0x4e, &sio_data))
  1145. return -ENODEV;
  1146. err = platform_driver_register(&pc87427_driver);
  1147. if (err)
  1148. goto exit;
  1149. /* Sets global pdev as a side effect */
  1150. err = pc87427_device_add(&sio_data);
  1151. if (err)
  1152. goto exit_driver;
  1153. return 0;
  1154. exit_driver:
  1155. platform_driver_unregister(&pc87427_driver);
  1156. exit:
  1157. return err;
  1158. }
  1159. static void __exit pc87427_exit(void)
  1160. {
  1161. platform_device_unregister(pdev);
  1162. platform_driver_unregister(&pc87427_driver);
  1163. }
  1164. MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
  1165. MODULE_DESCRIPTION("PC87427 hardware monitoring driver");
  1166. MODULE_LICENSE("GPL");
  1167. module_init(pc87427_init);
  1168. module_exit(pc87427_exit);