w83627hf.c 56 KB

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  1. /*
  2. * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
  3. * monitoring
  4. * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
  5. * Philip Edelbrock <phil@netroedge.com>,
  6. * and Mark Studebaker <mdsxyz123@yahoo.com>
  7. * Ported to 2.6 by Bernhard C. Schrenk <clemy@clemy.org>
  8. * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. */
  24. /*
  25. * Supports following chips:
  26. *
  27. * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
  28. * w83627hf 9 3 2 3 0x20 0x5ca3 no yes(LPC)
  29. * w83627thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
  30. * w83637hf 7 3 3 3 0x80 0x5ca3 no yes(LPC)
  31. * w83687thf 7 3 3 3 0x90 0x5ca3 no yes(LPC)
  32. * w83697hf 8 2 2 2 0x60 0x5ca3 no yes(LPC)
  33. *
  34. * For other winbond chips, and for i2c support in the above chips,
  35. * use w83781d.c.
  36. *
  37. * Note: automatic ("cruise") fan control for 697, 637 & 627thf not
  38. * supported yet.
  39. */
  40. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  41. #include <linux/module.h>
  42. #include <linux/init.h>
  43. #include <linux/slab.h>
  44. #include <linux/jiffies.h>
  45. #include <linux/platform_device.h>
  46. #include <linux/hwmon.h>
  47. #include <linux/hwmon-sysfs.h>
  48. #include <linux/hwmon-vid.h>
  49. #include <linux/err.h>
  50. #include <linux/mutex.h>
  51. #include <linux/ioport.h>
  52. #include <linux/acpi.h>
  53. #include <linux/io.h>
  54. #include "lm75.h"
  55. static struct platform_device *pdev;
  56. #define DRVNAME "w83627hf"
  57. enum chips { w83627hf, w83627thf, w83697hf, w83637hf, w83687thf };
  58. struct w83627hf_sio_data {
  59. enum chips type;
  60. int sioaddr;
  61. };
  62. static u8 force_i2c = 0x1f;
  63. module_param(force_i2c, byte, 0);
  64. MODULE_PARM_DESC(force_i2c,
  65. "Initialize the i2c address of the sensors");
  66. static bool init = 1;
  67. module_param(init, bool, 0);
  68. MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  69. static unsigned short force_id;
  70. module_param(force_id, ushort, 0);
  71. MODULE_PARM_DESC(force_id, "Override the detected device ID");
  72. /* modified from kernel/include/traps.c */
  73. #define DEV 0x07 /* Register: Logical device select */
  74. /* logical device numbers for superio_select (below) */
  75. #define W83627HF_LD_FDC 0x00
  76. #define W83627HF_LD_PRT 0x01
  77. #define W83627HF_LD_UART1 0x02
  78. #define W83627HF_LD_UART2 0x03
  79. #define W83627HF_LD_KBC 0x05
  80. #define W83627HF_LD_CIR 0x06 /* w83627hf only */
  81. #define W83627HF_LD_GAME 0x07
  82. #define W83627HF_LD_MIDI 0x07
  83. #define W83627HF_LD_GPIO1 0x07
  84. #define W83627HF_LD_GPIO5 0x07 /* w83627thf only */
  85. #define W83627HF_LD_GPIO2 0x08
  86. #define W83627HF_LD_GPIO3 0x09
  87. #define W83627HF_LD_GPIO4 0x09 /* w83627thf only */
  88. #define W83627HF_LD_ACPI 0x0a
  89. #define W83627HF_LD_HWM 0x0b
  90. #define DEVID 0x20 /* Register: Device ID */
  91. #define W83627THF_GPIO5_EN 0x30 /* w83627thf only */
  92. #define W83627THF_GPIO5_IOSR 0xf3 /* w83627thf only */
  93. #define W83627THF_GPIO5_DR 0xf4 /* w83627thf only */
  94. #define W83687THF_VID_EN 0x29 /* w83687thf only */
  95. #define W83687THF_VID_CFG 0xF0 /* w83687thf only */
  96. #define W83687THF_VID_DATA 0xF1 /* w83687thf only */
  97. static inline void
  98. superio_outb(struct w83627hf_sio_data *sio, int reg, int val)
  99. {
  100. outb(reg, sio->sioaddr);
  101. outb(val, sio->sioaddr + 1);
  102. }
  103. static inline int
  104. superio_inb(struct w83627hf_sio_data *sio, int reg)
  105. {
  106. outb(reg, sio->sioaddr);
  107. return inb(sio->sioaddr + 1);
  108. }
  109. static inline void
  110. superio_select(struct w83627hf_sio_data *sio, int ld)
  111. {
  112. outb(DEV, sio->sioaddr);
  113. outb(ld, sio->sioaddr + 1);
  114. }
  115. static inline void
  116. superio_enter(struct w83627hf_sio_data *sio)
  117. {
  118. outb(0x87, sio->sioaddr);
  119. outb(0x87, sio->sioaddr);
  120. }
  121. static inline void
  122. superio_exit(struct w83627hf_sio_data *sio)
  123. {
  124. outb(0xAA, sio->sioaddr);
  125. }
  126. #define W627_DEVID 0x52
  127. #define W627THF_DEVID 0x82
  128. #define W697_DEVID 0x60
  129. #define W637_DEVID 0x70
  130. #define W687THF_DEVID 0x85
  131. #define WINB_ACT_REG 0x30
  132. #define WINB_BASE_REG 0x60
  133. /* Constants specified below */
  134. /* Alignment of the base address */
  135. #define WINB_ALIGNMENT ~7
  136. /* Offset & size of I/O region we are interested in */
  137. #define WINB_REGION_OFFSET 5
  138. #define WINB_REGION_SIZE 2
  139. /* Where are the sensors address/data registers relative to the region offset */
  140. #define W83781D_ADDR_REG_OFFSET 0
  141. #define W83781D_DATA_REG_OFFSET 1
  142. /* The W83781D registers */
  143. /* The W83782D registers for nr=7,8 are in bank 5 */
  144. #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
  145. (0x554 + (((nr) - 7) * 2)))
  146. #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
  147. (0x555 + (((nr) - 7) * 2)))
  148. #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
  149. (0x550 + (nr) - 7))
  150. /* nr:0-2 for fans:1-3 */
  151. #define W83627HF_REG_FAN_MIN(nr) (0x3b + (nr))
  152. #define W83627HF_REG_FAN(nr) (0x28 + (nr))
  153. #define W83627HF_REG_TEMP2_CONFIG 0x152
  154. #define W83627HF_REG_TEMP3_CONFIG 0x252
  155. /* these are zero-based, unlike config constants above */
  156. static const u16 w83627hf_reg_temp[] = { 0x27, 0x150, 0x250 };
  157. static const u16 w83627hf_reg_temp_hyst[] = { 0x3A, 0x153, 0x253 };
  158. static const u16 w83627hf_reg_temp_over[] = { 0x39, 0x155, 0x255 };
  159. #define W83781D_REG_BANK 0x4E
  160. #define W83781D_REG_CONFIG 0x40
  161. #define W83781D_REG_ALARM1 0x459
  162. #define W83781D_REG_ALARM2 0x45A
  163. #define W83781D_REG_ALARM3 0x45B
  164. #define W83781D_REG_BEEP_CONFIG 0x4D
  165. #define W83781D_REG_BEEP_INTS1 0x56
  166. #define W83781D_REG_BEEP_INTS2 0x57
  167. #define W83781D_REG_BEEP_INTS3 0x453
  168. #define W83781D_REG_VID_FANDIV 0x47
  169. #define W83781D_REG_CHIPID 0x49
  170. #define W83781D_REG_WCHIPID 0x58
  171. #define W83781D_REG_CHIPMAN 0x4F
  172. #define W83781D_REG_PIN 0x4B
  173. #define W83781D_REG_VBAT 0x5D
  174. #define W83627HF_REG_PWM1 0x5A
  175. #define W83627HF_REG_PWM2 0x5B
  176. static const u8 W83627THF_REG_PWM_ENABLE[] = {
  177. 0x04, /* FAN 1 mode */
  178. 0x04, /* FAN 2 mode */
  179. 0x12, /* FAN AUX mode */
  180. };
  181. static const u8 W83627THF_PWM_ENABLE_SHIFT[] = { 2, 4, 1 };
  182. #define W83627THF_REG_PWM1 0x01 /* 697HF/637HF/687THF too */
  183. #define W83627THF_REG_PWM2 0x03 /* 697HF/637HF/687THF too */
  184. #define W83627THF_REG_PWM3 0x11 /* 637HF/687THF too */
  185. #define W83627THF_REG_VRM_OVT_CFG 0x18 /* 637HF/687THF too */
  186. static const u8 regpwm_627hf[] = { W83627HF_REG_PWM1, W83627HF_REG_PWM2 };
  187. static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
  188. W83627THF_REG_PWM3 };
  189. #define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
  190. regpwm_627hf[nr] : regpwm[nr])
  191. #define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
  192. #define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
  193. #define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
  194. #define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
  195. static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
  196. W83637HF_REG_PWM_FREQ2,
  197. W83637HF_REG_PWM_FREQ3 };
  198. #define W83627HF_BASE_PWM_FREQ 46870
  199. #define W83781D_REG_I2C_ADDR 0x48
  200. #define W83781D_REG_I2C_SUBADDR 0x4A
  201. /* Sensor selection */
  202. #define W83781D_REG_SCFG1 0x5D
  203. static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
  204. #define W83781D_REG_SCFG2 0x59
  205. static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
  206. #define W83781D_DEFAULT_BETA 3435
  207. /*
  208. * Conversions. Limit checking is only done on the TO_REG
  209. * variants. Note that you should be a bit careful with which arguments
  210. * these macros are called: arguments may be evaluated more than once.
  211. * Fixing this is just not worth it.
  212. */
  213. #define IN_TO_REG(val) (clamp_val((((val) + 8) / 16), 0, 255))
  214. #define IN_FROM_REG(val) ((val) * 16)
  215. static inline u8 FAN_TO_REG(long rpm, int div)
  216. {
  217. if (rpm == 0)
  218. return 255;
  219. rpm = clamp_val(rpm, 1, 1000000);
  220. return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
  221. }
  222. #define TEMP_MIN (-128000)
  223. #define TEMP_MAX ( 127000)
  224. /*
  225. * TEMP: 0.001C/bit (-128C to +127C)
  226. * REG: 1C/bit, two's complement
  227. */
  228. static u8 TEMP_TO_REG(long temp)
  229. {
  230. int ntemp = clamp_val(temp, TEMP_MIN, TEMP_MAX);
  231. ntemp += (ntemp < 0 ? -500 : 500);
  232. return (u8)(ntemp / 1000);
  233. }
  234. static int TEMP_FROM_REG(u8 reg)
  235. {
  236. return (s8)reg * 1000;
  237. }
  238. #define FAN_FROM_REG(val,div) ((val)==0?-1:(val)==255?0:1350000/((val)*(div)))
  239. #define PWM_TO_REG(val) (clamp_val((val), 0, 255))
  240. static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
  241. {
  242. unsigned long freq;
  243. freq = W83627HF_BASE_PWM_FREQ >> reg;
  244. return freq;
  245. }
  246. static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
  247. {
  248. u8 i;
  249. /*
  250. * Only 5 dividers (1 2 4 8 16)
  251. * Search for the nearest available frequency
  252. */
  253. for (i = 0; i < 4; i++) {
  254. if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
  255. (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
  256. break;
  257. }
  258. return i;
  259. }
  260. static inline unsigned long pwm_freq_from_reg(u8 reg)
  261. {
  262. /* Clock bit 8 -> 180 kHz or 24 MHz */
  263. unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
  264. reg &= 0x7f;
  265. /* This should not happen but anyway... */
  266. if (reg == 0)
  267. reg++;
  268. return clock / (reg << 8);
  269. }
  270. static inline u8 pwm_freq_to_reg(unsigned long val)
  271. {
  272. /* Minimum divider value is 0x01 and maximum is 0x7F */
  273. if (val >= 93750) /* The highest we can do */
  274. return 0x01;
  275. if (val >= 720) /* Use 24 MHz clock */
  276. return 24000000UL / (val << 8);
  277. if (val < 6) /* The lowest we can do */
  278. return 0xFF;
  279. else /* Use 180 kHz clock */
  280. return 0x80 | (180000UL / (val << 8));
  281. }
  282. #define BEEP_MASK_FROM_REG(val) ((val) & 0xff7fff)
  283. #define BEEP_MASK_TO_REG(val) ((val) & 0xff7fff)
  284. #define DIV_FROM_REG(val) (1 << (val))
  285. static inline u8 DIV_TO_REG(long val)
  286. {
  287. int i;
  288. val = clamp_val(val, 1, 128) >> 1;
  289. for (i = 0; i < 7; i++) {
  290. if (val == 0)
  291. break;
  292. val >>= 1;
  293. }
  294. return (u8)i;
  295. }
  296. /*
  297. * For each registered chip, we need to keep some data in memory.
  298. * The structure is dynamically allocated.
  299. */
  300. struct w83627hf_data {
  301. unsigned short addr;
  302. const char *name;
  303. struct device *hwmon_dev;
  304. struct mutex lock;
  305. enum chips type;
  306. struct mutex update_lock;
  307. char valid; /* !=0 if following fields are valid */
  308. unsigned long last_updated; /* In jiffies */
  309. u8 in[9]; /* Register value */
  310. u8 in_max[9]; /* Register value */
  311. u8 in_min[9]; /* Register value */
  312. u8 fan[3]; /* Register value */
  313. u8 fan_min[3]; /* Register value */
  314. u16 temp[3]; /* Register value */
  315. u16 temp_max[3]; /* Register value */
  316. u16 temp_max_hyst[3]; /* Register value */
  317. u8 fan_div[3]; /* Register encoding, shifted right */
  318. u8 vid; /* Register encoding, combined */
  319. u32 alarms; /* Register encoding, combined */
  320. u32 beep_mask; /* Register encoding, combined */
  321. u8 pwm[3]; /* Register value */
  322. u8 pwm_enable[3]; /* 1 = manual
  323. * 2 = thermal cruise (also called SmartFan I)
  324. * 3 = fan speed cruise
  325. */
  326. u8 pwm_freq[3]; /* Register value */
  327. u16 sens[3]; /* 1 = pentium diode; 2 = 3904 diode;
  328. * 4 = thermistor
  329. */
  330. u8 vrm;
  331. u8 vrm_ovt; /* Register value, 627THF/637HF/687THF only */
  332. #ifdef CONFIG_PM
  333. /* Remember extra register values over suspend/resume */
  334. u8 scfg1;
  335. u8 scfg2;
  336. #endif
  337. };
  338. static int w83627hf_probe(struct platform_device *pdev);
  339. static int w83627hf_remove(struct platform_device *pdev);
  340. static int w83627hf_read_value(struct w83627hf_data *data, u16 reg);
  341. static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value);
  342. static void w83627hf_update_fan_div(struct w83627hf_data *data);
  343. static struct w83627hf_data *w83627hf_update_device(struct device *dev);
  344. static void w83627hf_init_device(struct platform_device *pdev);
  345. #ifdef CONFIG_PM
  346. static int w83627hf_suspend(struct device *dev)
  347. {
  348. struct w83627hf_data *data = w83627hf_update_device(dev);
  349. mutex_lock(&data->update_lock);
  350. data->scfg1 = w83627hf_read_value(data, W83781D_REG_SCFG1);
  351. data->scfg2 = w83627hf_read_value(data, W83781D_REG_SCFG2);
  352. mutex_unlock(&data->update_lock);
  353. return 0;
  354. }
  355. static int w83627hf_resume(struct device *dev)
  356. {
  357. struct w83627hf_data *data = dev_get_drvdata(dev);
  358. int i, num_temps = (data->type == w83697hf) ? 2 : 3;
  359. /* Restore limits */
  360. mutex_lock(&data->update_lock);
  361. for (i = 0; i <= 8; i++) {
  362. /* skip missing sensors */
  363. if (((data->type == w83697hf) && (i == 1)) ||
  364. ((data->type != w83627hf && data->type != w83697hf)
  365. && (i == 5 || i == 6)))
  366. continue;
  367. w83627hf_write_value(data, W83781D_REG_IN_MAX(i),
  368. data->in_max[i]);
  369. w83627hf_write_value(data, W83781D_REG_IN_MIN(i),
  370. data->in_min[i]);
  371. }
  372. for (i = 0; i <= 2; i++)
  373. w83627hf_write_value(data, W83627HF_REG_FAN_MIN(i),
  374. data->fan_min[i]);
  375. for (i = 0; i < num_temps; i++) {
  376. w83627hf_write_value(data, w83627hf_reg_temp_over[i],
  377. data->temp_max[i]);
  378. w83627hf_write_value(data, w83627hf_reg_temp_hyst[i],
  379. data->temp_max_hyst[i]);
  380. }
  381. /* Fixup BIOS bugs */
  382. if (data->type == w83627thf || data->type == w83637hf ||
  383. data->type == w83687thf)
  384. w83627hf_write_value(data, W83627THF_REG_VRM_OVT_CFG,
  385. data->vrm_ovt);
  386. w83627hf_write_value(data, W83781D_REG_SCFG1, data->scfg1);
  387. w83627hf_write_value(data, W83781D_REG_SCFG2, data->scfg2);
  388. /* Force re-reading all values */
  389. data->valid = 0;
  390. mutex_unlock(&data->update_lock);
  391. return 0;
  392. }
  393. static const struct dev_pm_ops w83627hf_dev_pm_ops = {
  394. .suspend = w83627hf_suspend,
  395. .resume = w83627hf_resume,
  396. };
  397. #define W83627HF_DEV_PM_OPS (&w83627hf_dev_pm_ops)
  398. #else
  399. #define W83627HF_DEV_PM_OPS NULL
  400. #endif /* CONFIG_PM */
  401. static struct platform_driver w83627hf_driver = {
  402. .driver = {
  403. .name = DRVNAME,
  404. .pm = W83627HF_DEV_PM_OPS,
  405. },
  406. .probe = w83627hf_probe,
  407. .remove = w83627hf_remove,
  408. };
  409. static ssize_t
  410. show_in_input(struct device *dev, struct device_attribute *devattr, char *buf)
  411. {
  412. int nr = to_sensor_dev_attr(devattr)->index;
  413. struct w83627hf_data *data = w83627hf_update_device(dev);
  414. return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in[nr]));
  415. }
  416. static ssize_t
  417. show_in_min(struct device *dev, struct device_attribute *devattr, char *buf)
  418. {
  419. int nr = to_sensor_dev_attr(devattr)->index;
  420. struct w83627hf_data *data = w83627hf_update_device(dev);
  421. return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_min[nr]));
  422. }
  423. static ssize_t
  424. show_in_max(struct device *dev, struct device_attribute *devattr, char *buf)
  425. {
  426. int nr = to_sensor_dev_attr(devattr)->index;
  427. struct w83627hf_data *data = w83627hf_update_device(dev);
  428. return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->in_max[nr]));
  429. }
  430. static ssize_t
  431. store_in_min(struct device *dev, struct device_attribute *devattr,
  432. const char *buf, size_t count)
  433. {
  434. int nr = to_sensor_dev_attr(devattr)->index;
  435. struct w83627hf_data *data = dev_get_drvdata(dev);
  436. long val;
  437. int err;
  438. err = kstrtol(buf, 10, &val);
  439. if (err)
  440. return err;
  441. mutex_lock(&data->update_lock);
  442. data->in_min[nr] = IN_TO_REG(val);
  443. w83627hf_write_value(data, W83781D_REG_IN_MIN(nr), data->in_min[nr]);
  444. mutex_unlock(&data->update_lock);
  445. return count;
  446. }
  447. static ssize_t
  448. store_in_max(struct device *dev, struct device_attribute *devattr,
  449. const char *buf, size_t count)
  450. {
  451. int nr = to_sensor_dev_attr(devattr)->index;
  452. struct w83627hf_data *data = dev_get_drvdata(dev);
  453. long val;
  454. int err;
  455. err = kstrtol(buf, 10, &val);
  456. if (err)
  457. return err;
  458. mutex_lock(&data->update_lock);
  459. data->in_max[nr] = IN_TO_REG(val);
  460. w83627hf_write_value(data, W83781D_REG_IN_MAX(nr), data->in_max[nr]);
  461. mutex_unlock(&data->update_lock);
  462. return count;
  463. }
  464. #define sysfs_vin_decl(offset) \
  465. static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
  466. show_in_input, NULL, offset); \
  467. static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO|S_IWUSR, \
  468. show_in_min, store_in_min, offset); \
  469. static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO|S_IWUSR, \
  470. show_in_max, store_in_max, offset);
  471. sysfs_vin_decl(1);
  472. sysfs_vin_decl(2);
  473. sysfs_vin_decl(3);
  474. sysfs_vin_decl(4);
  475. sysfs_vin_decl(5);
  476. sysfs_vin_decl(6);
  477. sysfs_vin_decl(7);
  478. sysfs_vin_decl(8);
  479. /* use a different set of functions for in0 */
  480. static ssize_t show_in_0(struct w83627hf_data *data, char *buf, u8 reg)
  481. {
  482. long in0;
  483. if ((data->vrm_ovt & 0x01) &&
  484. (w83627thf == data->type || w83637hf == data->type
  485. || w83687thf == data->type))
  486. /* use VRM9 calculation */
  487. in0 = (long)((reg * 488 + 70000 + 50) / 100);
  488. else
  489. /* use VRM8 (standard) calculation */
  490. in0 = (long)IN_FROM_REG(reg);
  491. return sprintf(buf,"%ld\n", in0);
  492. }
  493. static ssize_t show_regs_in_0(struct device *dev, struct device_attribute *attr, char *buf)
  494. {
  495. struct w83627hf_data *data = w83627hf_update_device(dev);
  496. return show_in_0(data, buf, data->in[0]);
  497. }
  498. static ssize_t show_regs_in_min0(struct device *dev, struct device_attribute *attr, char *buf)
  499. {
  500. struct w83627hf_data *data = w83627hf_update_device(dev);
  501. return show_in_0(data, buf, data->in_min[0]);
  502. }
  503. static ssize_t show_regs_in_max0(struct device *dev, struct device_attribute *attr, char *buf)
  504. {
  505. struct w83627hf_data *data = w83627hf_update_device(dev);
  506. return show_in_0(data, buf, data->in_max[0]);
  507. }
  508. static ssize_t store_regs_in_min0(struct device *dev, struct device_attribute *attr,
  509. const char *buf, size_t count)
  510. {
  511. struct w83627hf_data *data = dev_get_drvdata(dev);
  512. unsigned long val;
  513. int err;
  514. err = kstrtoul(buf, 10, &val);
  515. if (err)
  516. return err;
  517. mutex_lock(&data->update_lock);
  518. if ((data->vrm_ovt & 0x01) &&
  519. (w83627thf == data->type || w83637hf == data->type
  520. || w83687thf == data->type))
  521. /* use VRM9 calculation */
  522. data->in_min[0] =
  523. clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
  524. else
  525. /* use VRM8 (standard) calculation */
  526. data->in_min[0] = IN_TO_REG(val);
  527. w83627hf_write_value(data, W83781D_REG_IN_MIN(0), data->in_min[0]);
  528. mutex_unlock(&data->update_lock);
  529. return count;
  530. }
  531. static ssize_t store_regs_in_max0(struct device *dev, struct device_attribute *attr,
  532. const char *buf, size_t count)
  533. {
  534. struct w83627hf_data *data = dev_get_drvdata(dev);
  535. unsigned long val;
  536. int err;
  537. err = kstrtoul(buf, 10, &val);
  538. if (err)
  539. return err;
  540. mutex_lock(&data->update_lock);
  541. if ((data->vrm_ovt & 0x01) &&
  542. (w83627thf == data->type || w83637hf == data->type
  543. || w83687thf == data->type))
  544. /* use VRM9 calculation */
  545. data->in_max[0] =
  546. clamp_val(((val * 100) - 70000 + 244) / 488, 0, 255);
  547. else
  548. /* use VRM8 (standard) calculation */
  549. data->in_max[0] = IN_TO_REG(val);
  550. w83627hf_write_value(data, W83781D_REG_IN_MAX(0), data->in_max[0]);
  551. mutex_unlock(&data->update_lock);
  552. return count;
  553. }
  554. static DEVICE_ATTR(in0_input, S_IRUGO, show_regs_in_0, NULL);
  555. static DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
  556. show_regs_in_min0, store_regs_in_min0);
  557. static DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
  558. show_regs_in_max0, store_regs_in_max0);
  559. static ssize_t
  560. show_fan_input(struct device *dev, struct device_attribute *devattr, char *buf)
  561. {
  562. int nr = to_sensor_dev_attr(devattr)->index;
  563. struct w83627hf_data *data = w83627hf_update_device(dev);
  564. return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan[nr],
  565. (long)DIV_FROM_REG(data->fan_div[nr])));
  566. }
  567. static ssize_t
  568. show_fan_min(struct device *dev, struct device_attribute *devattr, char *buf)
  569. {
  570. int nr = to_sensor_dev_attr(devattr)->index;
  571. struct w83627hf_data *data = w83627hf_update_device(dev);
  572. return sprintf(buf, "%ld\n", FAN_FROM_REG(data->fan_min[nr],
  573. (long)DIV_FROM_REG(data->fan_div[nr])));
  574. }
  575. static ssize_t
  576. store_fan_min(struct device *dev, struct device_attribute *devattr,
  577. const char *buf, size_t count)
  578. {
  579. int nr = to_sensor_dev_attr(devattr)->index;
  580. struct w83627hf_data *data = dev_get_drvdata(dev);
  581. unsigned long val;
  582. int err;
  583. err = kstrtoul(buf, 10, &val);
  584. if (err)
  585. return err;
  586. mutex_lock(&data->update_lock);
  587. data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
  588. w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr),
  589. data->fan_min[nr]);
  590. mutex_unlock(&data->update_lock);
  591. return count;
  592. }
  593. #define sysfs_fan_decl(offset) \
  594. static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
  595. show_fan_input, NULL, offset - 1); \
  596. static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
  597. show_fan_min, store_fan_min, offset - 1);
  598. sysfs_fan_decl(1);
  599. sysfs_fan_decl(2);
  600. sysfs_fan_decl(3);
  601. static ssize_t
  602. show_temp(struct device *dev, struct device_attribute *devattr, char *buf)
  603. {
  604. int nr = to_sensor_dev_attr(devattr)->index;
  605. struct w83627hf_data *data = w83627hf_update_device(dev);
  606. u16 tmp = data->temp[nr];
  607. return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
  608. : (long) TEMP_FROM_REG(tmp));
  609. }
  610. static ssize_t
  611. show_temp_max(struct device *dev, struct device_attribute *devattr,
  612. char *buf)
  613. {
  614. int nr = to_sensor_dev_attr(devattr)->index;
  615. struct w83627hf_data *data = w83627hf_update_device(dev);
  616. u16 tmp = data->temp_max[nr];
  617. return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
  618. : (long) TEMP_FROM_REG(tmp));
  619. }
  620. static ssize_t
  621. show_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
  622. char *buf)
  623. {
  624. int nr = to_sensor_dev_attr(devattr)->index;
  625. struct w83627hf_data *data = w83627hf_update_device(dev);
  626. u16 tmp = data->temp_max_hyst[nr];
  627. return sprintf(buf, "%ld\n", (nr) ? (long) LM75_TEMP_FROM_REG(tmp)
  628. : (long) TEMP_FROM_REG(tmp));
  629. }
  630. static ssize_t
  631. store_temp_max(struct device *dev, struct device_attribute *devattr,
  632. const char *buf, size_t count)
  633. {
  634. int nr = to_sensor_dev_attr(devattr)->index;
  635. struct w83627hf_data *data = dev_get_drvdata(dev);
  636. u16 tmp;
  637. long val;
  638. int err;
  639. err = kstrtol(buf, 10, &val);
  640. if (err)
  641. return err;
  642. tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
  643. mutex_lock(&data->update_lock);
  644. data->temp_max[nr] = tmp;
  645. w83627hf_write_value(data, w83627hf_reg_temp_over[nr], tmp);
  646. mutex_unlock(&data->update_lock);
  647. return count;
  648. }
  649. static ssize_t
  650. store_temp_max_hyst(struct device *dev, struct device_attribute *devattr,
  651. const char *buf, size_t count)
  652. {
  653. int nr = to_sensor_dev_attr(devattr)->index;
  654. struct w83627hf_data *data = dev_get_drvdata(dev);
  655. u16 tmp;
  656. long val;
  657. int err;
  658. err = kstrtol(buf, 10, &val);
  659. if (err)
  660. return err;
  661. tmp = (nr) ? LM75_TEMP_TO_REG(val) : TEMP_TO_REG(val);
  662. mutex_lock(&data->update_lock);
  663. data->temp_max_hyst[nr] = tmp;
  664. w83627hf_write_value(data, w83627hf_reg_temp_hyst[nr], tmp);
  665. mutex_unlock(&data->update_lock);
  666. return count;
  667. }
  668. #define sysfs_temp_decl(offset) \
  669. static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
  670. show_temp, NULL, offset - 1); \
  671. static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO|S_IWUSR, \
  672. show_temp_max, store_temp_max, offset - 1); \
  673. static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO|S_IWUSR, \
  674. show_temp_max_hyst, store_temp_max_hyst, offset - 1);
  675. sysfs_temp_decl(1);
  676. sysfs_temp_decl(2);
  677. sysfs_temp_decl(3);
  678. static ssize_t
  679. show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
  680. {
  681. struct w83627hf_data *data = w83627hf_update_device(dev);
  682. return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
  683. }
  684. static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
  685. static ssize_t
  686. show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
  687. {
  688. struct w83627hf_data *data = dev_get_drvdata(dev);
  689. return sprintf(buf, "%ld\n", (long) data->vrm);
  690. }
  691. static ssize_t
  692. store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
  693. {
  694. struct w83627hf_data *data = dev_get_drvdata(dev);
  695. unsigned long val;
  696. int err;
  697. err = kstrtoul(buf, 10, &val);
  698. if (err)
  699. return err;
  700. if (val > 255)
  701. return -EINVAL;
  702. data->vrm = val;
  703. return count;
  704. }
  705. static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
  706. static ssize_t
  707. show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
  708. {
  709. struct w83627hf_data *data = w83627hf_update_device(dev);
  710. return sprintf(buf, "%ld\n", (long) data->alarms);
  711. }
  712. static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
  713. static ssize_t
  714. show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
  715. {
  716. struct w83627hf_data *data = w83627hf_update_device(dev);
  717. int bitnr = to_sensor_dev_attr(attr)->index;
  718. return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
  719. }
  720. static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
  721. static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
  722. static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
  723. static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
  724. static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8);
  725. static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 9);
  726. static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 10);
  727. static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16);
  728. static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17);
  729. static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6);
  730. static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7);
  731. static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11);
  732. static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4);
  733. static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5);
  734. static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
  735. static ssize_t
  736. show_beep_mask(struct device *dev, struct device_attribute *attr, char *buf)
  737. {
  738. struct w83627hf_data *data = w83627hf_update_device(dev);
  739. return sprintf(buf, "%ld\n",
  740. (long)BEEP_MASK_FROM_REG(data->beep_mask));
  741. }
  742. static ssize_t
  743. store_beep_mask(struct device *dev, struct device_attribute *attr,
  744. const char *buf, size_t count)
  745. {
  746. struct w83627hf_data *data = dev_get_drvdata(dev);
  747. unsigned long val;
  748. int err;
  749. err = kstrtoul(buf, 10, &val);
  750. if (err)
  751. return err;
  752. mutex_lock(&data->update_lock);
  753. /* preserve beep enable */
  754. data->beep_mask = (data->beep_mask & 0x8000)
  755. | BEEP_MASK_TO_REG(val);
  756. w83627hf_write_value(data, W83781D_REG_BEEP_INTS1,
  757. data->beep_mask & 0xff);
  758. w83627hf_write_value(data, W83781D_REG_BEEP_INTS3,
  759. ((data->beep_mask) >> 16) & 0xff);
  760. w83627hf_write_value(data, W83781D_REG_BEEP_INTS2,
  761. (data->beep_mask >> 8) & 0xff);
  762. mutex_unlock(&data->update_lock);
  763. return count;
  764. }
  765. static DEVICE_ATTR(beep_mask, S_IRUGO | S_IWUSR,
  766. show_beep_mask, store_beep_mask);
  767. static ssize_t
  768. show_beep(struct device *dev, struct device_attribute *attr, char *buf)
  769. {
  770. struct w83627hf_data *data = w83627hf_update_device(dev);
  771. int bitnr = to_sensor_dev_attr(attr)->index;
  772. return sprintf(buf, "%u\n", (data->beep_mask >> bitnr) & 1);
  773. }
  774. static ssize_t
  775. store_beep(struct device *dev, struct device_attribute *attr,
  776. const char *buf, size_t count)
  777. {
  778. struct w83627hf_data *data = dev_get_drvdata(dev);
  779. int bitnr = to_sensor_dev_attr(attr)->index;
  780. u8 reg;
  781. unsigned long bit;
  782. int err;
  783. err = kstrtoul(buf, 10, &bit);
  784. if (err)
  785. return err;
  786. if (bit & ~1)
  787. return -EINVAL;
  788. mutex_lock(&data->update_lock);
  789. if (bit)
  790. data->beep_mask |= (1 << bitnr);
  791. else
  792. data->beep_mask &= ~(1 << bitnr);
  793. if (bitnr < 8) {
  794. reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS1);
  795. if (bit)
  796. reg |= (1 << bitnr);
  797. else
  798. reg &= ~(1 << bitnr);
  799. w83627hf_write_value(data, W83781D_REG_BEEP_INTS1, reg);
  800. } else if (bitnr < 16) {
  801. reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
  802. if (bit)
  803. reg |= (1 << (bitnr - 8));
  804. else
  805. reg &= ~(1 << (bitnr - 8));
  806. w83627hf_write_value(data, W83781D_REG_BEEP_INTS2, reg);
  807. } else {
  808. reg = w83627hf_read_value(data, W83781D_REG_BEEP_INTS3);
  809. if (bit)
  810. reg |= (1 << (bitnr - 16));
  811. else
  812. reg &= ~(1 << (bitnr - 16));
  813. w83627hf_write_value(data, W83781D_REG_BEEP_INTS3, reg);
  814. }
  815. mutex_unlock(&data->update_lock);
  816. return count;
  817. }
  818. static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
  819. show_beep, store_beep, 0);
  820. static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO | S_IWUSR,
  821. show_beep, store_beep, 1);
  822. static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO | S_IWUSR,
  823. show_beep, store_beep, 2);
  824. static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO | S_IWUSR,
  825. show_beep, store_beep, 3);
  826. static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO | S_IWUSR,
  827. show_beep, store_beep, 8);
  828. static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO | S_IWUSR,
  829. show_beep, store_beep, 9);
  830. static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO | S_IWUSR,
  831. show_beep, store_beep, 10);
  832. static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO | S_IWUSR,
  833. show_beep, store_beep, 16);
  834. static SENSOR_DEVICE_ATTR(in8_beep, S_IRUGO | S_IWUSR,
  835. show_beep, store_beep, 17);
  836. static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO | S_IWUSR,
  837. show_beep, store_beep, 6);
  838. static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO | S_IWUSR,
  839. show_beep, store_beep, 7);
  840. static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO | S_IWUSR,
  841. show_beep, store_beep, 11);
  842. static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
  843. show_beep, store_beep, 4);
  844. static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO | S_IWUSR,
  845. show_beep, store_beep, 5);
  846. static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO | S_IWUSR,
  847. show_beep, store_beep, 13);
  848. static SENSOR_DEVICE_ATTR(beep_enable, S_IRUGO | S_IWUSR,
  849. show_beep, store_beep, 15);
  850. static ssize_t
  851. show_fan_div(struct device *dev, struct device_attribute *devattr, char *buf)
  852. {
  853. int nr = to_sensor_dev_attr(devattr)->index;
  854. struct w83627hf_data *data = w83627hf_update_device(dev);
  855. return sprintf(buf, "%ld\n",
  856. (long) DIV_FROM_REG(data->fan_div[nr]));
  857. }
  858. /*
  859. * Note: we save and restore the fan minimum here, because its value is
  860. * determined in part by the fan divisor. This follows the principle of
  861. * least surprise; the user doesn't expect the fan minimum to change just
  862. * because the divisor changed.
  863. */
  864. static ssize_t
  865. store_fan_div(struct device *dev, struct device_attribute *devattr,
  866. const char *buf, size_t count)
  867. {
  868. int nr = to_sensor_dev_attr(devattr)->index;
  869. struct w83627hf_data *data = dev_get_drvdata(dev);
  870. unsigned long min;
  871. u8 reg;
  872. unsigned long val;
  873. int err;
  874. err = kstrtoul(buf, 10, &val);
  875. if (err)
  876. return err;
  877. mutex_lock(&data->update_lock);
  878. /* Save fan_min */
  879. min = FAN_FROM_REG(data->fan_min[nr],
  880. DIV_FROM_REG(data->fan_div[nr]));
  881. data->fan_div[nr] = DIV_TO_REG(val);
  882. reg = (w83627hf_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
  883. & (nr==0 ? 0xcf : 0x3f))
  884. | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
  885. w83627hf_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
  886. reg = (w83627hf_read_value(data, W83781D_REG_VBAT)
  887. & ~(1 << (5 + nr)))
  888. | ((data->fan_div[nr] & 0x04) << (3 + nr));
  889. w83627hf_write_value(data, W83781D_REG_VBAT, reg);
  890. /* Restore fan_min */
  891. data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
  892. w83627hf_write_value(data, W83627HF_REG_FAN_MIN(nr), data->fan_min[nr]);
  893. mutex_unlock(&data->update_lock);
  894. return count;
  895. }
  896. static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO|S_IWUSR,
  897. show_fan_div, store_fan_div, 0);
  898. static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO|S_IWUSR,
  899. show_fan_div, store_fan_div, 1);
  900. static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO|S_IWUSR,
  901. show_fan_div, store_fan_div, 2);
  902. static ssize_t
  903. show_pwm(struct device *dev, struct device_attribute *devattr, char *buf)
  904. {
  905. int nr = to_sensor_dev_attr(devattr)->index;
  906. struct w83627hf_data *data = w83627hf_update_device(dev);
  907. return sprintf(buf, "%ld\n", (long) data->pwm[nr]);
  908. }
  909. static ssize_t
  910. store_pwm(struct device *dev, struct device_attribute *devattr,
  911. const char *buf, size_t count)
  912. {
  913. int nr = to_sensor_dev_attr(devattr)->index;
  914. struct w83627hf_data *data = dev_get_drvdata(dev);
  915. unsigned long val;
  916. int err;
  917. err = kstrtoul(buf, 10, &val);
  918. if (err)
  919. return err;
  920. mutex_lock(&data->update_lock);
  921. if (data->type == w83627thf) {
  922. /* bits 0-3 are reserved in 627THF */
  923. data->pwm[nr] = PWM_TO_REG(val) & 0xf0;
  924. w83627hf_write_value(data,
  925. W836X7HF_REG_PWM(data->type, nr),
  926. data->pwm[nr] |
  927. (w83627hf_read_value(data,
  928. W836X7HF_REG_PWM(data->type, nr)) & 0x0f));
  929. } else {
  930. data->pwm[nr] = PWM_TO_REG(val);
  931. w83627hf_write_value(data,
  932. W836X7HF_REG_PWM(data->type, nr),
  933. data->pwm[nr]);
  934. }
  935. mutex_unlock(&data->update_lock);
  936. return count;
  937. }
  938. static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 0);
  939. static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 1);
  940. static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO|S_IWUSR, show_pwm, store_pwm, 2);
  941. static ssize_t
  942. show_pwm_enable(struct device *dev, struct device_attribute *devattr, char *buf)
  943. {
  944. int nr = to_sensor_dev_attr(devattr)->index;
  945. struct w83627hf_data *data = w83627hf_update_device(dev);
  946. return sprintf(buf, "%d\n", data->pwm_enable[nr]);
  947. }
  948. static ssize_t
  949. store_pwm_enable(struct device *dev, struct device_attribute *devattr,
  950. const char *buf, size_t count)
  951. {
  952. int nr = to_sensor_dev_attr(devattr)->index;
  953. struct w83627hf_data *data = dev_get_drvdata(dev);
  954. u8 reg;
  955. unsigned long val;
  956. int err;
  957. err = kstrtoul(buf, 10, &val);
  958. if (err)
  959. return err;
  960. if (!val || val > 3) /* modes 1, 2 and 3 are supported */
  961. return -EINVAL;
  962. mutex_lock(&data->update_lock);
  963. data->pwm_enable[nr] = val;
  964. reg = w83627hf_read_value(data, W83627THF_REG_PWM_ENABLE[nr]);
  965. reg &= ~(0x03 << W83627THF_PWM_ENABLE_SHIFT[nr]);
  966. reg |= (val - 1) << W83627THF_PWM_ENABLE_SHIFT[nr];
  967. w83627hf_write_value(data, W83627THF_REG_PWM_ENABLE[nr], reg);
  968. mutex_unlock(&data->update_lock);
  969. return count;
  970. }
  971. static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  972. store_pwm_enable, 0);
  973. static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  974. store_pwm_enable, 1);
  975. static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO|S_IWUSR, show_pwm_enable,
  976. store_pwm_enable, 2);
  977. static ssize_t
  978. show_pwm_freq(struct device *dev, struct device_attribute *devattr, char *buf)
  979. {
  980. int nr = to_sensor_dev_attr(devattr)->index;
  981. struct w83627hf_data *data = w83627hf_update_device(dev);
  982. if (data->type == w83627hf)
  983. return sprintf(buf, "%ld\n",
  984. pwm_freq_from_reg_627hf(data->pwm_freq[nr]));
  985. else
  986. return sprintf(buf, "%ld\n",
  987. pwm_freq_from_reg(data->pwm_freq[nr]));
  988. }
  989. static ssize_t
  990. store_pwm_freq(struct device *dev, struct device_attribute *devattr,
  991. const char *buf, size_t count)
  992. {
  993. int nr = to_sensor_dev_attr(devattr)->index;
  994. struct w83627hf_data *data = dev_get_drvdata(dev);
  995. static const u8 mask[]={0xF8, 0x8F};
  996. unsigned long val;
  997. int err;
  998. err = kstrtoul(buf, 10, &val);
  999. if (err)
  1000. return err;
  1001. mutex_lock(&data->update_lock);
  1002. if (data->type == w83627hf) {
  1003. data->pwm_freq[nr] = pwm_freq_to_reg_627hf(val);
  1004. w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
  1005. (data->pwm_freq[nr] << (nr*4)) |
  1006. (w83627hf_read_value(data,
  1007. W83627HF_REG_PWM_FREQ) & mask[nr]));
  1008. } else {
  1009. data->pwm_freq[nr] = pwm_freq_to_reg(val);
  1010. w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr],
  1011. data->pwm_freq[nr]);
  1012. }
  1013. mutex_unlock(&data->update_lock);
  1014. return count;
  1015. }
  1016. static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO|S_IWUSR,
  1017. show_pwm_freq, store_pwm_freq, 0);
  1018. static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO|S_IWUSR,
  1019. show_pwm_freq, store_pwm_freq, 1);
  1020. static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO|S_IWUSR,
  1021. show_pwm_freq, store_pwm_freq, 2);
  1022. static ssize_t
  1023. show_temp_type(struct device *dev, struct device_attribute *devattr,
  1024. char *buf)
  1025. {
  1026. int nr = to_sensor_dev_attr(devattr)->index;
  1027. struct w83627hf_data *data = w83627hf_update_device(dev);
  1028. return sprintf(buf, "%ld\n", (long) data->sens[nr]);
  1029. }
  1030. static ssize_t
  1031. store_temp_type(struct device *dev, struct device_attribute *devattr,
  1032. const char *buf, size_t count)
  1033. {
  1034. int nr = to_sensor_dev_attr(devattr)->index;
  1035. struct w83627hf_data *data = dev_get_drvdata(dev);
  1036. unsigned long val;
  1037. u32 tmp;
  1038. int err;
  1039. err = kstrtoul(buf, 10, &val);
  1040. if (err)
  1041. return err;
  1042. mutex_lock(&data->update_lock);
  1043. switch (val) {
  1044. case 1: /* PII/Celeron diode */
  1045. tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
  1046. w83627hf_write_value(data, W83781D_REG_SCFG1,
  1047. tmp | BIT_SCFG1[nr]);
  1048. tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
  1049. w83627hf_write_value(data, W83781D_REG_SCFG2,
  1050. tmp | BIT_SCFG2[nr]);
  1051. data->sens[nr] = val;
  1052. break;
  1053. case 2: /* 3904 */
  1054. tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
  1055. w83627hf_write_value(data, W83781D_REG_SCFG1,
  1056. tmp | BIT_SCFG1[nr]);
  1057. tmp = w83627hf_read_value(data, W83781D_REG_SCFG2);
  1058. w83627hf_write_value(data, W83781D_REG_SCFG2,
  1059. tmp & ~BIT_SCFG2[nr]);
  1060. data->sens[nr] = val;
  1061. break;
  1062. case W83781D_DEFAULT_BETA:
  1063. dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
  1064. "instead\n", W83781D_DEFAULT_BETA);
  1065. /* fall through */
  1066. case 4: /* thermistor */
  1067. tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
  1068. w83627hf_write_value(data, W83781D_REG_SCFG1,
  1069. tmp & ~BIT_SCFG1[nr]);
  1070. data->sens[nr] = val;
  1071. break;
  1072. default:
  1073. dev_err(dev,
  1074. "Invalid sensor type %ld; must be 1, 2, or 4\n",
  1075. (long) val);
  1076. break;
  1077. }
  1078. mutex_unlock(&data->update_lock);
  1079. return count;
  1080. }
  1081. #define sysfs_temp_type(offset) \
  1082. static SENSOR_DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, \
  1083. show_temp_type, store_temp_type, offset - 1);
  1084. sysfs_temp_type(1);
  1085. sysfs_temp_type(2);
  1086. sysfs_temp_type(3);
  1087. static ssize_t
  1088. show_name(struct device *dev, struct device_attribute *devattr, char *buf)
  1089. {
  1090. struct w83627hf_data *data = dev_get_drvdata(dev);
  1091. return sprintf(buf, "%s\n", data->name);
  1092. }
  1093. static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1094. static int __init w83627hf_find(int sioaddr, unsigned short *addr,
  1095. struct w83627hf_sio_data *sio_data)
  1096. {
  1097. int err = -ENODEV;
  1098. u16 val;
  1099. static __initconst char *const names[] = {
  1100. "W83627HF",
  1101. "W83627THF",
  1102. "W83697HF",
  1103. "W83637HF",
  1104. "W83687THF",
  1105. };
  1106. sio_data->sioaddr = sioaddr;
  1107. superio_enter(sio_data);
  1108. val = force_id ? force_id : superio_inb(sio_data, DEVID);
  1109. switch (val) {
  1110. case W627_DEVID:
  1111. sio_data->type = w83627hf;
  1112. break;
  1113. case W627THF_DEVID:
  1114. sio_data->type = w83627thf;
  1115. break;
  1116. case W697_DEVID:
  1117. sio_data->type = w83697hf;
  1118. break;
  1119. case W637_DEVID:
  1120. sio_data->type = w83637hf;
  1121. break;
  1122. case W687THF_DEVID:
  1123. sio_data->type = w83687thf;
  1124. break;
  1125. case 0xff: /* No device at all */
  1126. goto exit;
  1127. default:
  1128. pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%02x)\n", val);
  1129. goto exit;
  1130. }
  1131. superio_select(sio_data, W83627HF_LD_HWM);
  1132. val = (superio_inb(sio_data, WINB_BASE_REG) << 8) |
  1133. superio_inb(sio_data, WINB_BASE_REG + 1);
  1134. *addr = val & WINB_ALIGNMENT;
  1135. if (*addr == 0) {
  1136. pr_warn("Base address not set, skipping\n");
  1137. goto exit;
  1138. }
  1139. val = superio_inb(sio_data, WINB_ACT_REG);
  1140. if (!(val & 0x01)) {
  1141. pr_warn("Enabling HWM logical device\n");
  1142. superio_outb(sio_data, WINB_ACT_REG, val | 0x01);
  1143. }
  1144. err = 0;
  1145. pr_info(DRVNAME ": Found %s chip at %#x\n",
  1146. names[sio_data->type], *addr);
  1147. exit:
  1148. superio_exit(sio_data);
  1149. return err;
  1150. }
  1151. #define VIN_UNIT_ATTRS(_X_) \
  1152. &sensor_dev_attr_in##_X_##_input.dev_attr.attr, \
  1153. &sensor_dev_attr_in##_X_##_min.dev_attr.attr, \
  1154. &sensor_dev_attr_in##_X_##_max.dev_attr.attr, \
  1155. &sensor_dev_attr_in##_X_##_alarm.dev_attr.attr, \
  1156. &sensor_dev_attr_in##_X_##_beep.dev_attr.attr
  1157. #define FAN_UNIT_ATTRS(_X_) \
  1158. &sensor_dev_attr_fan##_X_##_input.dev_attr.attr, \
  1159. &sensor_dev_attr_fan##_X_##_min.dev_attr.attr, \
  1160. &sensor_dev_attr_fan##_X_##_div.dev_attr.attr, \
  1161. &sensor_dev_attr_fan##_X_##_alarm.dev_attr.attr, \
  1162. &sensor_dev_attr_fan##_X_##_beep.dev_attr.attr
  1163. #define TEMP_UNIT_ATTRS(_X_) \
  1164. &sensor_dev_attr_temp##_X_##_input.dev_attr.attr, \
  1165. &sensor_dev_attr_temp##_X_##_max.dev_attr.attr, \
  1166. &sensor_dev_attr_temp##_X_##_max_hyst.dev_attr.attr, \
  1167. &sensor_dev_attr_temp##_X_##_type.dev_attr.attr, \
  1168. &sensor_dev_attr_temp##_X_##_alarm.dev_attr.attr, \
  1169. &sensor_dev_attr_temp##_X_##_beep.dev_attr.attr
  1170. static struct attribute *w83627hf_attributes[] = {
  1171. &dev_attr_in0_input.attr,
  1172. &dev_attr_in0_min.attr,
  1173. &dev_attr_in0_max.attr,
  1174. &sensor_dev_attr_in0_alarm.dev_attr.attr,
  1175. &sensor_dev_attr_in0_beep.dev_attr.attr,
  1176. VIN_UNIT_ATTRS(2),
  1177. VIN_UNIT_ATTRS(3),
  1178. VIN_UNIT_ATTRS(4),
  1179. VIN_UNIT_ATTRS(7),
  1180. VIN_UNIT_ATTRS(8),
  1181. FAN_UNIT_ATTRS(1),
  1182. FAN_UNIT_ATTRS(2),
  1183. TEMP_UNIT_ATTRS(1),
  1184. TEMP_UNIT_ATTRS(2),
  1185. &dev_attr_alarms.attr,
  1186. &sensor_dev_attr_beep_enable.dev_attr.attr,
  1187. &dev_attr_beep_mask.attr,
  1188. &sensor_dev_attr_pwm1.dev_attr.attr,
  1189. &sensor_dev_attr_pwm2.dev_attr.attr,
  1190. &dev_attr_name.attr,
  1191. NULL
  1192. };
  1193. static const struct attribute_group w83627hf_group = {
  1194. .attrs = w83627hf_attributes,
  1195. };
  1196. static struct attribute *w83627hf_attributes_opt[] = {
  1197. VIN_UNIT_ATTRS(1),
  1198. VIN_UNIT_ATTRS(5),
  1199. VIN_UNIT_ATTRS(6),
  1200. FAN_UNIT_ATTRS(3),
  1201. TEMP_UNIT_ATTRS(3),
  1202. &sensor_dev_attr_pwm3.dev_attr.attr,
  1203. &sensor_dev_attr_pwm1_freq.dev_attr.attr,
  1204. &sensor_dev_attr_pwm2_freq.dev_attr.attr,
  1205. &sensor_dev_attr_pwm3_freq.dev_attr.attr,
  1206. &sensor_dev_attr_pwm1_enable.dev_attr.attr,
  1207. &sensor_dev_attr_pwm2_enable.dev_attr.attr,
  1208. &sensor_dev_attr_pwm3_enable.dev_attr.attr,
  1209. NULL
  1210. };
  1211. static const struct attribute_group w83627hf_group_opt = {
  1212. .attrs = w83627hf_attributes_opt,
  1213. };
  1214. static int w83627hf_probe(struct platform_device *pdev)
  1215. {
  1216. struct device *dev = &pdev->dev;
  1217. struct w83627hf_sio_data *sio_data = dev_get_platdata(dev);
  1218. struct w83627hf_data *data;
  1219. struct resource *res;
  1220. int err, i;
  1221. static const char *names[] = {
  1222. "w83627hf",
  1223. "w83627thf",
  1224. "w83697hf",
  1225. "w83637hf",
  1226. "w83687thf",
  1227. };
  1228. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  1229. if (!devm_request_region(dev, res->start, WINB_REGION_SIZE, DRVNAME)) {
  1230. dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
  1231. (unsigned long)res->start,
  1232. (unsigned long)(res->start + WINB_REGION_SIZE - 1));
  1233. return -EBUSY;
  1234. }
  1235. data = devm_kzalloc(dev, sizeof(struct w83627hf_data), GFP_KERNEL);
  1236. if (!data)
  1237. return -ENOMEM;
  1238. data->addr = res->start;
  1239. data->type = sio_data->type;
  1240. data->name = names[sio_data->type];
  1241. mutex_init(&data->lock);
  1242. mutex_init(&data->update_lock);
  1243. platform_set_drvdata(pdev, data);
  1244. /* Initialize the chip */
  1245. w83627hf_init_device(pdev);
  1246. /* A few vars need to be filled upon startup */
  1247. for (i = 0; i <= 2; i++)
  1248. data->fan_min[i] = w83627hf_read_value(
  1249. data, W83627HF_REG_FAN_MIN(i));
  1250. w83627hf_update_fan_div(data);
  1251. /* Register common device attributes */
  1252. err = sysfs_create_group(&dev->kobj, &w83627hf_group);
  1253. if (err)
  1254. return err;
  1255. /* Register chip-specific device attributes */
  1256. if (data->type == w83627hf || data->type == w83697hf)
  1257. if ((err = device_create_file(dev,
  1258. &sensor_dev_attr_in5_input.dev_attr))
  1259. || (err = device_create_file(dev,
  1260. &sensor_dev_attr_in5_min.dev_attr))
  1261. || (err = device_create_file(dev,
  1262. &sensor_dev_attr_in5_max.dev_attr))
  1263. || (err = device_create_file(dev,
  1264. &sensor_dev_attr_in5_alarm.dev_attr))
  1265. || (err = device_create_file(dev,
  1266. &sensor_dev_attr_in5_beep.dev_attr))
  1267. || (err = device_create_file(dev,
  1268. &sensor_dev_attr_in6_input.dev_attr))
  1269. || (err = device_create_file(dev,
  1270. &sensor_dev_attr_in6_min.dev_attr))
  1271. || (err = device_create_file(dev,
  1272. &sensor_dev_attr_in6_max.dev_attr))
  1273. || (err = device_create_file(dev,
  1274. &sensor_dev_attr_in6_alarm.dev_attr))
  1275. || (err = device_create_file(dev,
  1276. &sensor_dev_attr_in6_beep.dev_attr))
  1277. || (err = device_create_file(dev,
  1278. &sensor_dev_attr_pwm1_freq.dev_attr))
  1279. || (err = device_create_file(dev,
  1280. &sensor_dev_attr_pwm2_freq.dev_attr)))
  1281. goto error;
  1282. if (data->type != w83697hf)
  1283. if ((err = device_create_file(dev,
  1284. &sensor_dev_attr_in1_input.dev_attr))
  1285. || (err = device_create_file(dev,
  1286. &sensor_dev_attr_in1_min.dev_attr))
  1287. || (err = device_create_file(dev,
  1288. &sensor_dev_attr_in1_max.dev_attr))
  1289. || (err = device_create_file(dev,
  1290. &sensor_dev_attr_in1_alarm.dev_attr))
  1291. || (err = device_create_file(dev,
  1292. &sensor_dev_attr_in1_beep.dev_attr))
  1293. || (err = device_create_file(dev,
  1294. &sensor_dev_attr_fan3_input.dev_attr))
  1295. || (err = device_create_file(dev,
  1296. &sensor_dev_attr_fan3_min.dev_attr))
  1297. || (err = device_create_file(dev,
  1298. &sensor_dev_attr_fan3_div.dev_attr))
  1299. || (err = device_create_file(dev,
  1300. &sensor_dev_attr_fan3_alarm.dev_attr))
  1301. || (err = device_create_file(dev,
  1302. &sensor_dev_attr_fan3_beep.dev_attr))
  1303. || (err = device_create_file(dev,
  1304. &sensor_dev_attr_temp3_input.dev_attr))
  1305. || (err = device_create_file(dev,
  1306. &sensor_dev_attr_temp3_max.dev_attr))
  1307. || (err = device_create_file(dev,
  1308. &sensor_dev_attr_temp3_max_hyst.dev_attr))
  1309. || (err = device_create_file(dev,
  1310. &sensor_dev_attr_temp3_alarm.dev_attr))
  1311. || (err = device_create_file(dev,
  1312. &sensor_dev_attr_temp3_beep.dev_attr))
  1313. || (err = device_create_file(dev,
  1314. &sensor_dev_attr_temp3_type.dev_attr)))
  1315. goto error;
  1316. if (data->type != w83697hf && data->vid != 0xff) {
  1317. /* Convert VID to voltage based on VRM */
  1318. data->vrm = vid_which_vrm();
  1319. if ((err = device_create_file(dev, &dev_attr_cpu0_vid))
  1320. || (err = device_create_file(dev, &dev_attr_vrm)))
  1321. goto error;
  1322. }
  1323. if (data->type == w83627thf || data->type == w83637hf
  1324. || data->type == w83687thf) {
  1325. err = device_create_file(dev, &sensor_dev_attr_pwm3.dev_attr);
  1326. if (err)
  1327. goto error;
  1328. }
  1329. if (data->type == w83637hf || data->type == w83687thf)
  1330. if ((err = device_create_file(dev,
  1331. &sensor_dev_attr_pwm1_freq.dev_attr))
  1332. || (err = device_create_file(dev,
  1333. &sensor_dev_attr_pwm2_freq.dev_attr))
  1334. || (err = device_create_file(dev,
  1335. &sensor_dev_attr_pwm3_freq.dev_attr)))
  1336. goto error;
  1337. if (data->type != w83627hf)
  1338. if ((err = device_create_file(dev,
  1339. &sensor_dev_attr_pwm1_enable.dev_attr))
  1340. || (err = device_create_file(dev,
  1341. &sensor_dev_attr_pwm2_enable.dev_attr)))
  1342. goto error;
  1343. if (data->type == w83627thf || data->type == w83637hf
  1344. || data->type == w83687thf) {
  1345. err = device_create_file(dev,
  1346. &sensor_dev_attr_pwm3_enable.dev_attr);
  1347. if (err)
  1348. goto error;
  1349. }
  1350. data->hwmon_dev = hwmon_device_register(dev);
  1351. if (IS_ERR(data->hwmon_dev)) {
  1352. err = PTR_ERR(data->hwmon_dev);
  1353. goto error;
  1354. }
  1355. return 0;
  1356. error:
  1357. sysfs_remove_group(&dev->kobj, &w83627hf_group);
  1358. sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
  1359. return err;
  1360. }
  1361. static int w83627hf_remove(struct platform_device *pdev)
  1362. {
  1363. struct w83627hf_data *data = platform_get_drvdata(pdev);
  1364. hwmon_device_unregister(data->hwmon_dev);
  1365. sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
  1366. sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
  1367. return 0;
  1368. }
  1369. /* Registers 0x50-0x5f are banked */
  1370. static inline void w83627hf_set_bank(struct w83627hf_data *data, u16 reg)
  1371. {
  1372. if ((reg & 0x00f0) == 0x50) {
  1373. outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
  1374. outb_p(reg >> 8, data->addr + W83781D_DATA_REG_OFFSET);
  1375. }
  1376. }
  1377. /* Not strictly necessary, but play it safe for now */
  1378. static inline void w83627hf_reset_bank(struct w83627hf_data *data, u16 reg)
  1379. {
  1380. if (reg & 0xff00) {
  1381. outb_p(W83781D_REG_BANK, data->addr + W83781D_ADDR_REG_OFFSET);
  1382. outb_p(0, data->addr + W83781D_DATA_REG_OFFSET);
  1383. }
  1384. }
  1385. static int w83627hf_read_value(struct w83627hf_data *data, u16 reg)
  1386. {
  1387. int res, word_sized;
  1388. mutex_lock(&data->lock);
  1389. word_sized = (((reg & 0xff00) == 0x100)
  1390. || ((reg & 0xff00) == 0x200))
  1391. && (((reg & 0x00ff) == 0x50)
  1392. || ((reg & 0x00ff) == 0x53)
  1393. || ((reg & 0x00ff) == 0x55));
  1394. w83627hf_set_bank(data, reg);
  1395. outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
  1396. res = inb_p(data->addr + W83781D_DATA_REG_OFFSET);
  1397. if (word_sized) {
  1398. outb_p((reg & 0xff) + 1,
  1399. data->addr + W83781D_ADDR_REG_OFFSET);
  1400. res =
  1401. (res << 8) + inb_p(data->addr +
  1402. W83781D_DATA_REG_OFFSET);
  1403. }
  1404. w83627hf_reset_bank(data, reg);
  1405. mutex_unlock(&data->lock);
  1406. return res;
  1407. }
  1408. static int w83627thf_read_gpio5(struct platform_device *pdev)
  1409. {
  1410. struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  1411. int res = 0xff, sel;
  1412. superio_enter(sio_data);
  1413. superio_select(sio_data, W83627HF_LD_GPIO5);
  1414. /* Make sure these GPIO pins are enabled */
  1415. if (!(superio_inb(sio_data, W83627THF_GPIO5_EN) & (1<<3))) {
  1416. dev_dbg(&pdev->dev, "GPIO5 disabled, no VID function\n");
  1417. goto exit;
  1418. }
  1419. /*
  1420. * Make sure the pins are configured for input
  1421. * There must be at least five (VRM 9), and possibly 6 (VRM 10)
  1422. */
  1423. sel = superio_inb(sio_data, W83627THF_GPIO5_IOSR) & 0x3f;
  1424. if ((sel & 0x1f) != 0x1f) {
  1425. dev_dbg(&pdev->dev, "GPIO5 not configured for VID "
  1426. "function\n");
  1427. goto exit;
  1428. }
  1429. dev_info(&pdev->dev, "Reading VID from GPIO5\n");
  1430. res = superio_inb(sio_data, W83627THF_GPIO5_DR) & sel;
  1431. exit:
  1432. superio_exit(sio_data);
  1433. return res;
  1434. }
  1435. static int w83687thf_read_vid(struct platform_device *pdev)
  1436. {
  1437. struct w83627hf_sio_data *sio_data = dev_get_platdata(&pdev->dev);
  1438. int res = 0xff;
  1439. superio_enter(sio_data);
  1440. superio_select(sio_data, W83627HF_LD_HWM);
  1441. /* Make sure these GPIO pins are enabled */
  1442. if (!(superio_inb(sio_data, W83687THF_VID_EN) & (1 << 2))) {
  1443. dev_dbg(&pdev->dev, "VID disabled, no VID function\n");
  1444. goto exit;
  1445. }
  1446. /* Make sure the pins are configured for input */
  1447. if (!(superio_inb(sio_data, W83687THF_VID_CFG) & (1 << 4))) {
  1448. dev_dbg(&pdev->dev, "VID configured as output, "
  1449. "no VID function\n");
  1450. goto exit;
  1451. }
  1452. res = superio_inb(sio_data, W83687THF_VID_DATA) & 0x3f;
  1453. exit:
  1454. superio_exit(sio_data);
  1455. return res;
  1456. }
  1457. static int w83627hf_write_value(struct w83627hf_data *data, u16 reg, u16 value)
  1458. {
  1459. int word_sized;
  1460. mutex_lock(&data->lock);
  1461. word_sized = (((reg & 0xff00) == 0x100)
  1462. || ((reg & 0xff00) == 0x200))
  1463. && (((reg & 0x00ff) == 0x53)
  1464. || ((reg & 0x00ff) == 0x55));
  1465. w83627hf_set_bank(data, reg);
  1466. outb_p(reg & 0xff, data->addr + W83781D_ADDR_REG_OFFSET);
  1467. if (word_sized) {
  1468. outb_p(value >> 8,
  1469. data->addr + W83781D_DATA_REG_OFFSET);
  1470. outb_p((reg & 0xff) + 1,
  1471. data->addr + W83781D_ADDR_REG_OFFSET);
  1472. }
  1473. outb_p(value & 0xff,
  1474. data->addr + W83781D_DATA_REG_OFFSET);
  1475. w83627hf_reset_bank(data, reg);
  1476. mutex_unlock(&data->lock);
  1477. return 0;
  1478. }
  1479. static void w83627hf_init_device(struct platform_device *pdev)
  1480. {
  1481. struct w83627hf_data *data = platform_get_drvdata(pdev);
  1482. int i;
  1483. enum chips type = data->type;
  1484. u8 tmp;
  1485. /* Minimize conflicts with other winbond i2c-only clients... */
  1486. /* disable i2c subclients... how to disable main i2c client?? */
  1487. /* force i2c address to relatively uncommon address */
  1488. if (type == w83627hf) {
  1489. w83627hf_write_value(data, W83781D_REG_I2C_SUBADDR, 0x89);
  1490. w83627hf_write_value(data, W83781D_REG_I2C_ADDR, force_i2c);
  1491. }
  1492. /* Read VID only once */
  1493. if (type == w83627hf || type == w83637hf) {
  1494. int lo = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
  1495. int hi = w83627hf_read_value(data, W83781D_REG_CHIPID);
  1496. data->vid = (lo & 0x0f) | ((hi & 0x01) << 4);
  1497. } else if (type == w83627thf) {
  1498. data->vid = w83627thf_read_gpio5(pdev);
  1499. } else if (type == w83687thf) {
  1500. data->vid = w83687thf_read_vid(pdev);
  1501. }
  1502. /* Read VRM & OVT Config only once */
  1503. if (type == w83627thf || type == w83637hf || type == w83687thf) {
  1504. data->vrm_ovt =
  1505. w83627hf_read_value(data, W83627THF_REG_VRM_OVT_CFG);
  1506. }
  1507. tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
  1508. for (i = 1; i <= 3; i++) {
  1509. if (!(tmp & BIT_SCFG1[i - 1])) {
  1510. data->sens[i - 1] = 4;
  1511. } else {
  1512. if (w83627hf_read_value
  1513. (data,
  1514. W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
  1515. data->sens[i - 1] = 1;
  1516. else
  1517. data->sens[i - 1] = 2;
  1518. }
  1519. if ((type == w83697hf) && (i == 2))
  1520. break;
  1521. }
  1522. if(init) {
  1523. /* Enable temp2 */
  1524. tmp = w83627hf_read_value(data, W83627HF_REG_TEMP2_CONFIG);
  1525. if (tmp & 0x01) {
  1526. dev_warn(&pdev->dev, "Enabling temp2, readings "
  1527. "might not make sense\n");
  1528. w83627hf_write_value(data, W83627HF_REG_TEMP2_CONFIG,
  1529. tmp & 0xfe);
  1530. }
  1531. /* Enable temp3 */
  1532. if (type != w83697hf) {
  1533. tmp = w83627hf_read_value(data,
  1534. W83627HF_REG_TEMP3_CONFIG);
  1535. if (tmp & 0x01) {
  1536. dev_warn(&pdev->dev, "Enabling temp3, "
  1537. "readings might not make sense\n");
  1538. w83627hf_write_value(data,
  1539. W83627HF_REG_TEMP3_CONFIG, tmp & 0xfe);
  1540. }
  1541. }
  1542. }
  1543. /* Start monitoring */
  1544. w83627hf_write_value(data, W83781D_REG_CONFIG,
  1545. (w83627hf_read_value(data,
  1546. W83781D_REG_CONFIG) & 0xf7)
  1547. | 0x01);
  1548. /* Enable VBAT monitoring if needed */
  1549. tmp = w83627hf_read_value(data, W83781D_REG_VBAT);
  1550. if (!(tmp & 0x01))
  1551. w83627hf_write_value(data, W83781D_REG_VBAT, tmp | 0x01);
  1552. }
  1553. static void w83627hf_update_fan_div(struct w83627hf_data *data)
  1554. {
  1555. int reg;
  1556. reg = w83627hf_read_value(data, W83781D_REG_VID_FANDIV);
  1557. data->fan_div[0] = (reg >> 4) & 0x03;
  1558. data->fan_div[1] = (reg >> 6) & 0x03;
  1559. if (data->type != w83697hf) {
  1560. data->fan_div[2] = (w83627hf_read_value(data,
  1561. W83781D_REG_PIN) >> 6) & 0x03;
  1562. }
  1563. reg = w83627hf_read_value(data, W83781D_REG_VBAT);
  1564. data->fan_div[0] |= (reg >> 3) & 0x04;
  1565. data->fan_div[1] |= (reg >> 4) & 0x04;
  1566. if (data->type != w83697hf)
  1567. data->fan_div[2] |= (reg >> 5) & 0x04;
  1568. }
  1569. static struct w83627hf_data *w83627hf_update_device(struct device *dev)
  1570. {
  1571. struct w83627hf_data *data = dev_get_drvdata(dev);
  1572. int i, num_temps = (data->type == w83697hf) ? 2 : 3;
  1573. int num_pwms = (data->type == w83697hf) ? 2 : 3;
  1574. mutex_lock(&data->update_lock);
  1575. if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
  1576. || !data->valid) {
  1577. for (i = 0; i <= 8; i++) {
  1578. /* skip missing sensors */
  1579. if (((data->type == w83697hf) && (i == 1)) ||
  1580. ((data->type != w83627hf && data->type != w83697hf)
  1581. && (i == 5 || i == 6)))
  1582. continue;
  1583. data->in[i] =
  1584. w83627hf_read_value(data, W83781D_REG_IN(i));
  1585. data->in_min[i] =
  1586. w83627hf_read_value(data,
  1587. W83781D_REG_IN_MIN(i));
  1588. data->in_max[i] =
  1589. w83627hf_read_value(data,
  1590. W83781D_REG_IN_MAX(i));
  1591. }
  1592. for (i = 0; i <= 2; i++) {
  1593. data->fan[i] =
  1594. w83627hf_read_value(data, W83627HF_REG_FAN(i));
  1595. data->fan_min[i] =
  1596. w83627hf_read_value(data,
  1597. W83627HF_REG_FAN_MIN(i));
  1598. }
  1599. for (i = 0; i <= 2; i++) {
  1600. u8 tmp = w83627hf_read_value(data,
  1601. W836X7HF_REG_PWM(data->type, i));
  1602. /* bits 0-3 are reserved in 627THF */
  1603. if (data->type == w83627thf)
  1604. tmp &= 0xf0;
  1605. data->pwm[i] = tmp;
  1606. if (i == 1 &&
  1607. (data->type == w83627hf || data->type == w83697hf))
  1608. break;
  1609. }
  1610. if (data->type == w83627hf) {
  1611. u8 tmp = w83627hf_read_value(data,
  1612. W83627HF_REG_PWM_FREQ);
  1613. data->pwm_freq[0] = tmp & 0x07;
  1614. data->pwm_freq[1] = (tmp >> 4) & 0x07;
  1615. } else if (data->type != w83627thf) {
  1616. for (i = 1; i <= 3; i++) {
  1617. data->pwm_freq[i - 1] =
  1618. w83627hf_read_value(data,
  1619. W83637HF_REG_PWM_FREQ[i - 1]);
  1620. if (i == 2 && (data->type == w83697hf))
  1621. break;
  1622. }
  1623. }
  1624. if (data->type != w83627hf) {
  1625. for (i = 0; i < num_pwms; i++) {
  1626. u8 tmp = w83627hf_read_value(data,
  1627. W83627THF_REG_PWM_ENABLE[i]);
  1628. data->pwm_enable[i] =
  1629. ((tmp >> W83627THF_PWM_ENABLE_SHIFT[i])
  1630. & 0x03) + 1;
  1631. }
  1632. }
  1633. for (i = 0; i < num_temps; i++) {
  1634. data->temp[i] = w83627hf_read_value(
  1635. data, w83627hf_reg_temp[i]);
  1636. data->temp_max[i] = w83627hf_read_value(
  1637. data, w83627hf_reg_temp_over[i]);
  1638. data->temp_max_hyst[i] = w83627hf_read_value(
  1639. data, w83627hf_reg_temp_hyst[i]);
  1640. }
  1641. w83627hf_update_fan_div(data);
  1642. data->alarms =
  1643. w83627hf_read_value(data, W83781D_REG_ALARM1) |
  1644. (w83627hf_read_value(data, W83781D_REG_ALARM2) << 8) |
  1645. (w83627hf_read_value(data, W83781D_REG_ALARM3) << 16);
  1646. i = w83627hf_read_value(data, W83781D_REG_BEEP_INTS2);
  1647. data->beep_mask = (i << 8) |
  1648. w83627hf_read_value(data, W83781D_REG_BEEP_INTS1) |
  1649. w83627hf_read_value(data, W83781D_REG_BEEP_INTS3) << 16;
  1650. data->last_updated = jiffies;
  1651. data->valid = 1;
  1652. }
  1653. mutex_unlock(&data->update_lock);
  1654. return data;
  1655. }
  1656. static int __init w83627hf_device_add(unsigned short address,
  1657. const struct w83627hf_sio_data *sio_data)
  1658. {
  1659. struct resource res = {
  1660. .start = address + WINB_REGION_OFFSET,
  1661. .end = address + WINB_REGION_OFFSET + WINB_REGION_SIZE - 1,
  1662. .name = DRVNAME,
  1663. .flags = IORESOURCE_IO,
  1664. };
  1665. int err;
  1666. err = acpi_check_resource_conflict(&res);
  1667. if (err)
  1668. goto exit;
  1669. pdev = platform_device_alloc(DRVNAME, address);
  1670. if (!pdev) {
  1671. err = -ENOMEM;
  1672. pr_err("Device allocation failed\n");
  1673. goto exit;
  1674. }
  1675. err = platform_device_add_resources(pdev, &res, 1);
  1676. if (err) {
  1677. pr_err("Device resource addition failed (%d)\n", err);
  1678. goto exit_device_put;
  1679. }
  1680. err = platform_device_add_data(pdev, sio_data,
  1681. sizeof(struct w83627hf_sio_data));
  1682. if (err) {
  1683. pr_err("Platform data allocation failed\n");
  1684. goto exit_device_put;
  1685. }
  1686. err = platform_device_add(pdev);
  1687. if (err) {
  1688. pr_err("Device addition failed (%d)\n", err);
  1689. goto exit_device_put;
  1690. }
  1691. return 0;
  1692. exit_device_put:
  1693. platform_device_put(pdev);
  1694. exit:
  1695. return err;
  1696. }
  1697. static int __init sensors_w83627hf_init(void)
  1698. {
  1699. int err;
  1700. unsigned short address;
  1701. struct w83627hf_sio_data sio_data;
  1702. if (w83627hf_find(0x2e, &address, &sio_data)
  1703. && w83627hf_find(0x4e, &address, &sio_data))
  1704. return -ENODEV;
  1705. err = platform_driver_register(&w83627hf_driver);
  1706. if (err)
  1707. goto exit;
  1708. /* Sets global pdev as a side effect */
  1709. err = w83627hf_device_add(address, &sio_data);
  1710. if (err)
  1711. goto exit_driver;
  1712. return 0;
  1713. exit_driver:
  1714. platform_driver_unregister(&w83627hf_driver);
  1715. exit:
  1716. return err;
  1717. }
  1718. static void __exit sensors_w83627hf_exit(void)
  1719. {
  1720. platform_device_unregister(pdev);
  1721. platform_driver_unregister(&w83627hf_driver);
  1722. }
  1723. MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
  1724. "Philip Edelbrock <phil@netroedge.com>, "
  1725. "and Mark Studebaker <mdsxyz123@yahoo.com>");
  1726. MODULE_DESCRIPTION("W83627HF driver");
  1727. MODULE_LICENSE("GPL");
  1728. module_init(sensors_w83627hf_init);
  1729. module_exit(sensors_w83627hf_exit);