ad7791.c 11 KB

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  1. /*
  2. * AD7787/AD7788/AD7789/AD7790/AD7791 SPI ADC driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. * Author: Lars-Peter Clausen <lars@metafoo.de>
  6. *
  7. * Licensed under the GPL-2.
  8. */
  9. #include <linux/interrupt.h>
  10. #include <linux/device.h>
  11. #include <linux/kernel.h>
  12. #include <linux/slab.h>
  13. #include <linux/sysfs.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/err.h>
  17. #include <linux/sched.h>
  18. #include <linux/delay.h>
  19. #include <linux/module.h>
  20. #include <linux/iio/iio.h>
  21. #include <linux/iio/sysfs.h>
  22. #include <linux/iio/buffer.h>
  23. #include <linux/iio/trigger.h>
  24. #include <linux/iio/trigger_consumer.h>
  25. #include <linux/iio/triggered_buffer.h>
  26. #include <linux/iio/adc/ad_sigma_delta.h>
  27. #include <linux/platform_data/ad7791.h>
  28. #define AD7791_REG_COMM 0x0 /* For writes */
  29. #define AD7791_REG_STATUS 0x0 /* For reads */
  30. #define AD7791_REG_MODE 0x1
  31. #define AD7791_REG_FILTER 0x2
  32. #define AD7791_REG_DATA 0x3
  33. #define AD7791_MODE_CONTINUOUS 0x00
  34. #define AD7791_MODE_SINGLE 0x02
  35. #define AD7791_MODE_POWERDOWN 0x03
  36. #define AD7791_CH_AIN1P_AIN1N 0x00
  37. #define AD7791_CH_AIN2 0x01
  38. #define AD7791_CH_AIN1N_AIN1N 0x02
  39. #define AD7791_CH_AVDD_MONITOR 0x03
  40. #define AD7791_FILTER_CLK_DIV_1 (0x0 << 4)
  41. #define AD7791_FILTER_CLK_DIV_2 (0x1 << 4)
  42. #define AD7791_FILTER_CLK_DIV_4 (0x2 << 4)
  43. #define AD7791_FILTER_CLK_DIV_8 (0x3 << 4)
  44. #define AD7791_FILTER_CLK_MASK (0x3 << 4)
  45. #define AD7791_FILTER_RATE_120 0x0
  46. #define AD7791_FILTER_RATE_100 0x1
  47. #define AD7791_FILTER_RATE_33_3 0x2
  48. #define AD7791_FILTER_RATE_20 0x3
  49. #define AD7791_FILTER_RATE_16_6 0x4
  50. #define AD7791_FILTER_RATE_16_7 0x5
  51. #define AD7791_FILTER_RATE_13_3 0x6
  52. #define AD7791_FILTER_RATE_9_5 0x7
  53. #define AD7791_FILTER_RATE_MASK 0x7
  54. #define AD7791_MODE_BUFFER BIT(1)
  55. #define AD7791_MODE_UNIPOLAR BIT(2)
  56. #define AD7791_MODE_BURNOUT BIT(3)
  57. #define AD7791_MODE_SEL_MASK (0x3 << 6)
  58. #define AD7791_MODE_SEL(x) ((x) << 6)
  59. #define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \
  60. const struct iio_chan_spec name[] = { \
  61. AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
  62. (bits), (storagebits), 0), \
  63. AD_SD_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \
  64. AD_SD_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \
  65. (bits), (storagebits), 0), \
  66. AD_SD_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR, \
  67. (bits), (storagebits), 0), \
  68. IIO_CHAN_SOFT_TIMESTAMP(4), \
  69. }
  70. #define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \
  71. const struct iio_chan_spec name[] = { \
  72. AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
  73. (bits), (storagebits), 0), \
  74. AD_SD_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \
  75. (bits), (storagebits), 0), \
  76. AD_SD_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \
  77. (bits), (storagebits), 0), \
  78. IIO_CHAN_SOFT_TIMESTAMP(3), \
  79. }
  80. static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32);
  81. static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16);
  82. static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32);
  83. enum {
  84. AD7787,
  85. AD7788,
  86. AD7789,
  87. AD7790,
  88. AD7791,
  89. };
  90. enum ad7791_chip_info_flags {
  91. AD7791_FLAG_HAS_FILTER = (1 << 0),
  92. AD7791_FLAG_HAS_BUFFER = (1 << 1),
  93. AD7791_FLAG_HAS_UNIPOLAR = (1 << 2),
  94. AD7791_FLAG_HAS_BURNOUT = (1 << 3),
  95. };
  96. struct ad7791_chip_info {
  97. const struct iio_chan_spec *channels;
  98. unsigned int num_channels;
  99. enum ad7791_chip_info_flags flags;
  100. };
  101. static const struct ad7791_chip_info ad7791_chip_infos[] = {
  102. [AD7787] = {
  103. .channels = ad7787_channels,
  104. .num_channels = ARRAY_SIZE(ad7787_channels),
  105. .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
  106. AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
  107. },
  108. [AD7788] = {
  109. .channels = ad7790_channels,
  110. .num_channels = ARRAY_SIZE(ad7790_channels),
  111. .flags = AD7791_FLAG_HAS_UNIPOLAR,
  112. },
  113. [AD7789] = {
  114. .channels = ad7791_channels,
  115. .num_channels = ARRAY_SIZE(ad7791_channels),
  116. .flags = AD7791_FLAG_HAS_UNIPOLAR,
  117. },
  118. [AD7790] = {
  119. .channels = ad7790_channels,
  120. .num_channels = ARRAY_SIZE(ad7790_channels),
  121. .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
  122. AD7791_FLAG_HAS_BURNOUT,
  123. },
  124. [AD7791] = {
  125. .channels = ad7791_channels,
  126. .num_channels = ARRAY_SIZE(ad7791_channels),
  127. .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
  128. AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
  129. },
  130. };
  131. struct ad7791_state {
  132. struct ad_sigma_delta sd;
  133. uint8_t mode;
  134. uint8_t filter;
  135. struct regulator *reg;
  136. const struct ad7791_chip_info *info;
  137. };
  138. static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd)
  139. {
  140. return container_of(sd, struct ad7791_state, sd);
  141. }
  142. static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
  143. {
  144. ad_sd_set_comm(sd, channel);
  145. return 0;
  146. }
  147. static int ad7791_set_mode(struct ad_sigma_delta *sd,
  148. enum ad_sigma_delta_mode mode)
  149. {
  150. struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd);
  151. switch (mode) {
  152. case AD_SD_MODE_CONTINUOUS:
  153. mode = AD7791_MODE_CONTINUOUS;
  154. break;
  155. case AD_SD_MODE_SINGLE:
  156. mode = AD7791_MODE_SINGLE;
  157. break;
  158. case AD_SD_MODE_IDLE:
  159. case AD_SD_MODE_POWERDOWN:
  160. mode = AD7791_MODE_POWERDOWN;
  161. break;
  162. }
  163. st->mode &= ~AD7791_MODE_SEL_MASK;
  164. st->mode |= AD7791_MODE_SEL(mode);
  165. return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode);
  166. }
  167. static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {
  168. .set_channel = ad7791_set_channel,
  169. .set_mode = ad7791_set_mode,
  170. .has_registers = true,
  171. .addr_shift = 4,
  172. .read_mask = BIT(3),
  173. };
  174. static int ad7791_read_raw(struct iio_dev *indio_dev,
  175. const struct iio_chan_spec *chan, int *val, int *val2, long info)
  176. {
  177. struct ad7791_state *st = iio_priv(indio_dev);
  178. bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR);
  179. switch (info) {
  180. case IIO_CHAN_INFO_RAW:
  181. return ad_sigma_delta_single_conversion(indio_dev, chan, val);
  182. case IIO_CHAN_INFO_OFFSET:
  183. /**
  184. * Unipolar: 0 to VREF
  185. * Bipolar -VREF to VREF
  186. **/
  187. if (unipolar)
  188. *val = 0;
  189. else
  190. *val = -(1 << (chan->scan_type.realbits - 1));
  191. return IIO_VAL_INT;
  192. case IIO_CHAN_INFO_SCALE:
  193. /* The monitor channel uses an internal reference. */
  194. if (chan->address == AD7791_CH_AVDD_MONITOR) {
  195. /*
  196. * The signal is attenuated by a factor of 5 and
  197. * compared against a 1.17V internal reference.
  198. */
  199. *val = 1170 * 5;
  200. } else {
  201. int voltage_uv;
  202. voltage_uv = regulator_get_voltage(st->reg);
  203. if (voltage_uv < 0)
  204. return voltage_uv;
  205. *val = voltage_uv / 1000;
  206. }
  207. if (unipolar)
  208. *val2 = chan->scan_type.realbits;
  209. else
  210. *val2 = chan->scan_type.realbits - 1;
  211. return IIO_VAL_FRACTIONAL_LOG2;
  212. }
  213. return -EINVAL;
  214. }
  215. static const char * const ad7791_sample_freq_avail[] = {
  216. [AD7791_FILTER_RATE_120] = "120",
  217. [AD7791_FILTER_RATE_100] = "100",
  218. [AD7791_FILTER_RATE_33_3] = "33.3",
  219. [AD7791_FILTER_RATE_20] = "20",
  220. [AD7791_FILTER_RATE_16_6] = "16.6",
  221. [AD7791_FILTER_RATE_16_7] = "16.7",
  222. [AD7791_FILTER_RATE_13_3] = "13.3",
  223. [AD7791_FILTER_RATE_9_5] = "9.5",
  224. };
  225. static ssize_t ad7791_read_frequency(struct device *dev,
  226. struct device_attribute *attr, char *buf)
  227. {
  228. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  229. struct ad7791_state *st = iio_priv(indio_dev);
  230. unsigned int rate = st->filter & AD7791_FILTER_RATE_MASK;
  231. return sprintf(buf, "%s\n", ad7791_sample_freq_avail[rate]);
  232. }
  233. static ssize_t ad7791_write_frequency(struct device *dev,
  234. struct device_attribute *attr, const char *buf, size_t len)
  235. {
  236. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  237. struct ad7791_state *st = iio_priv(indio_dev);
  238. int i, ret;
  239. mutex_lock(&indio_dev->mlock);
  240. if (iio_buffer_enabled(indio_dev)) {
  241. mutex_unlock(&indio_dev->mlock);
  242. return -EBUSY;
  243. }
  244. mutex_unlock(&indio_dev->mlock);
  245. ret = -EINVAL;
  246. for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) {
  247. if (sysfs_streq(ad7791_sample_freq_avail[i], buf)) {
  248. mutex_lock(&indio_dev->mlock);
  249. st->filter &= ~AD7791_FILTER_RATE_MASK;
  250. st->filter |= i;
  251. ad_sd_write_reg(&st->sd, AD7791_REG_FILTER,
  252. sizeof(st->filter), st->filter);
  253. mutex_unlock(&indio_dev->mlock);
  254. ret = 0;
  255. break;
  256. }
  257. }
  258. return ret ? ret : len;
  259. }
  260. static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
  261. ad7791_read_frequency,
  262. ad7791_write_frequency);
  263. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5");
  264. static struct attribute *ad7791_attributes[] = {
  265. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  266. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  267. NULL
  268. };
  269. static const struct attribute_group ad7791_attribute_group = {
  270. .attrs = ad7791_attributes,
  271. };
  272. static const struct iio_info ad7791_info = {
  273. .read_raw = &ad7791_read_raw,
  274. .attrs = &ad7791_attribute_group,
  275. .validate_trigger = ad_sd_validate_trigger,
  276. .driver_module = THIS_MODULE,
  277. };
  278. static const struct iio_info ad7791_no_filter_info = {
  279. .read_raw = &ad7791_read_raw,
  280. .validate_trigger = ad_sd_validate_trigger,
  281. .driver_module = THIS_MODULE,
  282. };
  283. static int ad7791_setup(struct ad7791_state *st,
  284. struct ad7791_platform_data *pdata)
  285. {
  286. /* Set to poweron-reset default values */
  287. st->mode = AD7791_MODE_BUFFER;
  288. st->filter = AD7791_FILTER_RATE_16_6;
  289. if (!pdata)
  290. return 0;
  291. if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered)
  292. st->mode &= ~AD7791_MODE_BUFFER;
  293. if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) &&
  294. pdata->burnout_current)
  295. st->mode |= AD7791_MODE_BURNOUT;
  296. if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar)
  297. st->mode |= AD7791_MODE_UNIPOLAR;
  298. return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode),
  299. st->mode);
  300. }
  301. static int ad7791_probe(struct spi_device *spi)
  302. {
  303. struct ad7791_platform_data *pdata = spi->dev.platform_data;
  304. struct iio_dev *indio_dev;
  305. struct ad7791_state *st;
  306. int ret;
  307. if (!spi->irq) {
  308. dev_err(&spi->dev, "Missing IRQ.\n");
  309. return -ENXIO;
  310. }
  311. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  312. if (!indio_dev)
  313. return -ENOMEM;
  314. st = iio_priv(indio_dev);
  315. st->reg = devm_regulator_get(&spi->dev, "refin");
  316. if (IS_ERR(st->reg))
  317. return PTR_ERR(st->reg);
  318. ret = regulator_enable(st->reg);
  319. if (ret)
  320. return ret;
  321. st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data];
  322. ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info);
  323. spi_set_drvdata(spi, indio_dev);
  324. indio_dev->dev.parent = &spi->dev;
  325. indio_dev->name = spi_get_device_id(spi)->name;
  326. indio_dev->modes = INDIO_DIRECT_MODE;
  327. indio_dev->channels = st->info->channels;
  328. indio_dev->num_channels = st->info->num_channels;
  329. if (st->info->flags & AD7791_FLAG_HAS_FILTER)
  330. indio_dev->info = &ad7791_info;
  331. else
  332. indio_dev->info = &ad7791_no_filter_info;
  333. ret = ad_sd_setup_buffer_and_trigger(indio_dev);
  334. if (ret)
  335. goto error_disable_reg;
  336. ret = ad7791_setup(st, pdata);
  337. if (ret)
  338. goto error_remove_trigger;
  339. ret = iio_device_register(indio_dev);
  340. if (ret)
  341. goto error_remove_trigger;
  342. return 0;
  343. error_remove_trigger:
  344. ad_sd_cleanup_buffer_and_trigger(indio_dev);
  345. error_disable_reg:
  346. regulator_disable(st->reg);
  347. return ret;
  348. }
  349. static int ad7791_remove(struct spi_device *spi)
  350. {
  351. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  352. struct ad7791_state *st = iio_priv(indio_dev);
  353. iio_device_unregister(indio_dev);
  354. ad_sd_cleanup_buffer_and_trigger(indio_dev);
  355. regulator_disable(st->reg);
  356. return 0;
  357. }
  358. static const struct spi_device_id ad7791_spi_ids[] = {
  359. { "ad7787", AD7787 },
  360. { "ad7788", AD7788 },
  361. { "ad7789", AD7789 },
  362. { "ad7790", AD7790 },
  363. { "ad7791", AD7791 },
  364. {}
  365. };
  366. MODULE_DEVICE_TABLE(spi, ad7791_spi_ids);
  367. static struct spi_driver ad7791_driver = {
  368. .driver = {
  369. .name = "ad7791",
  370. },
  371. .probe = ad7791_probe,
  372. .remove = ad7791_remove,
  373. .id_table = ad7791_spi_ids,
  374. };
  375. module_spi_driver(ad7791_driver);
  376. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  377. MODULE_DESCRIPTION("Analog Device AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver");
  378. MODULE_LICENSE("GPL v2");