ad7923.c 9.1 KB

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  1. /*
  2. * AD7904/AD7914/AD7923/AD7924 SPI ADC driver
  3. *
  4. * Copyright 2011 Analog Devices Inc (from AD7923 Driver)
  5. * Copyright 2012 CS Systemes d'Information
  6. *
  7. * Licensed under the GPL-2.
  8. */
  9. #include <linux/device.h>
  10. #include <linux/kernel.h>
  11. #include <linux/slab.h>
  12. #include <linux/sysfs.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/err.h>
  16. #include <linux/delay.h>
  17. #include <linux/module.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #include <linux/iio/buffer.h>
  22. #include <linux/iio/trigger_consumer.h>
  23. #include <linux/iio/triggered_buffer.h>
  24. #define AD7923_WRITE_CR (1 << 11) /* write control register */
  25. #define AD7923_RANGE (1 << 1) /* range to REFin */
  26. #define AD7923_CODING (1 << 0) /* coding is straight binary */
  27. #define AD7923_PM_MODE_AS (1) /* auto shutdown */
  28. #define AD7923_PM_MODE_FS (2) /* full shutdown */
  29. #define AD7923_PM_MODE_OPS (3) /* normal operation */
  30. #define AD7923_CHANNEL_0 (0) /* analog input 0 */
  31. #define AD7923_CHANNEL_1 (1) /* analog input 1 */
  32. #define AD7923_CHANNEL_2 (2) /* analog input 2 */
  33. #define AD7923_CHANNEL_3 (3) /* analog input 3 */
  34. #define AD7923_SEQUENCE_OFF (0) /* no sequence fonction */
  35. #define AD7923_SEQUENCE_PROTECT (2) /* no interrupt write cycle */
  36. #define AD7923_SEQUENCE_ON (3) /* continuous sequence */
  37. #define AD7923_MAX_CHAN 4
  38. #define AD7923_PM_MODE_WRITE(mode) (mode << 4) /* write mode */
  39. #define AD7923_CHANNEL_WRITE(channel) (channel << 6) /* write channel */
  40. #define AD7923_SEQUENCE_WRITE(sequence) (((sequence & 1) << 3) \
  41. + ((sequence & 2) << 9))
  42. /* write sequence fonction */
  43. /* left shift for CR : bit 11 transmit in first */
  44. #define AD7923_SHIFT_REGISTER 4
  45. /* val = value, dec = left shift, bits = number of bits of the mask */
  46. #define EXTRACT(val, dec, bits) ((val >> dec) & ((1 << bits) - 1))
  47. struct ad7923_state {
  48. struct spi_device *spi;
  49. struct spi_transfer ring_xfer[5];
  50. struct spi_transfer scan_single_xfer[2];
  51. struct spi_message ring_msg;
  52. struct spi_message scan_single_msg;
  53. struct regulator *reg;
  54. unsigned int settings;
  55. /*
  56. * DMA (thus cache coherency maintenance) requires the
  57. * transfer buffers to live in their own cache lines.
  58. */
  59. __be16 rx_buf[4] ____cacheline_aligned;
  60. __be16 tx_buf[4];
  61. };
  62. struct ad7923_chip_info {
  63. const struct iio_chan_spec *channels;
  64. unsigned int num_channels;
  65. };
  66. enum ad7923_id {
  67. AD7904,
  68. AD7914,
  69. AD7924,
  70. };
  71. #define AD7923_V_CHAN(index, bits) \
  72. { \
  73. .type = IIO_VOLTAGE, \
  74. .indexed = 1, \
  75. .channel = index, \
  76. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  77. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  78. .address = index, \
  79. .scan_index = index, \
  80. .scan_type = { \
  81. .sign = 'u', \
  82. .realbits = (bits), \
  83. .storagebits = 16, \
  84. .endianness = IIO_BE, \
  85. }, \
  86. }
  87. #define DECLARE_AD7923_CHANNELS(name, bits) \
  88. const struct iio_chan_spec name ## _channels[] = { \
  89. AD7923_V_CHAN(0, bits), \
  90. AD7923_V_CHAN(1, bits), \
  91. AD7923_V_CHAN(2, bits), \
  92. AD7923_V_CHAN(3, bits), \
  93. IIO_CHAN_SOFT_TIMESTAMP(4), \
  94. }
  95. static DECLARE_AD7923_CHANNELS(ad7904, 8);
  96. static DECLARE_AD7923_CHANNELS(ad7914, 10);
  97. static DECLARE_AD7923_CHANNELS(ad7924, 12);
  98. static const struct ad7923_chip_info ad7923_chip_info[] = {
  99. [AD7904] = {
  100. .channels = ad7904_channels,
  101. .num_channels = ARRAY_SIZE(ad7904_channels),
  102. },
  103. [AD7914] = {
  104. .channels = ad7914_channels,
  105. .num_channels = ARRAY_SIZE(ad7914_channels),
  106. },
  107. [AD7924] = {
  108. .channels = ad7924_channels,
  109. .num_channels = ARRAY_SIZE(ad7924_channels),
  110. },
  111. };
  112. /**
  113. * ad7923_update_scan_mode() setup the spi transfer buffer for the new scan mask
  114. **/
  115. static int ad7923_update_scan_mode(struct iio_dev *indio_dev,
  116. const unsigned long *active_scan_mask)
  117. {
  118. struct ad7923_state *st = iio_priv(indio_dev);
  119. int i, cmd, len;
  120. len = 0;
  121. for_each_set_bit(i, active_scan_mask, AD7923_MAX_CHAN) {
  122. cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(i) |
  123. AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
  124. st->settings;
  125. cmd <<= AD7923_SHIFT_REGISTER;
  126. st->tx_buf[len++] = cpu_to_be16(cmd);
  127. }
  128. /* build spi ring message */
  129. st->ring_xfer[0].tx_buf = &st->tx_buf[0];
  130. st->ring_xfer[0].len = len;
  131. st->ring_xfer[0].cs_change = 1;
  132. spi_message_init(&st->ring_msg);
  133. spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
  134. for (i = 0; i < len; i++) {
  135. st->ring_xfer[i + 1].rx_buf = &st->rx_buf[i];
  136. st->ring_xfer[i + 1].len = 2;
  137. st->ring_xfer[i + 1].cs_change = 1;
  138. spi_message_add_tail(&st->ring_xfer[i + 1], &st->ring_msg);
  139. }
  140. /* make sure last transfer cs_change is not set */
  141. st->ring_xfer[i + 1].cs_change = 0;
  142. return 0;
  143. }
  144. /**
  145. * ad7923_trigger_handler() bh of trigger launched polling to ring buffer
  146. *
  147. * Currently there is no option in this driver to disable the saving of
  148. * timestamps within the ring.
  149. **/
  150. static irqreturn_t ad7923_trigger_handler(int irq, void *p)
  151. {
  152. struct iio_poll_func *pf = p;
  153. struct iio_dev *indio_dev = pf->indio_dev;
  154. struct ad7923_state *st = iio_priv(indio_dev);
  155. int b_sent;
  156. b_sent = spi_sync(st->spi, &st->ring_msg);
  157. if (b_sent)
  158. goto done;
  159. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  160. iio_get_time_ns());
  161. done:
  162. iio_trigger_notify_done(indio_dev->trig);
  163. return IRQ_HANDLED;
  164. }
  165. static int ad7923_scan_direct(struct ad7923_state *st, unsigned ch)
  166. {
  167. int ret, cmd;
  168. cmd = AD7923_WRITE_CR | AD7923_CHANNEL_WRITE(ch) |
  169. AD7923_SEQUENCE_WRITE(AD7923_SEQUENCE_OFF) |
  170. st->settings;
  171. cmd <<= AD7923_SHIFT_REGISTER;
  172. st->tx_buf[0] = cpu_to_be16(cmd);
  173. ret = spi_sync(st->spi, &st->scan_single_msg);
  174. if (ret)
  175. return ret;
  176. return be16_to_cpu(st->rx_buf[0]);
  177. }
  178. static int ad7923_get_range(struct ad7923_state *st)
  179. {
  180. int vref;
  181. vref = regulator_get_voltage(st->reg);
  182. if (vref < 0)
  183. return vref;
  184. vref /= 1000;
  185. if (!(st->settings & AD7923_RANGE))
  186. vref *= 2;
  187. return vref;
  188. }
  189. static int ad7923_read_raw(struct iio_dev *indio_dev,
  190. struct iio_chan_spec const *chan,
  191. int *val,
  192. int *val2,
  193. long m)
  194. {
  195. int ret;
  196. struct ad7923_state *st = iio_priv(indio_dev);
  197. switch (m) {
  198. case IIO_CHAN_INFO_RAW:
  199. mutex_lock(&indio_dev->mlock);
  200. if (iio_buffer_enabled(indio_dev))
  201. ret = -EBUSY;
  202. else
  203. ret = ad7923_scan_direct(st, chan->address);
  204. mutex_unlock(&indio_dev->mlock);
  205. if (ret < 0)
  206. return ret;
  207. if (chan->address == EXTRACT(ret, 12, 4))
  208. *val = EXTRACT(ret, 0, 12);
  209. else
  210. return -EIO;
  211. return IIO_VAL_INT;
  212. case IIO_CHAN_INFO_SCALE:
  213. ret = ad7923_get_range(st);
  214. if (ret < 0)
  215. return ret;
  216. *val = ret;
  217. *val2 = chan->scan_type.realbits;
  218. return IIO_VAL_FRACTIONAL_LOG2;
  219. }
  220. return -EINVAL;
  221. }
  222. static const struct iio_info ad7923_info = {
  223. .read_raw = &ad7923_read_raw,
  224. .update_scan_mode = ad7923_update_scan_mode,
  225. .driver_module = THIS_MODULE,
  226. };
  227. static int ad7923_probe(struct spi_device *spi)
  228. {
  229. struct ad7923_state *st;
  230. struct iio_dev *indio_dev;
  231. const struct ad7923_chip_info *info;
  232. int ret;
  233. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  234. if (indio_dev == NULL)
  235. return -ENOMEM;
  236. st = iio_priv(indio_dev);
  237. spi_set_drvdata(spi, indio_dev);
  238. st->spi = spi;
  239. st->settings = AD7923_CODING | AD7923_RANGE |
  240. AD7923_PM_MODE_WRITE(AD7923_PM_MODE_OPS);
  241. info = &ad7923_chip_info[spi_get_device_id(spi)->driver_data];
  242. indio_dev->name = spi_get_device_id(spi)->name;
  243. indio_dev->dev.parent = &spi->dev;
  244. indio_dev->modes = INDIO_DIRECT_MODE;
  245. indio_dev->channels = info->channels;
  246. indio_dev->num_channels = info->num_channels;
  247. indio_dev->info = &ad7923_info;
  248. /* Setup default message */
  249. st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
  250. st->scan_single_xfer[0].len = 2;
  251. st->scan_single_xfer[0].cs_change = 1;
  252. st->scan_single_xfer[1].rx_buf = &st->rx_buf[0];
  253. st->scan_single_xfer[1].len = 2;
  254. spi_message_init(&st->scan_single_msg);
  255. spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
  256. spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
  257. st->reg = devm_regulator_get(&spi->dev, "refin");
  258. if (IS_ERR(st->reg))
  259. return PTR_ERR(st->reg);
  260. ret = regulator_enable(st->reg);
  261. if (ret)
  262. return ret;
  263. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  264. &ad7923_trigger_handler, NULL);
  265. if (ret)
  266. goto error_disable_reg;
  267. ret = iio_device_register(indio_dev);
  268. if (ret)
  269. goto error_cleanup_ring;
  270. return 0;
  271. error_cleanup_ring:
  272. iio_triggered_buffer_cleanup(indio_dev);
  273. error_disable_reg:
  274. regulator_disable(st->reg);
  275. return ret;
  276. }
  277. static int ad7923_remove(struct spi_device *spi)
  278. {
  279. struct iio_dev *indio_dev = spi_get_drvdata(spi);
  280. struct ad7923_state *st = iio_priv(indio_dev);
  281. iio_device_unregister(indio_dev);
  282. iio_triggered_buffer_cleanup(indio_dev);
  283. regulator_disable(st->reg);
  284. return 0;
  285. }
  286. static const struct spi_device_id ad7923_id[] = {
  287. {"ad7904", AD7904},
  288. {"ad7914", AD7914},
  289. {"ad7923", AD7924},
  290. {"ad7924", AD7924},
  291. {}
  292. };
  293. MODULE_DEVICE_TABLE(spi, ad7923_id);
  294. static struct spi_driver ad7923_driver = {
  295. .driver = {
  296. .name = "ad7923",
  297. },
  298. .probe = ad7923_probe,
  299. .remove = ad7923_remove,
  300. .id_table = ad7923_id,
  301. };
  302. module_spi_driver(ad7923_driver);
  303. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  304. MODULE_AUTHOR("Patrick Vasseur <patrick.vasseur@c-s.fr>");
  305. MODULE_DESCRIPTION("Analog Devices AD7904/AD7914/AD7923/AD7924 ADC");
  306. MODULE_LICENSE("GPL v2");