ad799x.c 21 KB

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  1. /*
  2. * iio/adc/ad799x.c
  3. * Copyright (C) 2010-2011 Michael Hennerich, Analog Devices Inc.
  4. *
  5. * based on iio/adc/max1363
  6. * Copyright (C) 2008-2010 Jonathan Cameron
  7. *
  8. * based on linux/drivers/i2c/chips/max123x
  9. * Copyright (C) 2002-2004 Stefan Eletzhofer
  10. *
  11. * based on linux/drivers/acron/char/pcf8583.c
  12. * Copyright (C) 2000 Russell King
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License version 2 as
  16. * published by the Free Software Foundation.
  17. *
  18. * ad799x.c
  19. *
  20. * Support for ad7991, ad7995, ad7999, ad7992, ad7993, ad7994, ad7997,
  21. * ad7998 and similar chips.
  22. *
  23. */
  24. #include <linux/interrupt.h>
  25. #include <linux/device.h>
  26. #include <linux/kernel.h>
  27. #include <linux/sysfs.h>
  28. #include <linux/i2c.h>
  29. #include <linux/regulator/consumer.h>
  30. #include <linux/slab.h>
  31. #include <linux/types.h>
  32. #include <linux/err.h>
  33. #include <linux/module.h>
  34. #include <linux/bitops.h>
  35. #include <linux/iio/iio.h>
  36. #include <linux/iio/sysfs.h>
  37. #include <linux/iio/events.h>
  38. #include <linux/iio/buffer.h>
  39. #include <linux/iio/trigger_consumer.h>
  40. #include <linux/iio/triggered_buffer.h>
  41. #define AD799X_CHANNEL_SHIFT 4
  42. /*
  43. * AD7991, AD7995 and AD7999 defines
  44. */
  45. #define AD7991_REF_SEL 0x08
  46. #define AD7991_FLTR 0x04
  47. #define AD7991_BIT_TRIAL_DELAY 0x02
  48. #define AD7991_SAMPLE_DELAY 0x01
  49. /*
  50. * AD7992, AD7993, AD7994, AD7997 and AD7998 defines
  51. */
  52. #define AD7998_FLTR BIT(3)
  53. #define AD7998_ALERT_EN BIT(2)
  54. #define AD7998_BUSY_ALERT BIT(1)
  55. #define AD7998_BUSY_ALERT_POL BIT(0)
  56. #define AD7998_CONV_RES_REG 0x0
  57. #define AD7998_ALERT_STAT_REG 0x1
  58. #define AD7998_CONF_REG 0x2
  59. #define AD7998_CYCLE_TMR_REG 0x3
  60. #define AD7998_DATALOW_REG(x) ((x) * 3 + 0x4)
  61. #define AD7998_DATAHIGH_REG(x) ((x) * 3 + 0x5)
  62. #define AD7998_HYST_REG(x) ((x) * 3 + 0x6)
  63. #define AD7998_CYC_MASK GENMASK(2, 0)
  64. #define AD7998_CYC_DIS 0x0
  65. #define AD7998_CYC_TCONF_32 0x1
  66. #define AD7998_CYC_TCONF_64 0x2
  67. #define AD7998_CYC_TCONF_128 0x3
  68. #define AD7998_CYC_TCONF_256 0x4
  69. #define AD7998_CYC_TCONF_512 0x5
  70. #define AD7998_CYC_TCONF_1024 0x6
  71. #define AD7998_CYC_TCONF_2048 0x7
  72. #define AD7998_ALERT_STAT_CLEAR 0xFF
  73. /*
  74. * AD7997 and AD7997 defines
  75. */
  76. #define AD7997_8_READ_SINGLE BIT(7)
  77. #define AD7997_8_READ_SEQUENCE (BIT(6) | BIT(5) | BIT(4))
  78. enum {
  79. ad7991,
  80. ad7995,
  81. ad7999,
  82. ad7992,
  83. ad7993,
  84. ad7994,
  85. ad7997,
  86. ad7998
  87. };
  88. /**
  89. * struct ad799x_chip_config - chip specific information
  90. * @channel: channel specification
  91. * @default_config: device default configuration
  92. * @info: pointer to iio_info struct
  93. */
  94. struct ad799x_chip_config {
  95. const struct iio_chan_spec channel[9];
  96. u16 default_config;
  97. const struct iio_info *info;
  98. };
  99. /**
  100. * struct ad799x_chip_info - chip specific information
  101. * @num_channels: number of channels
  102. * @noirq_config: device configuration w/o IRQ
  103. * @irq_config: device configuration w/IRQ
  104. */
  105. struct ad799x_chip_info {
  106. int num_channels;
  107. const struct ad799x_chip_config noirq_config;
  108. const struct ad799x_chip_config irq_config;
  109. };
  110. struct ad799x_state {
  111. struct i2c_client *client;
  112. const struct ad799x_chip_config *chip_config;
  113. struct regulator *reg;
  114. struct regulator *vref;
  115. unsigned id;
  116. u16 config;
  117. u8 *rx_buf;
  118. unsigned int transfer_size;
  119. };
  120. static int ad799x_write_config(struct ad799x_state *st, u16 val)
  121. {
  122. switch (st->id) {
  123. case ad7997:
  124. case ad7998:
  125. return i2c_smbus_write_word_swapped(st->client, AD7998_CONF_REG,
  126. val);
  127. case ad7992:
  128. case ad7993:
  129. case ad7994:
  130. return i2c_smbus_write_byte_data(st->client, AD7998_CONF_REG,
  131. val);
  132. default:
  133. /* Will be written when doing a conversion */
  134. st->config = val;
  135. return 0;
  136. }
  137. }
  138. static int ad799x_read_config(struct ad799x_state *st)
  139. {
  140. switch (st->id) {
  141. case ad7997:
  142. case ad7998:
  143. return i2c_smbus_read_word_swapped(st->client, AD7998_CONF_REG);
  144. case ad7992:
  145. case ad7993:
  146. case ad7994:
  147. return i2c_smbus_read_byte_data(st->client, AD7998_CONF_REG);
  148. default:
  149. /* No readback support */
  150. return st->config;
  151. }
  152. }
  153. /**
  154. * ad799x_trigger_handler() bh of trigger launched polling to ring buffer
  155. *
  156. * Currently there is no option in this driver to disable the saving of
  157. * timestamps within the ring.
  158. **/
  159. static irqreturn_t ad799x_trigger_handler(int irq, void *p)
  160. {
  161. struct iio_poll_func *pf = p;
  162. struct iio_dev *indio_dev = pf->indio_dev;
  163. struct ad799x_state *st = iio_priv(indio_dev);
  164. int b_sent;
  165. u8 cmd;
  166. switch (st->id) {
  167. case ad7991:
  168. case ad7995:
  169. case ad7999:
  170. cmd = st->config |
  171. (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT);
  172. break;
  173. case ad7992:
  174. case ad7993:
  175. case ad7994:
  176. cmd = (*indio_dev->active_scan_mask << AD799X_CHANNEL_SHIFT) |
  177. AD7998_CONV_RES_REG;
  178. break;
  179. case ad7997:
  180. case ad7998:
  181. cmd = AD7997_8_READ_SEQUENCE | AD7998_CONV_RES_REG;
  182. break;
  183. default:
  184. cmd = 0;
  185. }
  186. b_sent = i2c_smbus_read_i2c_block_data(st->client,
  187. cmd, st->transfer_size, st->rx_buf);
  188. if (b_sent < 0)
  189. goto out;
  190. iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
  191. iio_get_time_ns());
  192. out:
  193. iio_trigger_notify_done(indio_dev->trig);
  194. return IRQ_HANDLED;
  195. }
  196. static int ad799x_update_scan_mode(struct iio_dev *indio_dev,
  197. const unsigned long *scan_mask)
  198. {
  199. struct ad799x_state *st = iio_priv(indio_dev);
  200. kfree(st->rx_buf);
  201. st->rx_buf = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
  202. if (!st->rx_buf)
  203. return -ENOMEM;
  204. st->transfer_size = bitmap_weight(scan_mask, indio_dev->masklength) * 2;
  205. switch (st->id) {
  206. case ad7992:
  207. case ad7993:
  208. case ad7994:
  209. case ad7997:
  210. case ad7998:
  211. st->config &= ~(GENMASK(7, 0) << AD799X_CHANNEL_SHIFT);
  212. st->config |= (*scan_mask << AD799X_CHANNEL_SHIFT);
  213. return ad799x_write_config(st, st->config);
  214. default:
  215. return 0;
  216. }
  217. }
  218. static int ad799x_scan_direct(struct ad799x_state *st, unsigned ch)
  219. {
  220. u8 cmd;
  221. switch (st->id) {
  222. case ad7991:
  223. case ad7995:
  224. case ad7999:
  225. cmd = st->config | (BIT(ch) << AD799X_CHANNEL_SHIFT);
  226. break;
  227. case ad7992:
  228. case ad7993:
  229. case ad7994:
  230. cmd = BIT(ch) << AD799X_CHANNEL_SHIFT;
  231. break;
  232. case ad7997:
  233. case ad7998:
  234. cmd = (ch << AD799X_CHANNEL_SHIFT) | AD7997_8_READ_SINGLE;
  235. break;
  236. default:
  237. return -EINVAL;
  238. }
  239. return i2c_smbus_read_word_swapped(st->client, cmd);
  240. }
  241. static int ad799x_read_raw(struct iio_dev *indio_dev,
  242. struct iio_chan_spec const *chan,
  243. int *val,
  244. int *val2,
  245. long m)
  246. {
  247. int ret;
  248. struct ad799x_state *st = iio_priv(indio_dev);
  249. switch (m) {
  250. case IIO_CHAN_INFO_RAW:
  251. mutex_lock(&indio_dev->mlock);
  252. if (iio_buffer_enabled(indio_dev))
  253. ret = -EBUSY;
  254. else
  255. ret = ad799x_scan_direct(st, chan->scan_index);
  256. mutex_unlock(&indio_dev->mlock);
  257. if (ret < 0)
  258. return ret;
  259. *val = (ret >> chan->scan_type.shift) &
  260. GENMASK(chan->scan_type.realbits - 1, 0);
  261. return IIO_VAL_INT;
  262. case IIO_CHAN_INFO_SCALE:
  263. ret = regulator_get_voltage(st->vref);
  264. if (ret < 0)
  265. return ret;
  266. *val = ret / 1000;
  267. *val2 = chan->scan_type.realbits;
  268. return IIO_VAL_FRACTIONAL_LOG2;
  269. }
  270. return -EINVAL;
  271. }
  272. static const unsigned int ad7998_frequencies[] = {
  273. [AD7998_CYC_DIS] = 0,
  274. [AD7998_CYC_TCONF_32] = 15625,
  275. [AD7998_CYC_TCONF_64] = 7812,
  276. [AD7998_CYC_TCONF_128] = 3906,
  277. [AD7998_CYC_TCONF_512] = 976,
  278. [AD7998_CYC_TCONF_1024] = 488,
  279. [AD7998_CYC_TCONF_2048] = 244,
  280. };
  281. static ssize_t ad799x_read_frequency(struct device *dev,
  282. struct device_attribute *attr,
  283. char *buf)
  284. {
  285. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  286. struct ad799x_state *st = iio_priv(indio_dev);
  287. int ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  288. if (ret < 0)
  289. return ret;
  290. return sprintf(buf, "%u\n", ad7998_frequencies[ret & AD7998_CYC_MASK]);
  291. }
  292. static ssize_t ad799x_write_frequency(struct device *dev,
  293. struct device_attribute *attr,
  294. const char *buf,
  295. size_t len)
  296. {
  297. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  298. struct ad799x_state *st = iio_priv(indio_dev);
  299. long val;
  300. int ret, i;
  301. ret = kstrtol(buf, 10, &val);
  302. if (ret)
  303. return ret;
  304. mutex_lock(&indio_dev->mlock);
  305. ret = i2c_smbus_read_byte_data(st->client, AD7998_CYCLE_TMR_REG);
  306. if (ret < 0)
  307. goto error_ret_mutex;
  308. /* Wipe the bits clean */
  309. ret &= ~AD7998_CYC_MASK;
  310. for (i = 0; i < ARRAY_SIZE(ad7998_frequencies); i++)
  311. if (val == ad7998_frequencies[i])
  312. break;
  313. if (i == ARRAY_SIZE(ad7998_frequencies)) {
  314. ret = -EINVAL;
  315. goto error_ret_mutex;
  316. }
  317. ret = i2c_smbus_write_byte_data(st->client, AD7998_CYCLE_TMR_REG,
  318. ret | i);
  319. if (ret < 0)
  320. goto error_ret_mutex;
  321. ret = len;
  322. error_ret_mutex:
  323. mutex_unlock(&indio_dev->mlock);
  324. return ret;
  325. }
  326. static int ad799x_read_event_config(struct iio_dev *indio_dev,
  327. const struct iio_chan_spec *chan,
  328. enum iio_event_type type,
  329. enum iio_event_direction dir)
  330. {
  331. struct ad799x_state *st = iio_priv(indio_dev);
  332. if (!(st->config & AD7998_ALERT_EN))
  333. return 0;
  334. if ((st->config >> AD799X_CHANNEL_SHIFT) & BIT(chan->scan_index))
  335. return 1;
  336. return 0;
  337. }
  338. static int ad799x_write_event_config(struct iio_dev *indio_dev,
  339. const struct iio_chan_spec *chan,
  340. enum iio_event_type type,
  341. enum iio_event_direction dir,
  342. int state)
  343. {
  344. struct ad799x_state *st = iio_priv(indio_dev);
  345. int ret;
  346. mutex_lock(&indio_dev->mlock);
  347. if (iio_buffer_enabled(indio_dev)) {
  348. ret = -EBUSY;
  349. goto done;
  350. }
  351. if (state)
  352. st->config |= BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT;
  353. else
  354. st->config &= ~(BIT(chan->scan_index) << AD799X_CHANNEL_SHIFT);
  355. if (st->config >> AD799X_CHANNEL_SHIFT)
  356. st->config |= AD7998_ALERT_EN;
  357. else
  358. st->config &= ~AD7998_ALERT_EN;
  359. ret = ad799x_write_config(st, st->config);
  360. done:
  361. mutex_unlock(&indio_dev->mlock);
  362. return ret;
  363. }
  364. static unsigned int ad799x_threshold_reg(const struct iio_chan_spec *chan,
  365. enum iio_event_direction dir,
  366. enum iio_event_info info)
  367. {
  368. switch (info) {
  369. case IIO_EV_INFO_VALUE:
  370. if (dir == IIO_EV_DIR_FALLING)
  371. return AD7998_DATALOW_REG(chan->channel);
  372. else
  373. return AD7998_DATAHIGH_REG(chan->channel);
  374. case IIO_EV_INFO_HYSTERESIS:
  375. return AD7998_HYST_REG(chan->channel);
  376. default:
  377. return -EINVAL;
  378. }
  379. return 0;
  380. }
  381. static int ad799x_write_event_value(struct iio_dev *indio_dev,
  382. const struct iio_chan_spec *chan,
  383. enum iio_event_type type,
  384. enum iio_event_direction dir,
  385. enum iio_event_info info,
  386. int val, int val2)
  387. {
  388. int ret;
  389. struct ad799x_state *st = iio_priv(indio_dev);
  390. if (val < 0 || val > GENMASK(chan->scan_type.realbits - 1, 0))
  391. return -EINVAL;
  392. mutex_lock(&indio_dev->mlock);
  393. ret = i2c_smbus_write_word_swapped(st->client,
  394. ad799x_threshold_reg(chan, dir, info),
  395. val << chan->scan_type.shift);
  396. mutex_unlock(&indio_dev->mlock);
  397. return ret;
  398. }
  399. static int ad799x_read_event_value(struct iio_dev *indio_dev,
  400. const struct iio_chan_spec *chan,
  401. enum iio_event_type type,
  402. enum iio_event_direction dir,
  403. enum iio_event_info info,
  404. int *val, int *val2)
  405. {
  406. int ret;
  407. struct ad799x_state *st = iio_priv(indio_dev);
  408. mutex_lock(&indio_dev->mlock);
  409. ret = i2c_smbus_read_word_swapped(st->client,
  410. ad799x_threshold_reg(chan, dir, info));
  411. mutex_unlock(&indio_dev->mlock);
  412. if (ret < 0)
  413. return ret;
  414. *val = (ret >> chan->scan_type.shift) &
  415. GENMASK(chan->scan_type.realbits - 1 , 0);
  416. return IIO_VAL_INT;
  417. }
  418. static irqreturn_t ad799x_event_handler(int irq, void *private)
  419. {
  420. struct iio_dev *indio_dev = private;
  421. struct ad799x_state *st = iio_priv(private);
  422. int i, ret;
  423. ret = i2c_smbus_read_byte_data(st->client, AD7998_ALERT_STAT_REG);
  424. if (ret <= 0)
  425. goto done;
  426. if (i2c_smbus_write_byte_data(st->client, AD7998_ALERT_STAT_REG,
  427. AD7998_ALERT_STAT_CLEAR) < 0)
  428. goto done;
  429. for (i = 0; i < 8; i++) {
  430. if (ret & BIT(i))
  431. iio_push_event(indio_dev,
  432. i & 0x1 ?
  433. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  434. (i >> 1),
  435. IIO_EV_TYPE_THRESH,
  436. IIO_EV_DIR_RISING) :
  437. IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE,
  438. (i >> 1),
  439. IIO_EV_TYPE_THRESH,
  440. IIO_EV_DIR_FALLING),
  441. iio_get_time_ns());
  442. }
  443. done:
  444. return IRQ_HANDLED;
  445. }
  446. static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
  447. ad799x_read_frequency,
  448. ad799x_write_frequency);
  449. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("15625 7812 3906 1953 976 488 244 0");
  450. static struct attribute *ad799x_event_attributes[] = {
  451. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  452. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  453. NULL,
  454. };
  455. static struct attribute_group ad799x_event_attrs_group = {
  456. .attrs = ad799x_event_attributes,
  457. };
  458. static const struct iio_info ad7991_info = {
  459. .read_raw = &ad799x_read_raw,
  460. .driver_module = THIS_MODULE,
  461. .update_scan_mode = ad799x_update_scan_mode,
  462. };
  463. static const struct iio_info ad7993_4_7_8_noirq_info = {
  464. .read_raw = &ad799x_read_raw,
  465. .driver_module = THIS_MODULE,
  466. .update_scan_mode = ad799x_update_scan_mode,
  467. };
  468. static const struct iio_info ad7993_4_7_8_irq_info = {
  469. .read_raw = &ad799x_read_raw,
  470. .event_attrs = &ad799x_event_attrs_group,
  471. .read_event_config = &ad799x_read_event_config,
  472. .write_event_config = &ad799x_write_event_config,
  473. .read_event_value = &ad799x_read_event_value,
  474. .write_event_value = &ad799x_write_event_value,
  475. .driver_module = THIS_MODULE,
  476. .update_scan_mode = ad799x_update_scan_mode,
  477. };
  478. static const struct iio_event_spec ad799x_events[] = {
  479. {
  480. .type = IIO_EV_TYPE_THRESH,
  481. .dir = IIO_EV_DIR_RISING,
  482. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  483. BIT(IIO_EV_INFO_ENABLE),
  484. }, {
  485. .type = IIO_EV_TYPE_THRESH,
  486. .dir = IIO_EV_DIR_FALLING,
  487. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  488. BIT(IIO_EV_INFO_ENABLE),
  489. }, {
  490. .type = IIO_EV_TYPE_THRESH,
  491. .dir = IIO_EV_DIR_EITHER,
  492. .mask_separate = BIT(IIO_EV_INFO_HYSTERESIS),
  493. },
  494. };
  495. #define _AD799X_CHANNEL(_index, _realbits, _ev_spec, _num_ev_spec) { \
  496. .type = IIO_VOLTAGE, \
  497. .indexed = 1, \
  498. .channel = (_index), \
  499. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  500. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  501. .scan_index = (_index), \
  502. .scan_type = { \
  503. .sign = 'u', \
  504. .realbits = (_realbits), \
  505. .storagebits = 16, \
  506. .shift = 12 - (_realbits), \
  507. .endianness = IIO_BE, \
  508. }, \
  509. .event_spec = _ev_spec, \
  510. .num_event_specs = _num_ev_spec, \
  511. }
  512. #define AD799X_CHANNEL(_index, _realbits) \
  513. _AD799X_CHANNEL(_index, _realbits, NULL, 0)
  514. #define AD799X_CHANNEL_WITH_EVENTS(_index, _realbits) \
  515. _AD799X_CHANNEL(_index, _realbits, ad799x_events, \
  516. ARRAY_SIZE(ad799x_events))
  517. static const struct ad799x_chip_info ad799x_chip_info_tbl[] = {
  518. [ad7991] = {
  519. .num_channels = 5,
  520. .noirq_config = {
  521. .channel = {
  522. AD799X_CHANNEL(0, 12),
  523. AD799X_CHANNEL(1, 12),
  524. AD799X_CHANNEL(2, 12),
  525. AD799X_CHANNEL(3, 12),
  526. IIO_CHAN_SOFT_TIMESTAMP(4),
  527. },
  528. .info = &ad7991_info,
  529. },
  530. },
  531. [ad7995] = {
  532. .num_channels = 5,
  533. .noirq_config = {
  534. .channel = {
  535. AD799X_CHANNEL(0, 10),
  536. AD799X_CHANNEL(1, 10),
  537. AD799X_CHANNEL(2, 10),
  538. AD799X_CHANNEL(3, 10),
  539. IIO_CHAN_SOFT_TIMESTAMP(4),
  540. },
  541. .info = &ad7991_info,
  542. },
  543. },
  544. [ad7999] = {
  545. .num_channels = 5,
  546. .noirq_config = {
  547. .channel = {
  548. AD799X_CHANNEL(0, 8),
  549. AD799X_CHANNEL(1, 8),
  550. AD799X_CHANNEL(2, 8),
  551. AD799X_CHANNEL(3, 8),
  552. IIO_CHAN_SOFT_TIMESTAMP(4),
  553. },
  554. .info = &ad7991_info,
  555. },
  556. },
  557. [ad7992] = {
  558. .num_channels = 3,
  559. .noirq_config = {
  560. .channel = {
  561. AD799X_CHANNEL(0, 12),
  562. AD799X_CHANNEL(1, 12),
  563. IIO_CHAN_SOFT_TIMESTAMP(3),
  564. },
  565. .info = &ad7993_4_7_8_noirq_info,
  566. },
  567. .irq_config = {
  568. .channel = {
  569. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  570. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  571. IIO_CHAN_SOFT_TIMESTAMP(3),
  572. },
  573. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  574. .info = &ad7993_4_7_8_irq_info,
  575. },
  576. },
  577. [ad7993] = {
  578. .num_channels = 5,
  579. .noirq_config = {
  580. .channel = {
  581. AD799X_CHANNEL(0, 10),
  582. AD799X_CHANNEL(1, 10),
  583. AD799X_CHANNEL(2, 10),
  584. AD799X_CHANNEL(3, 10),
  585. IIO_CHAN_SOFT_TIMESTAMP(4),
  586. },
  587. .info = &ad7993_4_7_8_noirq_info,
  588. },
  589. .irq_config = {
  590. .channel = {
  591. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  592. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  593. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  594. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  595. IIO_CHAN_SOFT_TIMESTAMP(4),
  596. },
  597. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  598. .info = &ad7993_4_7_8_irq_info,
  599. },
  600. },
  601. [ad7994] = {
  602. .num_channels = 5,
  603. .noirq_config = {
  604. .channel = {
  605. AD799X_CHANNEL(0, 12),
  606. AD799X_CHANNEL(1, 12),
  607. AD799X_CHANNEL(2, 12),
  608. AD799X_CHANNEL(3, 12),
  609. IIO_CHAN_SOFT_TIMESTAMP(4),
  610. },
  611. .info = &ad7993_4_7_8_noirq_info,
  612. },
  613. .irq_config = {
  614. .channel = {
  615. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  616. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  617. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  618. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  619. IIO_CHAN_SOFT_TIMESTAMP(4),
  620. },
  621. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  622. .info = &ad7993_4_7_8_irq_info,
  623. },
  624. },
  625. [ad7997] = {
  626. .num_channels = 9,
  627. .noirq_config = {
  628. .channel = {
  629. AD799X_CHANNEL(0, 10),
  630. AD799X_CHANNEL(1, 10),
  631. AD799X_CHANNEL(2, 10),
  632. AD799X_CHANNEL(3, 10),
  633. AD799X_CHANNEL(4, 10),
  634. AD799X_CHANNEL(5, 10),
  635. AD799X_CHANNEL(6, 10),
  636. AD799X_CHANNEL(7, 10),
  637. IIO_CHAN_SOFT_TIMESTAMP(8),
  638. },
  639. .info = &ad7993_4_7_8_noirq_info,
  640. },
  641. .irq_config = {
  642. .channel = {
  643. AD799X_CHANNEL_WITH_EVENTS(0, 10),
  644. AD799X_CHANNEL_WITH_EVENTS(1, 10),
  645. AD799X_CHANNEL_WITH_EVENTS(2, 10),
  646. AD799X_CHANNEL_WITH_EVENTS(3, 10),
  647. AD799X_CHANNEL(4, 10),
  648. AD799X_CHANNEL(5, 10),
  649. AD799X_CHANNEL(6, 10),
  650. AD799X_CHANNEL(7, 10),
  651. IIO_CHAN_SOFT_TIMESTAMP(8),
  652. },
  653. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  654. .info = &ad7993_4_7_8_irq_info,
  655. },
  656. },
  657. [ad7998] = {
  658. .num_channels = 9,
  659. .noirq_config = {
  660. .channel = {
  661. AD799X_CHANNEL(0, 12),
  662. AD799X_CHANNEL(1, 12),
  663. AD799X_CHANNEL(2, 12),
  664. AD799X_CHANNEL(3, 12),
  665. AD799X_CHANNEL(4, 12),
  666. AD799X_CHANNEL(5, 12),
  667. AD799X_CHANNEL(6, 12),
  668. AD799X_CHANNEL(7, 12),
  669. IIO_CHAN_SOFT_TIMESTAMP(8),
  670. },
  671. .info = &ad7993_4_7_8_noirq_info,
  672. },
  673. .irq_config = {
  674. .channel = {
  675. AD799X_CHANNEL_WITH_EVENTS(0, 12),
  676. AD799X_CHANNEL_WITH_EVENTS(1, 12),
  677. AD799X_CHANNEL_WITH_EVENTS(2, 12),
  678. AD799X_CHANNEL_WITH_EVENTS(3, 12),
  679. AD799X_CHANNEL(4, 12),
  680. AD799X_CHANNEL(5, 12),
  681. AD799X_CHANNEL(6, 12),
  682. AD799X_CHANNEL(7, 12),
  683. IIO_CHAN_SOFT_TIMESTAMP(8),
  684. },
  685. .default_config = AD7998_ALERT_EN | AD7998_BUSY_ALERT,
  686. .info = &ad7993_4_7_8_irq_info,
  687. },
  688. },
  689. };
  690. static int ad799x_probe(struct i2c_client *client,
  691. const struct i2c_device_id *id)
  692. {
  693. int ret;
  694. struct ad799x_state *st;
  695. struct iio_dev *indio_dev;
  696. const struct ad799x_chip_info *chip_info =
  697. &ad799x_chip_info_tbl[id->driver_data];
  698. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
  699. if (indio_dev == NULL)
  700. return -ENOMEM;
  701. st = iio_priv(indio_dev);
  702. /* this is only used for device removal purposes */
  703. i2c_set_clientdata(client, indio_dev);
  704. st->id = id->driver_data;
  705. if (client->irq > 0 && chip_info->irq_config.info)
  706. st->chip_config = &chip_info->irq_config;
  707. else
  708. st->chip_config = &chip_info->noirq_config;
  709. /* TODO: Add pdata options for filtering and bit delay */
  710. st->reg = devm_regulator_get(&client->dev, "vcc");
  711. if (IS_ERR(st->reg))
  712. return PTR_ERR(st->reg);
  713. ret = regulator_enable(st->reg);
  714. if (ret)
  715. return ret;
  716. st->vref = devm_regulator_get(&client->dev, "vref");
  717. if (IS_ERR(st->vref)) {
  718. ret = PTR_ERR(st->vref);
  719. goto error_disable_reg;
  720. }
  721. ret = regulator_enable(st->vref);
  722. if (ret)
  723. goto error_disable_reg;
  724. st->client = client;
  725. indio_dev->dev.parent = &client->dev;
  726. indio_dev->name = id->name;
  727. indio_dev->info = st->chip_config->info;
  728. indio_dev->modes = INDIO_DIRECT_MODE;
  729. indio_dev->channels = st->chip_config->channel;
  730. indio_dev->num_channels = chip_info->num_channels;
  731. ret = ad799x_write_config(st, st->chip_config->default_config);
  732. if (ret < 0)
  733. goto error_disable_reg;
  734. ret = ad799x_read_config(st);
  735. if (ret < 0)
  736. goto error_disable_reg;
  737. st->config = ret;
  738. ret = iio_triggered_buffer_setup(indio_dev, NULL,
  739. &ad799x_trigger_handler, NULL);
  740. if (ret)
  741. goto error_disable_vref;
  742. if (client->irq > 0) {
  743. ret = devm_request_threaded_irq(&client->dev,
  744. client->irq,
  745. NULL,
  746. ad799x_event_handler,
  747. IRQF_TRIGGER_FALLING |
  748. IRQF_ONESHOT,
  749. client->name,
  750. indio_dev);
  751. if (ret)
  752. goto error_cleanup_ring;
  753. }
  754. ret = iio_device_register(indio_dev);
  755. if (ret)
  756. goto error_cleanup_ring;
  757. return 0;
  758. error_cleanup_ring:
  759. iio_triggered_buffer_cleanup(indio_dev);
  760. error_disable_vref:
  761. regulator_disable(st->vref);
  762. error_disable_reg:
  763. regulator_disable(st->reg);
  764. return ret;
  765. }
  766. static int ad799x_remove(struct i2c_client *client)
  767. {
  768. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  769. struct ad799x_state *st = iio_priv(indio_dev);
  770. iio_device_unregister(indio_dev);
  771. iio_triggered_buffer_cleanup(indio_dev);
  772. regulator_disable(st->vref);
  773. regulator_disable(st->reg);
  774. kfree(st->rx_buf);
  775. return 0;
  776. }
  777. static const struct i2c_device_id ad799x_id[] = {
  778. { "ad7991", ad7991 },
  779. { "ad7995", ad7995 },
  780. { "ad7999", ad7999 },
  781. { "ad7992", ad7992 },
  782. { "ad7993", ad7993 },
  783. { "ad7994", ad7994 },
  784. { "ad7997", ad7997 },
  785. { "ad7998", ad7998 },
  786. {}
  787. };
  788. MODULE_DEVICE_TABLE(i2c, ad799x_id);
  789. static struct i2c_driver ad799x_driver = {
  790. .driver = {
  791. .name = "ad799x",
  792. },
  793. .probe = ad799x_probe,
  794. .remove = ad799x_remove,
  795. .id_table = ad799x_id,
  796. };
  797. module_i2c_driver(ad799x_driver);
  798. MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
  799. MODULE_DESCRIPTION("Analog Devices AD799x ADC");
  800. MODULE_LICENSE("GPL v2");