ti_am335x_adc.c 15 KB

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  1. /*
  2. * TI ADC MFD driver
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License as
  8. * published by the Free Software Foundation version 2.
  9. *
  10. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11. * kind, whether express or implied; without even the implied warranty
  12. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/err.h>
  17. #include <linux/module.h>
  18. #include <linux/slab.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/iio/iio.h>
  23. #include <linux/of.h>
  24. #include <linux/of_device.h>
  25. #include <linux/iio/machine.h>
  26. #include <linux/iio/driver.h>
  27. #include <linux/mfd/ti_am335x_tscadc.h>
  28. #include <linux/iio/buffer.h>
  29. #include <linux/iio/kfifo_buf.h>
  30. struct tiadc_device {
  31. struct ti_tscadc_dev *mfd_tscadc;
  32. struct mutex fifo1_lock; /* to protect fifo access */
  33. int channels;
  34. u8 channel_line[8];
  35. u8 channel_step[8];
  36. int buffer_en_ch_steps;
  37. u16 data[8];
  38. u32 open_delay[8], sample_delay[8], step_avg[8];
  39. };
  40. static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
  41. {
  42. return readl(adc->mfd_tscadc->tscadc_base + reg);
  43. }
  44. static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
  45. unsigned int val)
  46. {
  47. writel(val, adc->mfd_tscadc->tscadc_base + reg);
  48. }
  49. static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
  50. {
  51. u32 step_en;
  52. step_en = ((1 << adc_dev->channels) - 1);
  53. step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
  54. return step_en;
  55. }
  56. static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
  57. struct iio_chan_spec const *chan)
  58. {
  59. int i;
  60. for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
  61. if (chan->channel == adc_dev->channel_line[i]) {
  62. u32 step;
  63. step = adc_dev->channel_step[i];
  64. /* +1 for the charger */
  65. return 1 << (step + 1);
  66. }
  67. }
  68. WARN_ON(1);
  69. return 0;
  70. }
  71. static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
  72. {
  73. return 1 << adc_dev->channel_step[chan];
  74. }
  75. static void tiadc_step_config(struct iio_dev *indio_dev)
  76. {
  77. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  78. struct device *dev = adc_dev->mfd_tscadc->dev;
  79. unsigned int stepconfig;
  80. int i, steps = 0;
  81. /*
  82. * There are 16 configurable steps and 8 analog input
  83. * lines available which are shared between Touchscreen and ADC.
  84. *
  85. * Steps forwards i.e. from 0 towards 16 are used by ADC
  86. * depending on number of input lines needed.
  87. * Channel would represent which analog input
  88. * needs to be given to ADC to digitalize data.
  89. */
  90. for (i = 0; i < adc_dev->channels; i++) {
  91. int chan;
  92. chan = adc_dev->channel_line[i];
  93. if (adc_dev->step_avg[i] > STEPCONFIG_AVG_16) {
  94. dev_warn(dev, "chan %d step_avg truncating to %d\n",
  95. chan, STEPCONFIG_AVG_16);
  96. adc_dev->step_avg[i] = STEPCONFIG_AVG_16;
  97. }
  98. if (adc_dev->step_avg[i])
  99. stepconfig =
  100. STEPCONFIG_AVG(ffs(adc_dev->step_avg[i]) - 1) |
  101. STEPCONFIG_FIFO1;
  102. else
  103. stepconfig = STEPCONFIG_FIFO1;
  104. if (iio_buffer_enabled(indio_dev))
  105. stepconfig |= STEPCONFIG_MODE_SWCNT;
  106. tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
  107. stepconfig | STEPCONFIG_INP(chan));
  108. if (adc_dev->open_delay[i] > STEPDELAY_OPEN_MASK) {
  109. dev_warn(dev, "chan %d open delay truncating to 0x3FFFF\n",
  110. chan);
  111. adc_dev->open_delay[i] = STEPDELAY_OPEN_MASK;
  112. }
  113. if (adc_dev->sample_delay[i] > 0xFF) {
  114. dev_warn(dev, "chan %d sample delay truncating to 0xFF\n",
  115. chan);
  116. adc_dev->sample_delay[i] = 0xFF;
  117. }
  118. tiadc_writel(adc_dev, REG_STEPDELAY(steps),
  119. STEPDELAY_OPEN(adc_dev->open_delay[i]) |
  120. STEPDELAY_SAMPLE(adc_dev->sample_delay[i]));
  121. adc_dev->channel_step[i] = steps;
  122. steps++;
  123. }
  124. }
  125. static irqreturn_t tiadc_irq_h(int irq, void *private)
  126. {
  127. struct iio_dev *indio_dev = private;
  128. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  129. unsigned int status, config, adc_fsm;
  130. unsigned short count = 0;
  131. status = tiadc_readl(adc_dev, REG_IRQSTATUS);
  132. /*
  133. * ADC and touchscreen share the IRQ line.
  134. * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
  135. */
  136. if (status & IRQENB_FIFO1OVRRUN) {
  137. /* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
  138. config = tiadc_readl(adc_dev, REG_CTRL);
  139. config &= ~(CNTRLREG_TSCSSENB);
  140. tiadc_writel(adc_dev, REG_CTRL, config);
  141. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
  142. | IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
  143. /* wait for idle state.
  144. * ADC needs to finish the current conversion
  145. * before disabling the module
  146. */
  147. do {
  148. adc_fsm = tiadc_readl(adc_dev, REG_ADCFSM);
  149. } while (adc_fsm != 0x10 && count++ < 100);
  150. tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
  151. return IRQ_HANDLED;
  152. } else if (status & IRQENB_FIFO1THRES) {
  153. /* Disable irq and wake worker thread */
  154. tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
  155. return IRQ_WAKE_THREAD;
  156. }
  157. return IRQ_NONE;
  158. }
  159. static irqreturn_t tiadc_worker_h(int irq, void *private)
  160. {
  161. struct iio_dev *indio_dev = private;
  162. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  163. int i, k, fifo1count, read;
  164. u16 *data = adc_dev->data;
  165. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  166. for (k = 0; k < fifo1count; k = k + i) {
  167. for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
  168. read = tiadc_readl(adc_dev, REG_FIFO1);
  169. data[i] = read & FIFOREAD_DATA_MASK;
  170. }
  171. iio_push_to_buffers(indio_dev, (u8 *) data);
  172. }
  173. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
  174. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
  175. return IRQ_HANDLED;
  176. }
  177. static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
  178. {
  179. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  180. int i, fifo1count, read;
  181. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  182. IRQENB_FIFO1OVRRUN |
  183. IRQENB_FIFO1UNDRFLW));
  184. /* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
  185. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  186. for (i = 0; i < fifo1count; i++)
  187. read = tiadc_readl(adc_dev, REG_FIFO1);
  188. return 0;
  189. }
  190. static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
  191. {
  192. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  193. unsigned int enb = 0;
  194. u8 bit;
  195. tiadc_step_config(indio_dev);
  196. for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels)
  197. enb |= (get_adc_step_bit(adc_dev, bit) << 1);
  198. adc_dev->buffer_en_ch_steps = enb;
  199. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
  200. tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES
  201. | IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
  202. tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES
  203. | IRQENB_FIFO1OVRRUN);
  204. return 0;
  205. }
  206. static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
  207. {
  208. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  209. int fifo1count, i, read;
  210. tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
  211. IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
  212. am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
  213. adc_dev->buffer_en_ch_steps = 0;
  214. /* Flush FIFO of leftover data in the time it takes to disable adc */
  215. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  216. for (i = 0; i < fifo1count; i++)
  217. read = tiadc_readl(adc_dev, REG_FIFO1);
  218. return 0;
  219. }
  220. static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
  221. {
  222. tiadc_step_config(indio_dev);
  223. return 0;
  224. }
  225. static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
  226. .preenable = &tiadc_buffer_preenable,
  227. .postenable = &tiadc_buffer_postenable,
  228. .predisable = &tiadc_buffer_predisable,
  229. .postdisable = &tiadc_buffer_postdisable,
  230. };
  231. static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
  232. irqreturn_t (*pollfunc_bh)(int irq, void *p),
  233. irqreturn_t (*pollfunc_th)(int irq, void *p),
  234. int irq,
  235. unsigned long flags,
  236. const struct iio_buffer_setup_ops *setup_ops)
  237. {
  238. struct iio_buffer *buffer;
  239. int ret;
  240. buffer = iio_kfifo_allocate();
  241. if (!buffer)
  242. return -ENOMEM;
  243. iio_device_attach_buffer(indio_dev, buffer);
  244. ret = request_threaded_irq(irq, pollfunc_th, pollfunc_bh,
  245. flags, indio_dev->name, indio_dev);
  246. if (ret)
  247. goto error_kfifo_free;
  248. indio_dev->setup_ops = setup_ops;
  249. indio_dev->modes |= INDIO_BUFFER_SOFTWARE;
  250. return 0;
  251. error_kfifo_free:
  252. iio_kfifo_free(indio_dev->buffer);
  253. return ret;
  254. }
  255. static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
  256. {
  257. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  258. free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
  259. iio_kfifo_free(indio_dev->buffer);
  260. }
  261. static const char * const chan_name_ain[] = {
  262. "AIN0",
  263. "AIN1",
  264. "AIN2",
  265. "AIN3",
  266. "AIN4",
  267. "AIN5",
  268. "AIN6",
  269. "AIN7",
  270. };
  271. static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
  272. {
  273. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  274. struct iio_chan_spec *chan_array;
  275. struct iio_chan_spec *chan;
  276. int i;
  277. indio_dev->num_channels = channels;
  278. chan_array = kcalloc(channels,
  279. sizeof(struct iio_chan_spec), GFP_KERNEL);
  280. if (chan_array == NULL)
  281. return -ENOMEM;
  282. chan = chan_array;
  283. for (i = 0; i < channels; i++, chan++) {
  284. chan->type = IIO_VOLTAGE;
  285. chan->indexed = 1;
  286. chan->channel = adc_dev->channel_line[i];
  287. chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
  288. chan->datasheet_name = chan_name_ain[chan->channel];
  289. chan->scan_index = i;
  290. chan->scan_type.sign = 'u';
  291. chan->scan_type.realbits = 12;
  292. chan->scan_type.storagebits = 16;
  293. }
  294. indio_dev->channels = chan_array;
  295. return 0;
  296. }
  297. static void tiadc_channels_remove(struct iio_dev *indio_dev)
  298. {
  299. kfree(indio_dev->channels);
  300. }
  301. static int tiadc_read_raw(struct iio_dev *indio_dev,
  302. struct iio_chan_spec const *chan,
  303. int *val, int *val2, long mask)
  304. {
  305. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  306. int ret = IIO_VAL_INT;
  307. int i, map_val;
  308. unsigned int fifo1count, read, stepid;
  309. bool found = false;
  310. u32 step_en;
  311. unsigned long timeout;
  312. if (iio_buffer_enabled(indio_dev))
  313. return -EBUSY;
  314. step_en = get_adc_chan_step_mask(adc_dev, chan);
  315. if (!step_en)
  316. return -EINVAL;
  317. mutex_lock(&adc_dev->fifo1_lock);
  318. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  319. while (fifo1count--)
  320. tiadc_readl(adc_dev, REG_FIFO1);
  321. am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
  322. timeout = jiffies + msecs_to_jiffies
  323. (IDLE_TIMEOUT * adc_dev->channels);
  324. /* Wait for Fifo threshold interrupt */
  325. while (1) {
  326. fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
  327. if (fifo1count)
  328. break;
  329. if (time_after(jiffies, timeout)) {
  330. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  331. ret = -EAGAIN;
  332. goto err_unlock;
  333. }
  334. }
  335. map_val = adc_dev->channel_step[chan->scan_index];
  336. /*
  337. * We check the complete FIFO. We programmed just one entry but in case
  338. * something went wrong we left empty handed (-EAGAIN previously) and
  339. * then the value apeared somehow in the FIFO we would have two entries.
  340. * Therefore we read every item and keep only the latest version of the
  341. * requested channel.
  342. */
  343. for (i = 0; i < fifo1count; i++) {
  344. read = tiadc_readl(adc_dev, REG_FIFO1);
  345. stepid = read & FIFOREAD_CHNLID_MASK;
  346. stepid = stepid >> 0x10;
  347. if (stepid == map_val) {
  348. read = read & FIFOREAD_DATA_MASK;
  349. found = true;
  350. *val = (u16) read;
  351. }
  352. }
  353. am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
  354. if (found == false)
  355. ret = -EBUSY;
  356. err_unlock:
  357. mutex_unlock(&adc_dev->fifo1_lock);
  358. return ret;
  359. }
  360. static const struct iio_info tiadc_info = {
  361. .read_raw = &tiadc_read_raw,
  362. .driver_module = THIS_MODULE,
  363. };
  364. static int tiadc_parse_dt(struct platform_device *pdev,
  365. struct tiadc_device *adc_dev)
  366. {
  367. struct device_node *node = pdev->dev.of_node;
  368. struct property *prop;
  369. const __be32 *cur;
  370. int channels = 0;
  371. u32 val;
  372. of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
  373. adc_dev->channel_line[channels] = val;
  374. /* Set Default values for optional DT parameters */
  375. adc_dev->open_delay[channels] = STEPCONFIG_OPENDLY;
  376. adc_dev->sample_delay[channels] = STEPCONFIG_SAMPLEDLY;
  377. adc_dev->step_avg[channels] = 16;
  378. channels++;
  379. }
  380. of_property_read_u32_array(node, "ti,chan-step-avg",
  381. adc_dev->step_avg, channels);
  382. of_property_read_u32_array(node, "ti,chan-step-opendelay",
  383. adc_dev->open_delay, channels);
  384. of_property_read_u32_array(node, "ti,chan-step-sampledelay",
  385. adc_dev->sample_delay, channels);
  386. adc_dev->channels = channels;
  387. return 0;
  388. }
  389. static int tiadc_probe(struct platform_device *pdev)
  390. {
  391. struct iio_dev *indio_dev;
  392. struct tiadc_device *adc_dev;
  393. struct device_node *node = pdev->dev.of_node;
  394. int err;
  395. if (!node) {
  396. dev_err(&pdev->dev, "Could not find valid DT data.\n");
  397. return -EINVAL;
  398. }
  399. indio_dev = devm_iio_device_alloc(&pdev->dev,
  400. sizeof(struct tiadc_device));
  401. if (indio_dev == NULL) {
  402. dev_err(&pdev->dev, "failed to allocate iio device\n");
  403. return -ENOMEM;
  404. }
  405. adc_dev = iio_priv(indio_dev);
  406. adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
  407. tiadc_parse_dt(pdev, adc_dev);
  408. indio_dev->dev.parent = &pdev->dev;
  409. indio_dev->name = dev_name(&pdev->dev);
  410. indio_dev->modes = INDIO_DIRECT_MODE;
  411. indio_dev->info = &tiadc_info;
  412. tiadc_step_config(indio_dev);
  413. tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
  414. mutex_init(&adc_dev->fifo1_lock);
  415. err = tiadc_channel_init(indio_dev, adc_dev->channels);
  416. if (err < 0)
  417. return err;
  418. err = tiadc_iio_buffered_hardware_setup(indio_dev,
  419. &tiadc_worker_h,
  420. &tiadc_irq_h,
  421. adc_dev->mfd_tscadc->irq,
  422. IRQF_SHARED,
  423. &tiadc_buffer_setup_ops);
  424. if (err)
  425. goto err_free_channels;
  426. err = iio_device_register(indio_dev);
  427. if (err)
  428. goto err_buffer_unregister;
  429. platform_set_drvdata(pdev, indio_dev);
  430. return 0;
  431. err_buffer_unregister:
  432. tiadc_iio_buffered_hardware_remove(indio_dev);
  433. err_free_channels:
  434. tiadc_channels_remove(indio_dev);
  435. return err;
  436. }
  437. static int tiadc_remove(struct platform_device *pdev)
  438. {
  439. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  440. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  441. u32 step_en;
  442. iio_device_unregister(indio_dev);
  443. tiadc_iio_buffered_hardware_remove(indio_dev);
  444. tiadc_channels_remove(indio_dev);
  445. step_en = get_adc_step_mask(adc_dev);
  446. am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
  447. return 0;
  448. }
  449. #ifdef CONFIG_PM
  450. static int tiadc_suspend(struct device *dev)
  451. {
  452. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  453. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  454. struct ti_tscadc_dev *tscadc_dev;
  455. unsigned int idle;
  456. tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
  457. if (!device_may_wakeup(tscadc_dev->dev)) {
  458. idle = tiadc_readl(adc_dev, REG_CTRL);
  459. idle &= ~(CNTRLREG_TSCSSENB);
  460. tiadc_writel(adc_dev, REG_CTRL, (idle |
  461. CNTRLREG_POWERDOWN));
  462. }
  463. return 0;
  464. }
  465. static int tiadc_resume(struct device *dev)
  466. {
  467. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  468. struct tiadc_device *adc_dev = iio_priv(indio_dev);
  469. unsigned int restore;
  470. /* Make sure ADC is powered up */
  471. restore = tiadc_readl(adc_dev, REG_CTRL);
  472. restore &= ~(CNTRLREG_POWERDOWN);
  473. tiadc_writel(adc_dev, REG_CTRL, restore);
  474. tiadc_step_config(indio_dev);
  475. am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
  476. adc_dev->buffer_en_ch_steps);
  477. return 0;
  478. }
  479. static const struct dev_pm_ops tiadc_pm_ops = {
  480. .suspend = tiadc_suspend,
  481. .resume = tiadc_resume,
  482. };
  483. #define TIADC_PM_OPS (&tiadc_pm_ops)
  484. #else
  485. #define TIADC_PM_OPS NULL
  486. #endif
  487. static const struct of_device_id ti_adc_dt_ids[] = {
  488. { .compatible = "ti,am3359-adc", },
  489. { }
  490. };
  491. MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
  492. static struct platform_driver tiadc_driver = {
  493. .driver = {
  494. .name = "TI-am335x-adc",
  495. .pm = TIADC_PM_OPS,
  496. .of_match_table = ti_adc_dt_ids,
  497. },
  498. .probe = tiadc_probe,
  499. .remove = tiadc_remove,
  500. };
  501. module_platform_driver(tiadc_driver);
  502. MODULE_DESCRIPTION("TI ADC controller driver");
  503. MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
  504. MODULE_LICENSE("GPL");